Show patches with: Series = RISC-V sim: Update from riscv-gnu-toolchain.       |    State = Action Required       |    Archived = No       |   24 patches
Patch Series S/W/F Date Submitter Delegate State
[24/24] RISC-V sim: Fix divw and remw. RISC-V sim: Update from riscv-gnu-toolchain. 0 0 0 2021-04-17 Jim Wilson New
[23/24] RISC-V sim: Add zicsr support. RISC-V sim: Update from riscv-gnu-toolchain. 0 0 0 2021-04-17 Jim Wilson New
[22/24] RISC-V sim: Support compressed FP instructions. RISC-V sim: Update from riscv-gnu-toolchain. 0 0 0 2021-04-17 Jim Wilson New
[21/24] RISC-V sim: Fix mingw builds. RISC-V sim: Update from riscv-gnu-toolchain. 0 0 0 2021-04-17 Jim Wilson New
[20/24] RISC-V sim: Set brk to _end if possible. RISC-V sim: Update from riscv-gnu-toolchain. 0 0 0 2021-04-17 Jim Wilson New
[19/24] RISC-V sim: Improve tracing for slt* instructions. RISC-V sim: Update from riscv-gnu-toolchain. 0 0 0 2021-04-17 Jim Wilson New
[18/24] RISC-V sim: Improve branch tracing. RISC-V sim: Update from riscv-gnu-toolchain. 0 0 0 2021-04-17 Jim Wilson New
[17/24] RISC-V sim: Fix tracing typo. RISC-V sim: Update from riscv-gnu-toolchain. 0 0 0 2021-04-17 Jim Wilson New
[16/24] RISC-V sim: Check sbrk argument. RISC-V sim: Update from riscv-gnu-toolchain. 0 0 0 2021-04-17 Jim Wilson New
[15/24] RISC-V sim: Improve cycle and instret counts. RISC-V sim: Update from riscv-gnu-toolchain. 0 0 0 2021-04-17 Jim Wilson New
[14/24] RISC-V sim: Add csrr*i instructions. RISC-V sim: Update from riscv-gnu-toolchain. 0 0 0 2021-04-17 Jim Wilson New
[13/24] RISC-V sim: Add gettimeofday. RISC-V sim: Update from riscv-gnu-toolchain. 0 0 0 2021-04-17 Jim Wilson New
[12/24] RISC-V sim: Add compressed support. RISC-V sim: Update from riscv-gnu-toolchain. 0 0 0 2021-04-17 Jim Wilson New
[11/24] RISC-V sim: Fix ebreak, part 2. RISC-V sim: Update from riscv-gnu-toolchain. 0 0 0 2021-04-17 Jim Wilson New
[10/24] RISC-V sim: Fix ebreak. RISC-V sim: Update from riscv-gnu-toolchain. 0 0 0 2021-04-17 Jim Wilson New
[09/24] RISC-V sim: Fix syscall fallback. RISC-V sim: Update from riscv-gnu-toolchain. 0 0 0 2021-04-17 Jim Wilson New
[08/24] RISC-V sim: Add brk syscall. RISC-V sim: Update from riscv-gnu-toolchain. 0 0 0 2021-04-17 Jim Wilson New
[07/24] RISC-V sim: Add link syscall support. RISC-V sim: Update from riscv-gnu-toolchain. 0 0 0 2021-04-17 Jim Wilson New
[06/24] RISC-V: Add fp support. RISC-V sim: Update from riscv-gnu-toolchain. 0 0 0 2021-04-17 Jim Wilson New
[05/24] RISC-V sim: Fix stack pointer alignment. RISC-V sim: Update from riscv-gnu-toolchain. 0 0 0 2021-04-17 Jim Wilson New
[04/24] RISC-V sim: More atomic fixes. RISC-V sim: Update from riscv-gnu-toolchain. 0 0 0 2021-04-17 Jim Wilson New
[03/24] RISC-V sim: Atomic fixes. RISC-V sim: Update from riscv-gnu-toolchain. 0 0 0 2021-04-17 Jim Wilson New
[02/24] RISC-V sim: Fix for jalr. RISC-V sim: Update from riscv-gnu-toolchain. 0 0 0 2021-04-17 Jim Wilson New
[01/24] RISC-V sim: Fix fence.i. RISC-V sim: Update from riscv-gnu-toolchain. 0 0 0 2021-04-17 Jim Wilson New