arm: avoid "shadowing" of glibc function name

Message ID a0c7eb6a-a94f-5813-c623-aae8a3ebbf33@suse.com
State New
Headers show
Series
  • arm: avoid "shadowing" of glibc function name
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Commit Message

Peter Bergner via Binutils June 10, 2021, 7:44 a.m.
Old enough glibc has an (unguarded) declaration of index() in string.h,
which triggers a "shadows a global declaration" warning.

gas/
2021-06-XX  Jan Beulich  <jbeulich@suse.com>

	* config/tc-arm.c (do_bfloat_vfma): Rename index to idx.
	(do_vusdot): Likewise.
	(do_vsudot): Likewise.
	(check_cde_operand): Likewise.
	(do_vdot): Likewise.

Comments

Peter Bergner via Binutils June 10, 2021, 10:26 a.m. | #1
OK.

R.


On 10/06/2021 08:44, Jan Beulich via Binutils wrote:
> Old enough glibc has an (unguarded) declaration of index() in string.h,

> which triggers a "shadows a global declaration" warning.

> 

> gas/

> 2021-06-XX  Jan Beulich  <jbeulich@suse.com>

> 

> 	* config/tc-arm.c (do_bfloat_vfma): Rename index to idx.

> 	(do_vusdot): Likewise.

> 	(do_vsudot): Likewise.

> 	(check_cde_operand): Likewise.

> 	(do_vdot): Likewise.

> 

> --- a/gas/config/tc-arm.c

> +++ b/gas/config/tc-arm.c

> @@ -17937,14 +17937,14 @@ do_bfloat_vfma (void)

>         neon_check_type (3, rs, N_EQK, N_EQK, N_BF16 | N_KEY);

>   

>         inst.instruction |= (1 << 25);

> -      int index = inst.operands[2].reg & 0xf;

> -      constraint (!(index < 4), _("index must be in the range 0 to 3"));

> +      int idx = inst.operands[2].reg & 0xf;

> +      constraint (!(idx < 4), _("index must be in the range 0 to 3"));

>         inst.operands[2].reg >>= 4;

>         constraint (!(inst.operands[2].reg < 8),

>   		  _("indexed register must be less than 8"));

>         neon_three_args (t_bit);

> -      inst.instruction |= ((index & 1) << 3);

> -      inst.instruction |= ((index & 2) << 4);

> +      inst.instruction |= ((idx & 1) << 3);

> +      inst.instruction |= ((idx & 2) << 4);

>       }

>     else

>       {

> @@ -21579,13 +21579,13 @@ do_vusdot (void)

>         neon_check_type (3, rs, N_EQK, N_EQK, N_S8 | N_KEY);

>   

>         inst.instruction |= (1 << 25);

> -      int index = inst.operands[2].reg & 0xf;

> -      constraint ((index != 1 && index != 0), _("index must be 0 or 1"));

> +      int idx = inst.operands[2].reg & 0xf;

> +      constraint ((idx != 1 && idx != 0), _("index must be 0 or 1"));

>         inst.operands[2].reg >>= 4;

>         constraint (!(inst.operands[2].reg < 16),

>   		  _("indexed register must be less than 16"));

>         neon_three_args (rs == NS_QQS);

> -      inst.instruction |= (index << 5);

> +      inst.instruction |= (idx << 5);

>       }

>     else

>       {

> @@ -21607,13 +21607,13 @@ do_vsudot (void)

>         neon_check_type (3, rs, N_EQK, N_EQK, N_U8 | N_KEY);

>   

>         inst.instruction |= (1 << 25);

> -      int index = inst.operands[2].reg & 0xf;

> -      constraint ((index != 1 && index != 0), _("index must be 0 or 1"));

> +      int idx = inst.operands[2].reg & 0xf;

> +      constraint ((idx != 1 && idx != 0), _("index must be 0 or 1"));

>         inst.operands[2].reg >>= 4;

>         constraint (!(inst.operands[2].reg < 16),

>   		  _("indexed register must be less than 16"));

>         neon_three_args (rs == NS_QQS);

> -      inst.instruction |= (index << 5);

> +      inst.instruction |= (idx << 5);

>       }

>   }

>   

> @@ -21642,10 +21642,10 @@ do_vummla (void)

>   }

>   

>   static void

> -check_cde_operand (size_t index, int is_dual)

> +check_cde_operand (size_t idx, int is_dual)

>   {

> -  unsigned Rx = inst.operands[index].reg;

> -  bool isvec = inst.operands[index].isvec;

> +  unsigned Rx = inst.operands[idx].reg;

> +  bool isvec = inst.operands[idx].isvec;

>     if (is_dual == 0 && thumb_mode)

>       constraint (

>   		!((Rx <= 14 && Rx != 13) || (Rx == REG_PC && isvec)),

> @@ -22289,13 +22289,13 @@ do_vdot (void)

>         neon_check_type (3, rs, N_EQK, N_EQK, N_BF16 | N_KEY);

>   

>         inst.instruction |= (1 << 25);

> -      int index = inst.operands[2].reg & 0xf;

> -      constraint ((index != 1 && index != 0), _("index must be 0 or 1"));

> +      int idx = inst.operands[2].reg & 0xf;

> +      constraint ((idx != 1 && idx != 0), _("index must be 0 or 1"));

>         inst.operands[2].reg >>= 4;

>         constraint (!(inst.operands[2].reg < 16),

>   		  _("indexed register must be less than 16"));

>         neon_three_args (rs == NS_QQS);

> -      inst.instruction |= (index << 5);

> +      inst.instruction |= (idx << 5);

>       }

>     else

>       {

>

Patch

--- a/gas/config/tc-arm.c
+++ b/gas/config/tc-arm.c
@@ -17937,14 +17937,14 @@  do_bfloat_vfma (void)
       neon_check_type (3, rs, N_EQK, N_EQK, N_BF16 | N_KEY);
 
       inst.instruction |= (1 << 25);
-      int index = inst.operands[2].reg & 0xf;
-      constraint (!(index < 4), _("index must be in the range 0 to 3"));
+      int idx = inst.operands[2].reg & 0xf;
+      constraint (!(idx < 4), _("index must be in the range 0 to 3"));
       inst.operands[2].reg >>= 4;
       constraint (!(inst.operands[2].reg < 8),
 		  _("indexed register must be less than 8"));
       neon_three_args (t_bit);
-      inst.instruction |= ((index & 1) << 3);
-      inst.instruction |= ((index & 2) << 4);
+      inst.instruction |= ((idx & 1) << 3);
+      inst.instruction |= ((idx & 2) << 4);
     }
   else
     {
@@ -21579,13 +21579,13 @@  do_vusdot (void)
       neon_check_type (3, rs, N_EQK, N_EQK, N_S8 | N_KEY);
 
       inst.instruction |= (1 << 25);
-      int index = inst.operands[2].reg & 0xf;
-      constraint ((index != 1 && index != 0), _("index must be 0 or 1"));
+      int idx = inst.operands[2].reg & 0xf;
+      constraint ((idx != 1 && idx != 0), _("index must be 0 or 1"));
       inst.operands[2].reg >>= 4;
       constraint (!(inst.operands[2].reg < 16),
 		  _("indexed register must be less than 16"));
       neon_three_args (rs == NS_QQS);
-      inst.instruction |= (index << 5);
+      inst.instruction |= (idx << 5);
     }
   else
     {
@@ -21607,13 +21607,13 @@  do_vsudot (void)
       neon_check_type (3, rs, N_EQK, N_EQK, N_U8 | N_KEY);
 
       inst.instruction |= (1 << 25);
-      int index = inst.operands[2].reg & 0xf;
-      constraint ((index != 1 && index != 0), _("index must be 0 or 1"));
+      int idx = inst.operands[2].reg & 0xf;
+      constraint ((idx != 1 && idx != 0), _("index must be 0 or 1"));
       inst.operands[2].reg >>= 4;
       constraint (!(inst.operands[2].reg < 16),
 		  _("indexed register must be less than 16"));
       neon_three_args (rs == NS_QQS);
-      inst.instruction |= (index << 5);
+      inst.instruction |= (idx << 5);
     }
 }
 
@@ -21642,10 +21642,10 @@  do_vummla (void)
 }
 
 static void
-check_cde_operand (size_t index, int is_dual)
+check_cde_operand (size_t idx, int is_dual)
 {
-  unsigned Rx = inst.operands[index].reg;
-  bool isvec = inst.operands[index].isvec;
+  unsigned Rx = inst.operands[idx].reg;
+  bool isvec = inst.operands[idx].isvec;
   if (is_dual == 0 && thumb_mode)
     constraint (
 		!((Rx <= 14 && Rx != 13) || (Rx == REG_PC && isvec)),
@@ -22289,13 +22289,13 @@  do_vdot (void)
       neon_check_type (3, rs, N_EQK, N_EQK, N_BF16 | N_KEY);
 
       inst.instruction |= (1 << 25);
-      int index = inst.operands[2].reg & 0xf;
-      constraint ((index != 1 && index != 0), _("index must be 0 or 1"));
+      int idx = inst.operands[2].reg & 0xf;
+      constraint ((idx != 1 && idx != 0), _("index must be 0 or 1"));
       inst.operands[2].reg >>= 4;
       constraint (!(inst.operands[2].reg < 16),
 		  _("indexed register must be less than 16"));
       neon_three_args (rs == NS_QQS);
-      inst.instruction |= (index << 5);
+      inst.instruction |= (idx << 5);
     }
   else
     {