[2/6,ARC] Allow EX instruction for ARC700 and ARCv2.

Message ID 20180521101839.13288-2-claziss@gmail.com
State New
Headers show
Series
  • [1/6,ARC] Add modes scheduler HS
Related show

Commit Message

Claudiu Zissulescu May 21, 2018, 10:18 a.m.
From: claziss <claziss@synopsys.com>


The EX instruction is base line for both architectures. Reflect this in the compiler.

OK to apply?
Claudiu

gcc/
2017-05-02  Claudiu Zissulescu  <claziss@synopsys.com>

	* config/arc/arc.c (atomic_exchangesi): EX instruction is default
	for ARC700 and ARCv2.
---
 gcc/config/arc/atomic.md | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

-- 
2.14.3

Comments

Andrew Burgess June 12, 2018, 7:31 p.m. | #1
* Claudiu Zissulescu <claziss@gmail.com> [2018-05-21 13:18:35 +0300]:

> From: claziss <claziss@synopsys.com>

> 

> The EX instruction is base line for both architectures. Reflect this in the compiler.

> 

> OK to apply?


Looks good.

Thanks,
Andrew


> Claudiu

> 

> gcc/

> 2017-05-02  Claudiu Zissulescu  <claziss@synopsys.com>

> 

> 	* config/arc/arc.c (atomic_exchangesi): EX instruction is default

> 	for ARC700 and ARCv2.

> ---

>  gcc/config/arc/atomic.md | 2 +-

>  1 file changed, 1 insertion(+), 1 deletion(-)

> 

> diff --git a/gcc/config/arc/atomic.md b/gcc/config/arc/atomic.md

> index 13a2e34549c..4a56ca229cc 100644

> --- a/gcc/config/arc/atomic.md

> +++ b/gcc/config/arc/atomic.md

> @@ -120,7 +120,7 @@

>     (match_operand:SI 1 "mem_noofs_operand" "")

>     (match_operand:SI 2 "register_operand" "")

>     (match_operand:SI 3 "const_int_operand" "")]

> -  "TARGET_ATOMIC"

> +  "TARGET_ARC700 || TARGET_V2"

>  {

>    enum memmodel model = (enum memmodel) INTVAL (operands[3]);

>  

> -- 

> 2.14.3

>
Claudiu Zissulescu June 13, 2018, 8:41 a.m. | #2
Committed. Thank you for your review,
Claudiu
________________________________________
From: Andrew Burgess [andrew.burgess@embecosm.com]

Sent: Tuesday, June 12, 2018 9:31 PM
To: Claudiu Zissulescu
Cc: gcc-patches@gcc.gnu.org; Francois.Bedard@synopsys.com; claziss@synopsys.comq; claziss
Subject: Re: [PATCH 2/6] [ARC] Allow EX instruction for ARC700 and ARCv2.

* Claudiu Zissulescu <claziss@gmail.com> [2018-05-21 13:18:35 +0300]:

> From: claziss <claziss@synopsys.com>

>

> The EX instruction is base line for both architectures. Reflect this in the compiler.

>

> OK to apply?


Looks good.

Thanks,
Andrew


> Claudiu

>

> gcc/

> 2017-05-02  Claudiu Zissulescu  <claziss@synopsys.com>

>

>       * config/arc/arc.c (atomic_exchangesi): EX instruction is default

>       for ARC700 and ARCv2.

> ---

>  gcc/config/arc/atomic.md | 2 +-

>  1 file changed, 1 insertion(+), 1 deletion(-)

>

> diff --git a/gcc/config/arc/atomic.md b/gcc/config/arc/atomic.md

> index 13a2e34549c..4a56ca229cc 100644

> --- a/gcc/config/arc/atomic.md

> +++ b/gcc/config/arc/atomic.md

> @@ -120,7 +120,7 @@

>     (match_operand:SI 1 "mem_noofs_operand" "")

>     (match_operand:SI 2 "register_operand" "")

>     (match_operand:SI 3 "const_int_operand" "")]

> -  "TARGET_ATOMIC"

> +  "TARGET_ARC700 || TARGET_V2"

>  {

>    enum memmodel model = (enum memmodel) INTVAL (operands[3]);

>

> --

> 2.14.3

>

Patch

diff --git a/gcc/config/arc/atomic.md b/gcc/config/arc/atomic.md
index 13a2e34549c..4a56ca229cc 100644
--- a/gcc/config/arc/atomic.md
+++ b/gcc/config/arc/atomic.md
@@ -120,7 +120,7 @@ 
    (match_operand:SI 1 "mem_noofs_operand" "")
    (match_operand:SI 2 "register_operand" "")
    (match_operand:SI 3 "const_int_operand" "")]
-  "TARGET_ATOMIC"
+  "TARGET_ARC700 || TARGET_V2"
 {
   enum memmodel model = (enum memmodel) INTVAL (operands[3]);