[06/31] VAX: Correct fatal issues with the `ffs' builtin

Message ID alpine.LFD.2.21.2011200235410.656242@eddie.linux-mips.org
State New
Headers show
Series
  • VAX: Bring the port up to date (yes, MODE_CC conversion is included)
Related show

Commit Message

Maciej W. Rozycki Nov. 20, 2020, 3:34 a.m.
The `builtins.md' machine description fragment is not included anywhere
and is therefore dead code, which has become bitrotten due to non-use.

If actually enabled, it does not build due to the use of an unknown `t'
constraint:

.../gcc/config/vax/builtins.md:42:1: error: undefined machine-specific constraint at this point: "t"
.../gcc/config/vax/builtins.md:42:1: note:  in operand 1

which came from commit becb93d02cc1 ("builtins.md (ffssi2_internal):
Correct constraint."), which was not applied as posted and reviewed; `T'
was meant to be used instead.

Once this has been fixed this code still fails building:

.../gcc/config/vax/builtins.md: In function 'rtx_def* gen_ffssi2(rtx, rtx)':
.../gcc/config/vax/builtins.md:35:19: error: 'gen_bne' was not declared in this
scope; did you mean 'gen_use'?
   35 |   emit_jump_insn (gen_bne (label));
      |                   ^~~~~~~
      |                   gen_use
make[2]: *** [Makefile:1122: insn-emit.o] Error 1

Finally the FFS machine instruction sets the Z condition code according
to the comparison of the value held in the source operand against zero
rather than the value held in the target operand.  If the source operand
is found hold zero, then the target operand is set to the width of the
source operand, 32 for SImode (FFS supports arbitrary widths).

Correct the build issues then and update RTL to match the operation of
the machine instruction.  A test case will be added separately.

	gcc/
	* config/vax/builtins.md (ffssi2): Make preparation statements
	actually buildable.
	(ffssi2_internal): Fix input constraints; make the RTL pattern
	match reality for `cc0'.
---
 gcc/config/vax/builtins.md | 12 +++++++++---
 1 file changed, 9 insertions(+), 3 deletions(-)

-- 
2.11.0

Comments

Ian Lance Taylor via Gcc-patches Nov. 20, 2020, 11:19 p.m. | #1
On 11/19/20 8:34 PM, Maciej W. Rozycki wrote:
> The `builtins.md' machine description fragment is not included anywhere

> and is therefore dead code, which has become bitrotten due to non-use.

>

> If actually enabled, it does not build due to the use of an unknown `t'

> constraint:

>

> .../gcc/config/vax/builtins.md:42:1: error: undefined machine-specific constraint at this point: "t"

> .../gcc/config/vax/builtins.md:42:1: note:  in operand 1

>

> which came from commit becb93d02cc1 ("builtins.md (ffssi2_internal):

> Correct constraint."), which was not applied as posted and reviewed; `T'

> was meant to be used instead.

>

> Once this has been fixed this code still fails building:

>

> .../gcc/config/vax/builtins.md: In function 'rtx_def* gen_ffssi2(rtx, rtx)':

> .../gcc/config/vax/builtins.md:35:19: error: 'gen_bne' was not declared in this

> scope; did you mean 'gen_use'?

>    35 |   emit_jump_insn (gen_bne (label));

>       |                   ^~~~~~~

>       |                   gen_use

> make[2]: *** [Makefile:1122: insn-emit.o] Error 1

>

> Finally the FFS machine instruction sets the Z condition code according

> to the comparison of the value held in the source operand against zero

> rather than the value held in the target operand.  If the source operand

> is found hold zero, then the target operand is set to the width of the

> source operand, 32 for SImode (FFS supports arbitrary widths).

>

> Correct the build issues then and update RTL to match the operation of

> the machine instruction.  A test case will be added separately.

>

> 	gcc/

> 	* config/vax/builtins.md (ffssi2): Make preparation statements

> 	actually buildable.

> 	(ffssi2_internal): Fix input constraints; make the RTL pattern

> 	match reality for `cc0'.

OK
jeff

Patch

diff --git a/gcc/config/vax/builtins.md b/gcc/config/vax/builtins.md
index ac0e0271ddd..6bce7a85add 100644
--- a/gcc/config/vax/builtins.md
+++ b/gcc/config/vax/builtins.md
@@ -31,8 +31,12 @@  (define_expand "ffssi2"
   "
 {
   rtx label = gen_label_rtx ();
+  rtx label_ref = gen_rtx_LABEL_REF (VOIDmode, label);
+  rtx cond = gen_rtx_NE (VOIDmode, cc0_rtx, const0_rtx);
+  rtx target = gen_rtx_IF_THEN_ELSE (VOIDmode, cond, label_ref, pc_rtx);
+
   emit_insn (gen_ffssi2_internal (operands[0], operands[1]));
-  emit_jump_insn (gen_bne (label));
+  emit_jump_insn (gen_rtx_SET (pc_rtx, target));
   emit_insn (gen_negsi2 (operands[0], const1_rtx));
   emit_label (label);
   emit_insn (gen_addsi3 (operands[0], operands[0], const1_rtx));
@@ -41,8 +45,10 @@  (define_expand "ffssi2"
 
 (define_insn "ffssi2_internal"
   [(set (match_operand:SI 0 "nonimmediate_operand" "=rQ")
-	(ffs:SI (match_operand:SI 1 "general_operand" "nrQt")))
-   (set (cc0) (match_dup 0))]
+	(ffs:SI (match_operand:SI 1 "general_operand" "nrQT")))
+   (set (cc0)
+	(compare (match_dup 1)
+		 (const_int 0)))]
   ""
   "ffs $0,$32,%1,%0")