arm: Remove coercion from scalar argument to vmin & vmax intrinsics

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  • arm: Remove coercion from scalar argument to vmin & vmax intrinsics
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Commit Message

Joe Ramsay Aug. 13, 2020, 1:16 p.m.
From: Joe Ramsay <Joe.Ramsay@arm.com>


Hi,

This patch fixes an issue with vmin* and vmax* intrinsics which accept
a scalar argument. Previously when the scalar was of different width
to the vector elements this would generate __ARM_undef. This change
allows the scalar argument to be implicitly converted to the correct
width. Also tidied up the relevant unit tests, some of which would
have passed even if only one of two or three intrinsic calls had
compiled correctly.

Bootstrapped and tested on arm-none-eabi, gcc and CMSIS_DSP
testsuites are clean. OK for trunk?

Thanks,
Joe

gcc/ChangeLog:

2020-08-10  Joe Ramsay <joe.ramsay@.arm.com>

	* config/arm/arm_mve.h (__arm_vmaxnmavq): Remove coercion of scalar
	argument.
	(__arm_vmaxnmvq): Likewise.
	(__arm_vminnmavq): Likewise.
	(__arm_vminnmvq): Likewise.
	(__arm_vmaxnmavq_p): Likewise.
	(__arm_vmaxnmvq_p): Likewise (and delete duplicate definition).
	(__arm_vminnmavq_p): Likewise.
	(__arm_vminnmvq_p): Likewise.
	(__arm_vmaxavq): Likewise.
	(__arm_vmaxavq_p): Likewise.
	(__arm_vmaxvq): Likewise.
	(__arm_vmaxvq_p): Likewise.
	(__arm_vminavq): Likewise.
	(__arm_vminavq_p): Likewise.
	(__arm_vminvq): Likewise.
	(__arm_vminvq_p): Likewise.

gcc/testsuite/ChangeLog:

2020-08-10  Joe Ramsay <joe.ramsay@.arm.com>

	* gcc.target/arm/mve/intrinsics/vmaxavq_p_s16.c: Add test for mismatched
	width of scalar argument.
	* gcc.target/arm/mve/intrinsics/vmaxavq_p_s32.c: Likewise.
	* gcc.target/arm/mve/intrinsics/vmaxavq_p_s8.c: Likewise.
	* gcc.target/arm/mve/intrinsics/vmaxavq_s16.c: Likewise.
	* gcc.target/arm/mve/intrinsics/vmaxavq_s32.c: Likewise.
	* gcc.target/arm/mve/intrinsics/vmaxavq_s8.c: Likewise.
	* gcc.target/arm/mve/intrinsics/vmaxnmavq_f16.c: Likewise.
	* gcc.target/arm/mve/intrinsics/vmaxnmavq_f32.c: Likewise.
	* gcc.target/arm/mve/intrinsics/vmaxnmavq_p_f16.c: Likewise.
	* gcc.target/arm/mve/intrinsics/vmaxnmavq_p_f32.c: Likewise.
	* gcc.target/arm/mve/intrinsics/vmaxnmvq_f16.c: Likewise.
	* gcc.target/arm/mve/intrinsics/vmaxnmvq_f32.c: Likewise.
	* gcc.target/arm/mve/intrinsics/vmaxnmvq_p_f16.c: Likewise.
	* gcc.target/arm/mve/intrinsics/vmaxnmvq_p_f32.c: Likewise.
	* gcc.target/arm/mve/intrinsics/vmaxvq_p_s16.c: Likewise.
	* gcc.target/arm/mve/intrinsics/vmaxvq_p_s32.c: Likewise.
	* gcc.target/arm/mve/intrinsics/vmaxvq_p_s8.c: Likewise.
	* gcc.target/arm/mve/intrinsics/vmaxvq_p_u16.c: Likewise.
	* gcc.target/arm/mve/intrinsics/vmaxvq_p_u32.c: Likewise.
	* gcc.target/arm/mve/intrinsics/vmaxvq_p_u8.c: Likewise.
	* gcc.target/arm/mve/intrinsics/vmaxvq_s16.c: Likewise.
	* gcc.target/arm/mve/intrinsics/vmaxvq_s32.c: Likewise.
	* gcc.target/arm/mve/intrinsics/vmaxvq_s8.c: Likewise.
	* gcc.target/arm/mve/intrinsics/vmaxvq_u16.c: Likewise.
	* gcc.target/arm/mve/intrinsics/vmaxvq_u32.c: Likewise.
	* gcc.target/arm/mve/intrinsics/vmaxvq_u8.c: Likewise.
	* gcc.target/arm/mve/intrinsics/vminavq_p_s16.c: Likewise.
	* gcc.target/arm/mve/intrinsics/vminavq_p_s32.c: Likewise.
	* gcc.target/arm/mve/intrinsics/vminavq_p_s8.c: Likewise.
	* gcc.target/arm/mve/intrinsics/vminavq_s16.c: Likewise.
	* gcc.target/arm/mve/intrinsics/vminavq_s32.c: Likewise.
	* gcc.target/arm/mve/intrinsics/vminavq_s8.c: Likewise.
	* gcc.target/arm/mve/intrinsics/vminnmavq_f16.c: Likewise.
	* gcc.target/arm/mve/intrinsics/vminnmavq_f32.c: Likewise.
	* gcc.target/arm/mve/intrinsics/vminnmavq_p_f16.c: Likewise.
	* gcc.target/arm/mve/intrinsics/vminnmavq_p_f32.c: Likewise.
	* gcc.target/arm/mve/intrinsics/vminnmvq_f16.c: Likewise.
	* gcc.target/arm/mve/intrinsics/vminnmvq_f32.c: Likewise.
	* gcc.target/arm/mve/intrinsics/vminnmvq_p_f16.c: Likewise.
	* gcc.target/arm/mve/intrinsics/vminnmvq_p_f32.c: Likewise.
	* gcc.target/arm/mve/intrinsics/vminvq_p_s16.c: Likewise.
	* gcc.target/arm/mve/intrinsics/vminvq_p_s32.c: Likewise.
	* gcc.target/arm/mve/intrinsics/vminvq_p_s8.c: Likewise.
	* gcc.target/arm/mve/intrinsics/vminvq_p_u16.c: Likewise.
	* gcc.target/arm/mve/intrinsics/vminvq_p_u32.c: Likewise.
	* gcc.target/arm/mve/intrinsics/vminvq_p_u8.c: Likewise.
	* gcc.target/arm/mve/intrinsics/vminvq_s16.c: Likewise.
	* gcc.target/arm/mve/intrinsics/vminvq_s32.c: Likewise.
	* gcc.target/arm/mve/intrinsics/vminvq_s8.c: Likewise.
	* gcc.target/arm/mve/intrinsics/vminvq_u16.c: Likewise.
	* gcc.target/arm/mve/intrinsics/vminvq_u32.c: Likewise.
	* gcc.target/arm/mve/intrinsics/vminvq_u8.c: Likewise.
---
 gcc/config/arm/arm_mve.h                           | 110 ++++++++++-----------
 .../gcc.target/arm/mve/intrinsics/vmaxavq_p_s16.c  |  11 ++-
 .../gcc.target/arm/mve/intrinsics/vmaxavq_p_s32.c  |  11 ++-
 .../gcc.target/arm/mve/intrinsics/vmaxavq_p_s8.c   |  11 ++-
 .../gcc.target/arm/mve/intrinsics/vmaxavq_s16.c    |  11 ++-
 .../gcc.target/arm/mve/intrinsics/vmaxavq_s32.c    |  11 ++-
 .../gcc.target/arm/mve/intrinsics/vmaxavq_s8.c     |  11 ++-
 .../gcc.target/arm/mve/intrinsics/vmaxnmavq_f16.c  |  11 ++-
 .../gcc.target/arm/mve/intrinsics/vmaxnmavq_f32.c  |  11 ++-
 .../arm/mve/intrinsics/vmaxnmavq_p_f16.c           |  11 ++-
 .../arm/mve/intrinsics/vmaxnmavq_p_f32.c           |  11 ++-
 .../gcc.target/arm/mve/intrinsics/vmaxnmvq_f16.c   |  11 ++-
 .../gcc.target/arm/mve/intrinsics/vmaxnmvq_f32.c   |  11 ++-
 .../gcc.target/arm/mve/intrinsics/vmaxnmvq_p_f16.c |  11 ++-
 .../gcc.target/arm/mve/intrinsics/vmaxnmvq_p_f32.c |  11 ++-
 .../gcc.target/arm/mve/intrinsics/vmaxvq_p_s16.c   |  11 ++-
 .../gcc.target/arm/mve/intrinsics/vmaxvq_p_s32.c   |  11 ++-
 .../gcc.target/arm/mve/intrinsics/vmaxvq_p_s8.c    |  11 ++-
 .../gcc.target/arm/mve/intrinsics/vmaxvq_p_u16.c   |  11 ++-
 .../gcc.target/arm/mve/intrinsics/vmaxvq_p_u32.c   |  11 ++-
 .../gcc.target/arm/mve/intrinsics/vmaxvq_p_u8.c    |  11 ++-
 .../gcc.target/arm/mve/intrinsics/vmaxvq_s16.c     |  11 ++-
 .../gcc.target/arm/mve/intrinsics/vmaxvq_s32.c     |  11 ++-
 .../gcc.target/arm/mve/intrinsics/vmaxvq_s8.c      |  11 ++-
 .../gcc.target/arm/mve/intrinsics/vmaxvq_u16.c     |  11 ++-
 .../gcc.target/arm/mve/intrinsics/vmaxvq_u32.c     |  11 ++-
 .../gcc.target/arm/mve/intrinsics/vmaxvq_u8.c      |  11 ++-
 .../gcc.target/arm/mve/intrinsics/vminavq_p_s16.c  |  11 ++-
 .../gcc.target/arm/mve/intrinsics/vminavq_p_s32.c  |  11 ++-
 .../gcc.target/arm/mve/intrinsics/vminavq_p_s8.c   |  11 ++-
 .../gcc.target/arm/mve/intrinsics/vminavq_s16.c    |  11 ++-
 .../gcc.target/arm/mve/intrinsics/vminavq_s32.c    |  11 ++-
 .../gcc.target/arm/mve/intrinsics/vminavq_s8.c     |  11 ++-
 .../gcc.target/arm/mve/intrinsics/vminnmavq_f16.c  |  11 ++-
 .../gcc.target/arm/mve/intrinsics/vminnmavq_f32.c  |  11 ++-
 .../arm/mve/intrinsics/vminnmavq_p_f16.c           |  11 ++-
 .../arm/mve/intrinsics/vminnmavq_p_f32.c           |  11 ++-
 .../gcc.target/arm/mve/intrinsics/vminnmvq_f16.c   |  11 ++-
 .../gcc.target/arm/mve/intrinsics/vminnmvq_f32.c   |  11 ++-
 .../gcc.target/arm/mve/intrinsics/vminnmvq_p_f16.c |  11 ++-
 .../gcc.target/arm/mve/intrinsics/vminnmvq_p_f32.c |  11 ++-
 .../gcc.target/arm/mve/intrinsics/vminvq_p_s16.c   |  11 ++-
 .../gcc.target/arm/mve/intrinsics/vminvq_p_s32.c   |  11 ++-
 .../gcc.target/arm/mve/intrinsics/vminvq_p_s8.c    |  11 ++-
 .../gcc.target/arm/mve/intrinsics/vminvq_p_u16.c   |  11 ++-
 .../gcc.target/arm/mve/intrinsics/vminvq_p_u32.c   |  11 ++-
 .../gcc.target/arm/mve/intrinsics/vminvq_p_u8.c    |  11 ++-
 .../gcc.target/arm/mve/intrinsics/vminvq_s16.c     |  10 +-
 .../gcc.target/arm/mve/intrinsics/vminvq_s32.c     |  10 +-
 .../gcc.target/arm/mve/intrinsics/vminvq_s8.c      |  10 +-
 .../gcc.target/arm/mve/intrinsics/vminvq_u16.c     |  11 ++-
 .../gcc.target/arm/mve/intrinsics/vminvq_u32.c     |  10 +-
 .../gcc.target/arm/mve/intrinsics/vminvq_u8.c      |  11 ++-
 53 files changed, 516 insertions(+), 162 deletions(-)

-- 
2.7.4

Comments

Jakub Jelinek via Gcc-patches Oct. 2, 2020, 2:13 p.m. | #1
Hi Joe,

> -----Original Message-----

> From: Gcc-patches <gcc-patches-bounces@gcc.gnu.org> On Behalf Of Joe

> Ramsay

> Sent: 13 August 2020 14:16

> To: Joe Ramsay <Joe.Ramsay@arm.com>; gcc-patches@gcc.gnu.org

> Subject: [PATCH] arm: Remove coercion from scalar argument to vmin &

> vmax intrinsics

> 

> From: Joe Ramsay <Joe.Ramsay@arm.com>

> 

> Hi,

> 

> This patch fixes an issue with vmin* and vmax* intrinsics which accept

> a scalar argument. Previously when the scalar was of different width

> to the vector elements this would generate __ARM_undef. This change

> allows the scalar argument to be implicitly converted to the correct

> width. Also tidied up the relevant unit tests, some of which would

> have passed even if only one of two or three intrinsic calls had

> compiled correctly.

> 

> Bootstrapped and tested on arm-none-eabi, gcc and CMSIS_DSP

> testsuites are clean. OK for trunk?


Ok.
Sorry for the delay,
Kyrill

> 

> Thanks,

> Joe

> 

> gcc/ChangeLog:

> 

> 2020-08-10  Joe Ramsay <joe.ramsay@.arm.com>

> 

> 	* config/arm/arm_mve.h (__arm_vmaxnmavq): Remove coercion of

> scalar

> 	argument.

> 	(__arm_vmaxnmvq): Likewise.

> 	(__arm_vminnmavq): Likewise.

> 	(__arm_vminnmvq): Likewise.

> 	(__arm_vmaxnmavq_p): Likewise.

> 	(__arm_vmaxnmvq_p): Likewise (and delete duplicate definition).

> 	(__arm_vminnmavq_p): Likewise.

> 	(__arm_vminnmvq_p): Likewise.

> 	(__arm_vmaxavq): Likewise.

> 	(__arm_vmaxavq_p): Likewise.

> 	(__arm_vmaxvq): Likewise.

> 	(__arm_vmaxvq_p): Likewise.

> 	(__arm_vminavq): Likewise.

> 	(__arm_vminavq_p): Likewise.

> 	(__arm_vminvq): Likewise.

> 	(__arm_vminvq_p): Likewise.

> 

> gcc/testsuite/ChangeLog:

> 

> 2020-08-10  Joe Ramsay <joe.ramsay@.arm.com>

> 

> 	* gcc.target/arm/mve/intrinsics/vmaxavq_p_s16.c: Add test for

> mismatched

> 	width of scalar argument.

> 	* gcc.target/arm/mve/intrinsics/vmaxavq_p_s32.c: Likewise.

> 	* gcc.target/arm/mve/intrinsics/vmaxavq_p_s8.c: Likewise.

> 	* gcc.target/arm/mve/intrinsics/vmaxavq_s16.c: Likewise.

> 	* gcc.target/arm/mve/intrinsics/vmaxavq_s32.c: Likewise.

> 	* gcc.target/arm/mve/intrinsics/vmaxavq_s8.c: Likewise.

> 	* gcc.target/arm/mve/intrinsics/vmaxnmavq_f16.c: Likewise.

> 	* gcc.target/arm/mve/intrinsics/vmaxnmavq_f32.c: Likewise.

> 	* gcc.target/arm/mve/intrinsics/vmaxnmavq_p_f16.c: Likewise.

> 	* gcc.target/arm/mve/intrinsics/vmaxnmavq_p_f32.c: Likewise.

> 	* gcc.target/arm/mve/intrinsics/vmaxnmvq_f16.c: Likewise.

> 	* gcc.target/arm/mve/intrinsics/vmaxnmvq_f32.c: Likewise.

> 	* gcc.target/arm/mve/intrinsics/vmaxnmvq_p_f16.c: Likewise.

> 	* gcc.target/arm/mve/intrinsics/vmaxnmvq_p_f32.c: Likewise.

> 	* gcc.target/arm/mve/intrinsics/vmaxvq_p_s16.c: Likewise.

> 	* gcc.target/arm/mve/intrinsics/vmaxvq_p_s32.c: Likewise.

> 	* gcc.target/arm/mve/intrinsics/vmaxvq_p_s8.c: Likewise.

> 	* gcc.target/arm/mve/intrinsics/vmaxvq_p_u16.c: Likewise.

> 	* gcc.target/arm/mve/intrinsics/vmaxvq_p_u32.c: Likewise.

> 	* gcc.target/arm/mve/intrinsics/vmaxvq_p_u8.c: Likewise.

> 	* gcc.target/arm/mve/intrinsics/vmaxvq_s16.c: Likewise.

> 	* gcc.target/arm/mve/intrinsics/vmaxvq_s32.c: Likewise.

> 	* gcc.target/arm/mve/intrinsics/vmaxvq_s8.c: Likewise.

> 	* gcc.target/arm/mve/intrinsics/vmaxvq_u16.c: Likewise.

> 	* gcc.target/arm/mve/intrinsics/vmaxvq_u32.c: Likewise.

> 	* gcc.target/arm/mve/intrinsics/vmaxvq_u8.c: Likewise.

> 	* gcc.target/arm/mve/intrinsics/vminavq_p_s16.c: Likewise.

> 	* gcc.target/arm/mve/intrinsics/vminavq_p_s32.c: Likewise.

> 	* gcc.target/arm/mve/intrinsics/vminavq_p_s8.c: Likewise.

> 	* gcc.target/arm/mve/intrinsics/vminavq_s16.c: Likewise.

> 	* gcc.target/arm/mve/intrinsics/vminavq_s32.c: Likewise.

> 	* gcc.target/arm/mve/intrinsics/vminavq_s8.c: Likewise.

> 	* gcc.target/arm/mve/intrinsics/vminnmavq_f16.c: Likewise.

> 	* gcc.target/arm/mve/intrinsics/vminnmavq_f32.c: Likewise.

> 	* gcc.target/arm/mve/intrinsics/vminnmavq_p_f16.c: Likewise.

> 	* gcc.target/arm/mve/intrinsics/vminnmavq_p_f32.c: Likewise.

> 	* gcc.target/arm/mve/intrinsics/vminnmvq_f16.c: Likewise.

> 	* gcc.target/arm/mve/intrinsics/vminnmvq_f32.c: Likewise.

> 	* gcc.target/arm/mve/intrinsics/vminnmvq_p_f16.c: Likewise.

> 	* gcc.target/arm/mve/intrinsics/vminnmvq_p_f32.c: Likewise.

> 	* gcc.target/arm/mve/intrinsics/vminvq_p_s16.c: Likewise.

> 	* gcc.target/arm/mve/intrinsics/vminvq_p_s32.c: Likewise.

> 	* gcc.target/arm/mve/intrinsics/vminvq_p_s8.c: Likewise.

> 	* gcc.target/arm/mve/intrinsics/vminvq_p_u16.c: Likewise.

> 	* gcc.target/arm/mve/intrinsics/vminvq_p_u32.c: Likewise.

> 	* gcc.target/arm/mve/intrinsics/vminvq_p_u8.c: Likewise.

> 	* gcc.target/arm/mve/intrinsics/vminvq_s16.c: Likewise.

> 	* gcc.target/arm/mve/intrinsics/vminvq_s32.c: Likewise.

> 	* gcc.target/arm/mve/intrinsics/vminvq_s8.c: Likewise.

> 	* gcc.target/arm/mve/intrinsics/vminvq_u16.c: Likewise.

> 	* gcc.target/arm/mve/intrinsics/vminvq_u32.c: Likewise.

> 	* gcc.target/arm/mve/intrinsics/vminvq_u8.c: Likewise.

> ---

>  gcc/config/arm/arm_mve.h                           | 110 ++++++++++-----------

>  .../gcc.target/arm/mve/intrinsics/vmaxavq_p_s16.c  |  11 ++-

>  .../gcc.target/arm/mve/intrinsics/vmaxavq_p_s32.c  |  11 ++-

>  .../gcc.target/arm/mve/intrinsics/vmaxavq_p_s8.c   |  11 ++-

>  .../gcc.target/arm/mve/intrinsics/vmaxavq_s16.c    |  11 ++-

>  .../gcc.target/arm/mve/intrinsics/vmaxavq_s32.c    |  11 ++-

>  .../gcc.target/arm/mve/intrinsics/vmaxavq_s8.c     |  11 ++-

>  .../gcc.target/arm/mve/intrinsics/vmaxnmavq_f16.c  |  11 ++-

>  .../gcc.target/arm/mve/intrinsics/vmaxnmavq_f32.c  |  11 ++-

>  .../arm/mve/intrinsics/vmaxnmavq_p_f16.c           |  11 ++-

>  .../arm/mve/intrinsics/vmaxnmavq_p_f32.c           |  11 ++-

>  .../gcc.target/arm/mve/intrinsics/vmaxnmvq_f16.c   |  11 ++-

>  .../gcc.target/arm/mve/intrinsics/vmaxnmvq_f32.c   |  11 ++-

>  .../gcc.target/arm/mve/intrinsics/vmaxnmvq_p_f16.c |  11 ++-

>  .../gcc.target/arm/mve/intrinsics/vmaxnmvq_p_f32.c |  11 ++-

>  .../gcc.target/arm/mve/intrinsics/vmaxvq_p_s16.c   |  11 ++-

>  .../gcc.target/arm/mve/intrinsics/vmaxvq_p_s32.c   |  11 ++-

>  .../gcc.target/arm/mve/intrinsics/vmaxvq_p_s8.c    |  11 ++-

>  .../gcc.target/arm/mve/intrinsics/vmaxvq_p_u16.c   |  11 ++-

>  .../gcc.target/arm/mve/intrinsics/vmaxvq_p_u32.c   |  11 ++-

>  .../gcc.target/arm/mve/intrinsics/vmaxvq_p_u8.c    |  11 ++-

>  .../gcc.target/arm/mve/intrinsics/vmaxvq_s16.c     |  11 ++-

>  .../gcc.target/arm/mve/intrinsics/vmaxvq_s32.c     |  11 ++-

>  .../gcc.target/arm/mve/intrinsics/vmaxvq_s8.c      |  11 ++-

>  .../gcc.target/arm/mve/intrinsics/vmaxvq_u16.c     |  11 ++-

>  .../gcc.target/arm/mve/intrinsics/vmaxvq_u32.c     |  11 ++-

>  .../gcc.target/arm/mve/intrinsics/vmaxvq_u8.c      |  11 ++-

>  .../gcc.target/arm/mve/intrinsics/vminavq_p_s16.c  |  11 ++-

>  .../gcc.target/arm/mve/intrinsics/vminavq_p_s32.c  |  11 ++-

>  .../gcc.target/arm/mve/intrinsics/vminavq_p_s8.c   |  11 ++-

>  .../gcc.target/arm/mve/intrinsics/vminavq_s16.c    |  11 ++-

>  .../gcc.target/arm/mve/intrinsics/vminavq_s32.c    |  11 ++-

>  .../gcc.target/arm/mve/intrinsics/vminavq_s8.c     |  11 ++-

>  .../gcc.target/arm/mve/intrinsics/vminnmavq_f16.c  |  11 ++-

>  .../gcc.target/arm/mve/intrinsics/vminnmavq_f32.c  |  11 ++-

>  .../arm/mve/intrinsics/vminnmavq_p_f16.c           |  11 ++-

>  .../arm/mve/intrinsics/vminnmavq_p_f32.c           |  11 ++-

>  .../gcc.target/arm/mve/intrinsics/vminnmvq_f16.c   |  11 ++-

>  .../gcc.target/arm/mve/intrinsics/vminnmvq_f32.c   |  11 ++-

>  .../gcc.target/arm/mve/intrinsics/vminnmvq_p_f16.c |  11 ++-

>  .../gcc.target/arm/mve/intrinsics/vminnmvq_p_f32.c |  11 ++-

>  .../gcc.target/arm/mve/intrinsics/vminvq_p_s16.c   |  11 ++-

>  .../gcc.target/arm/mve/intrinsics/vminvq_p_s32.c   |  11 ++-

>  .../gcc.target/arm/mve/intrinsics/vminvq_p_s8.c    |  11 ++-

>  .../gcc.target/arm/mve/intrinsics/vminvq_p_u16.c   |  11 ++-

>  .../gcc.target/arm/mve/intrinsics/vminvq_p_u32.c   |  11 ++-

>  .../gcc.target/arm/mve/intrinsics/vminvq_p_u8.c    |  11 ++-

>  .../gcc.target/arm/mve/intrinsics/vminvq_s16.c     |  10 +-

>  .../gcc.target/arm/mve/intrinsics/vminvq_s32.c     |  10 +-

>  .../gcc.target/arm/mve/intrinsics/vminvq_s8.c      |  10 +-

>  .../gcc.target/arm/mve/intrinsics/vminvq_u16.c     |  11 ++-

>  .../gcc.target/arm/mve/intrinsics/vminvq_u32.c     |  10 +-

>  .../gcc.target/arm/mve/intrinsics/vminvq_u8.c      |  11 ++-

>  53 files changed, 516 insertions(+), 162 deletions(-)

> 

> diff --git a/gcc/config/arm/arm_mve.h b/gcc/config/arm/arm_mve.h

> index a801705..e1de877 100644

> --- a/gcc/config/arm/arm_mve.h

> +++ b/gcc/config/arm/arm_mve.h

> @@ -36179,8 +36179,8 @@ extern void *__ARM_undef;

>  #define __arm_vmaxnmavq(p0,p1) ({ __typeof(p0) __p0 = (p0); \

>    __typeof(p1) __p1 = (p1); \

>    _Generic( (int (*)[__ARM_mve_typeid(__p0)][__ARM_mve_typeid(__p1)])0,

> \

> -  int (*)[__ARM_mve_type_fp_n][__ARM_mve_type_float16x8_t]:

> __arm_vmaxnmavq_f16 (__ARM_mve_coerce(__p0, float16_t),

> __ARM_mve_coerce(__p1, float16x8_t)), \

> -  int (*)[__ARM_mve_type_fp_n][__ARM_mve_type_float32x4_t]:

> __arm_vmaxnmavq_f32 (__ARM_mve_coerce(__p0, float32_t),

> __ARM_mve_coerce(__p1, float32x4_t)));})

> +  int (*)[__ARM_mve_type_fp_n][__ARM_mve_type_float16x8_t]:

> __arm_vmaxnmavq_f16 (__p0, __ARM_mve_coerce(__p1, float16x8_t)), \

> +  int (*)[__ARM_mve_type_fp_n][__ARM_mve_type_float32x4_t]:

> __arm_vmaxnmavq_f32 (__p0, __ARM_mve_coerce(__p1, float32x4_t)));})

> 

>  #define __arm_vmaxnmq(p0,p1) ({ __typeof(p0) __p0 = (p0); \

>    __typeof(p1) __p1 = (p1); \

> @@ -36191,14 +36191,8 @@ extern void *__ARM_undef;

>  #define __arm_vmaxnmvq(p0,p1) ({ __typeof(p0) __p0 = (p0); \

>    __typeof(p1) __p1 = (p1); \

>    _Generic( (int (*)[__ARM_mve_typeid(__p0)][__ARM_mve_typeid(__p1)])0,

> \

> -  int (*)[__ARM_mve_type_fp_n][__ARM_mve_type_float16x8_t]:

> __arm_vmaxnmvq_f16 (__ARM_mve_coerce(__p0, float16_t),

> __ARM_mve_coerce(__p1, float16x8_t)), \

> -  int (*)[__ARM_mve_type_fp_n][__ARM_mve_type_float32x4_t]:

> __arm_vmaxnmvq_f32 (__ARM_mve_coerce(__p0, float32_t),

> __ARM_mve_coerce(__p1, float32x4_t)));})

> -

> -#define __arm_vmaxnmvq(p0,p1) ({ __typeof(p0) __p0 = (p0); \

> -  __typeof(p1) __p1 = (p1); \

> -  _Generic( (int (*)[__ARM_mve_typeid(__p0)][__ARM_mve_typeid(__p1)])0,

> \

> -  int (*)[__ARM_mve_type_fp_n][__ARM_mve_type_float16x8_t]:

> __arm_vmaxnmvq_f16 (__ARM_mve_coerce(__p0, float16_t),

> __ARM_mve_coerce(__p1, float16x8_t)), \

> -  int (*)[__ARM_mve_type_fp_n][__ARM_mve_type_float32x4_t]:

> __arm_vmaxnmvq_f32 (__ARM_mve_coerce(__p0, float32_t),

> __ARM_mve_coerce(__p1, float32x4_t)));})

> +  int (*)[__ARM_mve_type_fp_n][__ARM_mve_type_float16x8_t]:

> __arm_vmaxnmvq_f16 (__p0, __ARM_mve_coerce(__p1, float16x8_t)), \

> +  int (*)[__ARM_mve_type_fp_n][__ARM_mve_type_float32x4_t]:

> __arm_vmaxnmvq_f32 (__p0, __ARM_mve_coerce(__p1, float32x4_t)));})

> 

>  #define __arm_vminnmaq(p0,p1) ({ __typeof(p0) __p0 = (p0); \

>    __typeof(p1) __p1 = (p1); \

> @@ -36209,8 +36203,8 @@ extern void *__ARM_undef;

>  #define __arm_vminnmavq(p0,p1) ({ __typeof(p0) __p0 = (p0); \

>    __typeof(p1) __p1 = (p1); \

>    _Generic( (int (*)[__ARM_mve_typeid(__p0)][__ARM_mve_typeid(__p1)])0,

> \

> -  int (*)[__ARM_mve_type_fp_n][__ARM_mve_type_float16x8_t]:

> __arm_vminnmavq_f16 (__ARM_mve_coerce(__p0, float16_t),

> __ARM_mve_coerce(__p1, float16x8_t)), \

> -  int (*)[__ARM_mve_type_fp_n][__ARM_mve_type_float32x4_t]:

> __arm_vminnmavq_f32 (__ARM_mve_coerce(__p0, float32_t),

> __ARM_mve_coerce(__p1, float32x4_t)));})

> +  int (*)[__ARM_mve_type_fp_n][__ARM_mve_type_float16x8_t]:

> __arm_vminnmavq_f16 (__p0, __ARM_mve_coerce(__p1, float16x8_t)), \

> +  int (*)[__ARM_mve_type_fp_n][__ARM_mve_type_float32x4_t]:

> __arm_vminnmavq_f32 (__p0, __ARM_mve_coerce(__p1, float32x4_t)));})

> 

>  #define __arm_vbrsrq(p0,p1) ({ __typeof(p0) __p0 = (p0); \

>    _Generic( (int (*)[__ARM_mve_typeid(__p0)])0, \

> @@ -36252,8 +36246,8 @@ extern void *__ARM_undef;

>  #define __arm_vminnmvq(p0,p1) ({ __typeof(p0) __p0 = (p0); \

>    __typeof(p1) __p1 = (p1); \

>    _Generic( (int (*)[__ARM_mve_typeid(__p0)][__ARM_mve_typeid(__p1)])0,

> \

> -  int (*)[__ARM_mve_type_fp_n][__ARM_mve_type_float16x8_t]:

> __arm_vminnmvq_f16 (__ARM_mve_coerce(__p0, float16_t),

> __ARM_mve_coerce(__p1, float16x8_t)), \

> -  int (*)[__ARM_mve_type_fp_n][__ARM_mve_type_float32x4_t]:

> __arm_vminnmvq_f32 (__ARM_mve_coerce(__p0, float32_t),

> __ARM_mve_coerce(__p1, float32x4_t)));})

> +  int (*)[__ARM_mve_type_fp_n][__ARM_mve_type_float16x8_t]:

> __arm_vminnmvq_f16 (__p0, __ARM_mve_coerce(__p1, float16x8_t)), \

> +  int (*)[__ARM_mve_type_fp_n][__ARM_mve_type_float32x4_t]:

> __arm_vminnmvq_f32 (__p0, __ARM_mve_coerce(__p1, float32x4_t)));})

> 

>  #define __arm_vshlq_r(p0,p1) ({ __typeof(p0) __p0 = (p0); \

>    _Generic( (int (*)[__ARM_mve_typeid(__p0)])0, \

> @@ -37156,14 +37150,14 @@ extern void *__ARM_undef;

>  #define __arm_vmaxnmavq_p(p0,p1,p2) ({ __typeof(p0) __p0 = (p0); \

>    __typeof(p1) __p1 = (p1); \

>    _Generic( (int (*)[__ARM_mve_typeid(__p0)][__ARM_mve_typeid(__p1)])0,

> \

> -  int (*)[__ARM_mve_type_fp_n][__ARM_mve_type_float16x8_t]:

> __arm_vmaxnmavq_p_f16 (__ARM_mve_coerce(__p0, float16_t),

> __ARM_mve_coerce(__p1, float16x8_t), p2), \

> -  int (*)[__ARM_mve_type_fp_n][__ARM_mve_type_float32x4_t]:

> __arm_vmaxnmavq_p_f32 (__ARM_mve_coerce(__p0, float32_t),

> __ARM_mve_coerce(__p1, float32x4_t), p2));})

> +  int (*)[__ARM_mve_type_fp_n][__ARM_mve_type_float16x8_t]:

> __arm_vmaxnmavq_p_f16 (__p0, __ARM_mve_coerce(__p1, float16x8_t),

> p2), \

> +  int (*)[__ARM_mve_type_fp_n][__ARM_mve_type_float32x4_t]:

> __arm_vmaxnmavq_p_f32 (__p0, __ARM_mve_coerce(__p1, float32x4_t),

> p2));})

> 

>  #define __arm_vmaxnmvq_p(p0,p1,p2) ({ __typeof(p0) __p0 = (p0); \

>    __typeof(p1) __p1 = (p1); \

>    _Generic( (int (*)[__ARM_mve_typeid(__p0)][__ARM_mve_typeid(__p1)])0,

> \

> -  int (*)[__ARM_mve_type_fp_n][__ARM_mve_type_float16x8_t]:

> __arm_vmaxnmvq_p_f16 (__ARM_mve_coerce(__p0, float16_t),

> __ARM_mve_coerce(__p1, float16x8_t), p2), \

> -  int (*)[__ARM_mve_type_fp_n][__ARM_mve_type_float32x4_t]:

> __arm_vmaxnmvq_p_f32 (__ARM_mve_coerce(__p0, float32_t),

> __ARM_mve_coerce(__p1, float32x4_t), p2));})

> +  int (*)[__ARM_mve_type_fp_n][__ARM_mve_type_float16x8_t]:

> __arm_vmaxnmvq_p_f16 (__p0, __ARM_mve_coerce(__p1, float16x8_t),

> p2), \

> +  int (*)[__ARM_mve_type_fp_n][__ARM_mve_type_float32x4_t]:

> __arm_vmaxnmvq_p_f32 (__p0, __ARM_mve_coerce(__p1, float32x4_t),

> p2));})

> 

>  #define __arm_vminnmaq_m(p0,p1,p2) ({ __typeof(p0) __p0 = (p0); \

>    __typeof(p1) __p1 = (p1); \

> @@ -37174,14 +37168,14 @@ extern void *__ARM_undef;

>  #define __arm_vminnmavq_p(p0,p1,p2) ({ __typeof(p0) __p0 = (p0); \

>    __typeof(p1) __p1 = (p1); \

>    _Generic( (int (*)[__ARM_mve_typeid(__p0)][__ARM_mve_typeid(__p1)])0,

> \

> -  int (*)[__ARM_mve_type_fp_n][__ARM_mve_type_float16x8_t]:

> __arm_vminnmavq_p_f16 (__ARM_mve_coerce(__p0, float16_t),

> __ARM_mve_coerce(__p1, float16x8_t), p2), \

> -  int (*)[__ARM_mve_type_fp_n][__ARM_mve_type_float32x4_t]:

> __arm_vminnmavq_p_f32 (__ARM_mve_coerce(__p0, float32_t),

> __ARM_mve_coerce(__p1, float32x4_t), p2));})

> +  int (*)[__ARM_mve_type_fp_n][__ARM_mve_type_float16x8_t]:

> __arm_vminnmavq_p_f16 (__p0, __ARM_mve_coerce(__p1, float16x8_t),

> p2), \

> +  int (*)[__ARM_mve_type_fp_n][__ARM_mve_type_float32x4_t]:

> __arm_vminnmavq_p_f32 (__p0, __ARM_mve_coerce(__p1, float32x4_t),

> p2));})

> 

>  #define __arm_vminnmvq_p(p0,p1,p2) ({ __typeof(p0) __p0 = (p0); \

>    __typeof(p1) __p1 = (p1); \

>    _Generic( (int (*)[__ARM_mve_typeid(__p0)][__ARM_mve_typeid(__p1)])0,

> \

> -  int (*)[__ARM_mve_type_fp_n][__ARM_mve_type_float16x8_t]:

> __arm_vminnmvq_p_f16 (__ARM_mve_coerce(__p0, float16_t),

> __ARM_mve_coerce(__p1, float16x8_t), p2), \

> -  int (*)[__ARM_mve_type_fp_n][__ARM_mve_type_float32x4_t]:

> __arm_vminnmvq_p_f32 (__ARM_mve_coerce(__p0, float32_t),

> __ARM_mve_coerce(__p1, float32x4_t), p2));})

> +  int (*)[__ARM_mve_type_fp_n][__ARM_mve_type_float16x8_t]:

> __arm_vminnmvq_p_f16 (__p0, __ARM_mve_coerce(__p1, float16x8_t), p2),

> \

> +  int (*)[__ARM_mve_type_fp_n][__ARM_mve_type_float32x4_t]:

> __arm_vminnmvq_p_f32 (__p0, __ARM_mve_coerce(__p1, float32x4_t),

> p2));})

> 

>  #define __arm_vrndnq_m(p0,p1,p2) ({ __typeof(p0) __p0 = (p0); \

>    __typeof(p1) __p1 = (p1); \

> @@ -41679,16 +41673,16 @@ extern void *__ARM_undef;

>  #define __arm_vmaxavq(p0,p1) ({ __typeof(p0) __p0 = (p0); \

>    __typeof(p1) __p1 = (p1); \

>    _Generic( (int (*)[__ARM_mve_typeid(__p0)][__ARM_mve_typeid(__p1)])0,

> \

> -  int (*)[__ARM_mve_type_int_n][__ARM_mve_type_int8x16_t]:

> __arm_vmaxavq_s8 (__ARM_mve_coerce(__p0, uint8_t),

> __ARM_mve_coerce(__p1, int8x16_t)), \

> -  int (*)[__ARM_mve_type_int_n][__ARM_mve_type_int16x8_t]:

> __arm_vmaxavq_s16 (__ARM_mve_coerce(__p0, uint16_t),

> __ARM_mve_coerce(__p1, int16x8_t)), \

> -  int (*)[__ARM_mve_type_int_n][__ARM_mve_type_int32x4_t]:

> __arm_vmaxavq_s32 (__ARM_mve_coerce(__p0, uint32_t),

> __ARM_mve_coerce(__p1, int32x4_t)));})

> +  int (*)[__ARM_mve_type_int_n][__ARM_mve_type_int8x16_t]:

> __arm_vmaxavq_s8 (__p0, __ARM_mve_coerce(__p1, int8x16_t)), \

> +  int (*)[__ARM_mve_type_int_n][__ARM_mve_type_int16x8_t]:

> __arm_vmaxavq_s16 (__p0, __ARM_mve_coerce(__p1, int16x8_t)), \

> +  int (*)[__ARM_mve_type_int_n][__ARM_mve_type_int32x4_t]:

> __arm_vmaxavq_s32 (__p0, __ARM_mve_coerce(__p1, int32x4_t)));})

> 

>  #define __arm_vmaxavq_p(p0,p1,p2) ({ __typeof(p0) __p0 = (p0); \

>    __typeof(p1) __p1 = (p1); \

>    _Generic( (int (*)[__ARM_mve_typeid(__p0)][__ARM_mve_typeid(__p1)])0,

> \

> -  int (*)[__ARM_mve_type_int_n][__ARM_mve_type_int8x16_t]:

> __arm_vmaxavq_p_s8 (__ARM_mve_coerce(__p0, uint8_t),

> __ARM_mve_coerce(__p1, int8x16_t), p2), \

> -  int (*)[__ARM_mve_type_int_n][__ARM_mve_type_int16x8_t]:

> __arm_vmaxavq_p_s16 (__ARM_mve_coerce(__p0, uint16_t),

> __ARM_mve_coerce(__p1, int16x8_t), p2), \

> -  int (*)[__ARM_mve_type_int_n][__ARM_mve_type_int32x4_t]:

> __arm_vmaxavq_p_s32 (__ARM_mve_coerce(__p0, uint32_t),

> __ARM_mve_coerce(__p1, int32x4_t), p2));})

> +  int (*)[__ARM_mve_type_int_n][__ARM_mve_type_int8x16_t]:

> __arm_vmaxavq_p_s8 (__p0, __ARM_mve_coerce(__p1, int8x16_t), p2), \

> +  int (*)[__ARM_mve_type_int_n][__ARM_mve_type_int16x8_t]:

> __arm_vmaxavq_p_s16 (__p0, __ARM_mve_coerce(__p1, int16x8_t), p2), \

> +  int (*)[__ARM_mve_type_int_n][__ARM_mve_type_int32x4_t]:

> __arm_vmaxavq_p_s32 (__p0, __ARM_mve_coerce(__p1, int32x4_t), p2));})

> 

>  #define __arm_vmaxq_x(p1,p2,p3) ({ __typeof(p1) __p1 = (p1); \

>    __typeof(p2) __p2 = (p2); \

> @@ -41703,36 +41697,36 @@ extern void *__ARM_undef;

>  #define __arm_vmaxvq(p0,p1) ({ __typeof(p0) __p0 = (p0); \

>    __typeof(p1) __p1 = (p1); \

>    _Generic( (int (*)[__ARM_mve_typeid(__p0)][__ARM_mve_typeid(__p1)])0,

> \

> -  int (*)[__ARM_mve_type_int_n][__ARM_mve_type_int8x16_t]:

> __arm_vmaxvq_s8 (__ARM_mve_coerce(__p0, int8_t),

> __ARM_mve_coerce(__p1, int8x16_t)), \

> -  int (*)[__ARM_mve_type_int_n][__ARM_mve_type_int16x8_t]:

> __arm_vmaxvq_s16 (__ARM_mve_coerce(__p0, int16_t),

> __ARM_mve_coerce(__p1, int16x8_t)), \

> -  int (*)[__ARM_mve_type_int_n][__ARM_mve_type_int32x4_t]:

> __arm_vmaxvq_s32 (__ARM_mve_coerce(__p0, int32_t),

> __ARM_mve_coerce(__p1, int32x4_t)), \

> -  int (*)[__ARM_mve_type_int_n][__ARM_mve_type_uint8x16_t]:

> __arm_vmaxvq_u8 (__ARM_mve_coerce(__p0, uint8_t),

> __ARM_mve_coerce(__p1, uint8x16_t)), \

> -  int (*)[__ARM_mve_type_int_n][__ARM_mve_type_uint16x8_t]:

> __arm_vmaxvq_u16 (__ARM_mve_coerce(__p0, uint16_t),

> __ARM_mve_coerce(__p1, uint16x8_t)), \

> -  int (*)[__ARM_mve_type_int_n][__ARM_mve_type_uint32x4_t]:

> __arm_vmaxvq_u32 (__ARM_mve_coerce(__p0, uint32_t),

> __ARM_mve_coerce(__p1, uint32x4_t)));})

> +  int (*)[__ARM_mve_type_int_n][__ARM_mve_type_int8x16_t]:

> __arm_vmaxvq_s8 (__p0, __ARM_mve_coerce(__p1, int8x16_t)), \

> +  int (*)[__ARM_mve_type_int_n][__ARM_mve_type_int16x8_t]:

> __arm_vmaxvq_s16 (__p0, __ARM_mve_coerce(__p1, int16x8_t)), \

> +  int (*)[__ARM_mve_type_int_n][__ARM_mve_type_int32x4_t]:

> __arm_vmaxvq_s32 (__p0, __ARM_mve_coerce(__p1, int32x4_t)), \

> +  int (*)[__ARM_mve_type_int_n][__ARM_mve_type_uint8x16_t]:

> __arm_vmaxvq_u8 (__p0, __ARM_mve_coerce(__p1, uint8x16_t)), \

> +  int (*)[__ARM_mve_type_int_n][__ARM_mve_type_uint16x8_t]:

> __arm_vmaxvq_u16 (__p0, __ARM_mve_coerce(__p1, uint16x8_t)), \

> +  int (*)[__ARM_mve_type_int_n][__ARM_mve_type_uint32x4_t]:

> __arm_vmaxvq_u32 (__p0,__ARM_mve_coerce(__p1, uint32x4_t)));})

> 

>  #define __arm_vmaxvq_p(p0,p1,p2) ({ __typeof(p0) __p0 = (p0); \

>    __typeof(p1) __p1 = (p1); \

>    _Generic( (int (*)[__ARM_mve_typeid(__p0)][__ARM_mve_typeid(__p1)])0,

> \

> -  int (*)[__ARM_mve_type_int_n][__ARM_mve_type_int8x16_t]:

> __arm_vmaxvq_p_s8 (__ARM_mve_coerce(__p0, int8_t),

> __ARM_mve_coerce(__p1, int8x16_t), p2), \

> -  int (*)[__ARM_mve_type_int_n][__ARM_mve_type_int16x8_t]:

> __arm_vmaxvq_p_s16 (__ARM_mve_coerce(__p0, int16_t),

> __ARM_mve_coerce(__p1, int16x8_t), p2), \

> -  int (*)[__ARM_mve_type_int_n][__ARM_mve_type_int32x4_t]:

> __arm_vmaxvq_p_s32 (__ARM_mve_coerce(__p0, int32_t),

> __ARM_mve_coerce(__p1, int32x4_t), p2), \

> -  int (*)[__ARM_mve_type_int_n][__ARM_mve_type_uint8x16_t]:

> __arm_vmaxvq_p_u8 (__ARM_mve_coerce(__p0, uint8_t),

> __ARM_mve_coerce(__p1, uint8x16_t), p2), \

> -  int (*)[__ARM_mve_type_int_n][__ARM_mve_type_uint16x8_t]:

> __arm_vmaxvq_p_u16 (__ARM_mve_coerce(__p0, uint16_t),

> __ARM_mve_coerce(__p1, uint16x8_t), p2), \

> -  int (*)[__ARM_mve_type_int_n][__ARM_mve_type_uint32x4_t]:

> __arm_vmaxvq_p_u32 (__ARM_mve_coerce(__p0, uint32_t),

> __ARM_mve_coerce(__p1, uint32x4_t), p2));})

> +  int (*)[__ARM_mve_type_int_n][__ARM_mve_type_int8x16_t]:

> __arm_vmaxvq_p_s8 (__p0, __ARM_mve_coerce(__p1, int8x16_t), p2), \

> +  int (*)[__ARM_mve_type_int_n][__ARM_mve_type_int16x8_t]:

> __arm_vmaxvq_p_s16 (__p0, __ARM_mve_coerce(__p1, int16x8_t), p2), \

> +  int (*)[__ARM_mve_type_int_n][__ARM_mve_type_int32x4_t]:

> __arm_vmaxvq_p_s32 (__p0, __ARM_mve_coerce(__p1, int32x4_t), p2), \

> +  int (*)[__ARM_mve_type_int_n][__ARM_mve_type_uint8x16_t]:

> __arm_vmaxvq_p_u8 (__p0, __ARM_mve_coerce(__p1, uint8x16_t), p2), \

> +  int (*)[__ARM_mve_type_int_n][__ARM_mve_type_uint16x8_t]:

> __arm_vmaxvq_p_u16 (__p0, __ARM_mve_coerce(__p1, uint16x8_t), p2), \

> +  int (*)[__ARM_mve_type_int_n][__ARM_mve_type_uint32x4_t]:

> __arm_vmaxvq_p_u32 (__p0, __ARM_mve_coerce(__p1, uint32x4_t), p2));})

> 

>  #define __arm_vminavq(p0,p1) ({ __typeof(p0) __p0 = (p0); \

>    __typeof(p1) __p1 = (p1); \

>    _Generic( (int (*)[__ARM_mve_typeid(__p0)][__ARM_mve_typeid(__p1)])0,

> \

> -  int (*)[__ARM_mve_type_int_n][__ARM_mve_type_int8x16_t]:

> __arm_vminavq_s8 (__ARM_mve_coerce(__p0, uint8_t),

> __ARM_mve_coerce(__p1, int8x16_t)), \

> -  int (*)[__ARM_mve_type_int_n][__ARM_mve_type_int16x8_t]:

> __arm_vminavq_s16 (__ARM_mve_coerce(__p0, uint16_t),

> __ARM_mve_coerce(__p1, int16x8_t)), \

> -  int (*)[__ARM_mve_type_int_n][__ARM_mve_type_int32x4_t]:

> __arm_vminavq_s32 (__ARM_mve_coerce(__p0, uint32_t),

> __ARM_mve_coerce(__p1, int32x4_t)));})

> +  int (*)[__ARM_mve_type_int_n][__ARM_mve_type_int8x16_t]:

> __arm_vminavq_s8 (__p0, __ARM_mve_coerce(__p1, int8x16_t)), \

> +  int (*)[__ARM_mve_type_int_n][__ARM_mve_type_int16x8_t]:

> __arm_vminavq_s16 (__p0, __ARM_mve_coerce(__p1, int16x8_t)), \

> +  int (*)[__ARM_mve_type_int_n][__ARM_mve_type_int32x4_t]:

> __arm_vminavq_s32 (__p0, __ARM_mve_coerce(__p1, int32x4_t)));})

> 

>  #define __arm_vminavq_p(p0,p1,p2) ({ __typeof(p0) __p0 = (p0); \

>    __typeof(p1) __p1 = (p1); \

>    _Generic( (int (*)[__ARM_mve_typeid(__p0)][__ARM_mve_typeid(__p1)])0,

> \

> -  int (*)[__ARM_mve_type_int_n][__ARM_mve_type_int8x16_t]:

> __arm_vminavq_p_s8 (__ARM_mve_coerce(__p0, uint8_t),

> __ARM_mve_coerce(__p1, int8x16_t), p2), \

> -  int (*)[__ARM_mve_type_int_n][__ARM_mve_type_int16x8_t]:

> __arm_vminavq_p_s16 (__ARM_mve_coerce(__p0, uint16_t),

> __ARM_mve_coerce(__p1, int16x8_t), p2), \

> -  int (*)[__ARM_mve_type_int_n][__ARM_mve_type_int32x4_t]:

> __arm_vminavq_p_s32 (__ARM_mve_coerce(__p0, uint32_t),

> __ARM_mve_coerce(__p1, int32x4_t), p2));})

> +  int (*)[__ARM_mve_type_int_n][__ARM_mve_type_int8x16_t]:

> __arm_vminavq_p_s8 (__p0, __ARM_mve_coerce(__p1, int8x16_t), p2), \

> +  int (*)[__ARM_mve_type_int_n][__ARM_mve_type_int16x8_t]:

> __arm_vminavq_p_s16 (__p0, __ARM_mve_coerce(__p1, int16x8_t), p2), \

> +  int (*)[__ARM_mve_type_int_n][__ARM_mve_type_int32x4_t]:

> __arm_vminavq_p_s32 (__p0, __ARM_mve_coerce(__p1, int32x4_t), p2));})

> 

>  #define __arm_vminq_x(p1,p2,p3) ({ __typeof(p1) __p1 = (p1); \

>    __typeof(p2) __p2 = (p2); \

> @@ -41747,22 +41741,22 @@ extern void *__ARM_undef;

>  #define __arm_vminvq(p0,p1) ({ __typeof(p0) __p0 = (p0); \

>    __typeof(p1) __p1 = (p1); \

>    _Generic( (int (*)[__ARM_mve_typeid(__p0)][__ARM_mve_typeid(__p1)])0,

> \

> -  int (*)[__ARM_mve_type_int_n][__ARM_mve_type_int8x16_t]:

> __arm_vminvq_s8 (__ARM_mve_coerce(__p0, int8_t),

> __ARM_mve_coerce(__p1, int8x16_t)), \

> -  int (*)[__ARM_mve_type_int_n][__ARM_mve_type_int16x8_t]:

> __arm_vminvq_s16 (__ARM_mve_coerce(__p0, int16_t),

> __ARM_mve_coerce(__p1, int16x8_t)), \

> -  int (*)[__ARM_mve_type_int_n][__ARM_mve_type_int32x4_t]:

> __arm_vminvq_s32 (__ARM_mve_coerce(__p0, int32_t),

> __ARM_mve_coerce(__p1, int32x4_t)), \

> -  int (*)[__ARM_mve_type_int_n][__ARM_mve_type_uint8x16_t]:

> __arm_vminvq_u8 (__ARM_mve_coerce(__p0, uint8_t),

> __ARM_mve_coerce(__p1, uint8x16_t)), \

> -  int (*)[__ARM_mve_type_int_n][__ARM_mve_type_uint16x8_t]:

> __arm_vminvq_u16 (__ARM_mve_coerce(__p0, uint16_t),

> __ARM_mve_coerce(__p1, uint16x8_t)), \

> -  int (*)[__ARM_mve_type_int_n][__ARM_mve_type_uint32x4_t]:

> __arm_vminvq_u32 (__ARM_mve_coerce(__p0, uint32_t),

> __ARM_mve_coerce(__p1, uint32x4_t)));})

> +  int (*)[__ARM_mve_type_int_n][__ARM_mve_type_int8x16_t]:

> __arm_vminvq_s8 (__p0, __ARM_mve_coerce(__p1, int8x16_t)), \

> +  int (*)[__ARM_mve_type_int_n][__ARM_mve_type_int16x8_t]:

> __arm_vminvq_s16 (__p0, __ARM_mve_coerce(__p1, int16x8_t)), \

> +  int (*)[__ARM_mve_type_int_n][__ARM_mve_type_int32x4_t]:

> __arm_vminvq_s32 (__p0, __ARM_mve_coerce(__p1, int32x4_t)), \

> +  int (*)[__ARM_mve_type_int_n][__ARM_mve_type_uint8x16_t]:

> __arm_vminvq_u8 (__p0, __ARM_mve_coerce(__p1, uint8x16_t)), \

> +  int (*)[__ARM_mve_type_int_n][__ARM_mve_type_uint16x8_t]:

> __arm_vminvq_u16 (__p0, __ARM_mve_coerce(__p1, uint16x8_t)), \

> +  int (*)[__ARM_mve_type_int_n][__ARM_mve_type_uint32x4_t]:

> __arm_vminvq_u32 (__p0, __ARM_mve_coerce(__p1, uint32x4_t)));})

> 

>  #define __arm_vminvq_p(p0,p1,p2) ({ __typeof(p0) __p0 = (p0); \

>    __typeof(p1) __p1 = (p1); \

>    _Generic( (int (*)[__ARM_mve_typeid(__p0)][__ARM_mve_typeid(__p1)])0,

> \

> -  int (*)[__ARM_mve_type_int_n][__ARM_mve_type_int8x16_t]:

> __arm_vminvq_p_s8 (__ARM_mve_coerce(__p0, int8_t),

> __ARM_mve_coerce(__p1, int8x16_t), p2), \

> -  int (*)[__ARM_mve_type_int_n][__ARM_mve_type_int16x8_t]:

> __arm_vminvq_p_s16 (__ARM_mve_coerce(__p0, int16_t),

> __ARM_mve_coerce(__p1, int16x8_t), p2), \

> -  int (*)[__ARM_mve_type_int_n][__ARM_mve_type_int32x4_t]:

> __arm_vminvq_p_s32 (__ARM_mve_coerce(__p0, int32_t),

> __ARM_mve_coerce(__p1, int32x4_t), p2), \

> -  int (*)[__ARM_mve_type_int_n][__ARM_mve_type_uint8x16_t]:

> __arm_vminvq_p_u8 (__ARM_mve_coerce(__p0, uint8_t),

> __ARM_mve_coerce(__p1, uint8x16_t), p2), \

> -  int (*)[__ARM_mve_type_int_n][__ARM_mve_type_uint16x8_t]:

> __arm_vminvq_p_u16 (__ARM_mve_coerce(__p0, uint16_t),

> __ARM_mve_coerce(__p1, uint16x8_t), p2), \

> -  int (*)[__ARM_mve_type_int_n][__ARM_mve_type_uint32x4_t]:

> __arm_vminvq_p_u32 (__ARM_mve_coerce(__p0, uint32_t),

> __ARM_mve_coerce(__p1, uint32x4_t), p2));})

> +  int (*)[__ARM_mve_type_int_n][__ARM_mve_type_int8x16_t]:

> __arm_vminvq_p_s8 (__p0, __ARM_mve_coerce(__p1, int8x16_t), p2), \

> +  int (*)[__ARM_mve_type_int_n][__ARM_mve_type_int16x8_t]:

> __arm_vminvq_p_s16 (__p0, __ARM_mve_coerce(__p1, int16x8_t), p2), \

> +  int (*)[__ARM_mve_type_int_n][__ARM_mve_type_int32x4_t]:

> __arm_vminvq_p_s32 (__p0, __ARM_mve_coerce(__p1, int32x4_t), p2), \

> +  int (*)[__ARM_mve_type_int_n][__ARM_mve_type_uint8x16_t]:

> __arm_vminvq_p_u8 (__p0, __ARM_mve_coerce(__p1, uint8x16_t), p2), \

> +  int (*)[__ARM_mve_type_int_n][__ARM_mve_type_uint16x8_t]:

> __arm_vminvq_p_u16 (__p0, __ARM_mve_coerce(__p1, uint16x8_t), p2), \

> +  int (*)[__ARM_mve_type_int_n][__ARM_mve_type_uint32x4_t]:

> __arm_vminvq_p_u32 (__p0, __ARM_mve_coerce(__p1, uint32x4_t), p2));})

> 

>  #define __arm_vmladavaq(p0,p1,p2) ({ __typeof(p0) __p0 = (p0); \

>    __typeof(p1) __p1 = (p1); \

> diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmaxavq_p_s16.c

> b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmaxavq_p_s16.c

> index 02e0227..74ffad4 100644

> --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmaxavq_p_s16.c

> +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmaxavq_p_s16.c

> @@ -10,7 +10,6 @@ foo (uint16_t a, int16x8_t b, mve_pred16_t p)

>    return vmaxavq_p_s16 (a, b, p);

>  }

> 

> -/* { dg-final { scan-assembler "vmaxavt.s16"  }  } */

> 

>  uint16_t

>  foo1 (uint16_t a, int16x8_t b, mve_pred16_t p)

> @@ -18,4 +17,12 @@ foo1 (uint16_t a, int16x8_t b, mve_pred16_t p)

>    return vmaxavq_p (a, b, p);

>  }

> 

> -/* { dg-final { scan-assembler "vmaxavt.s16"  }  } */

> +

> +int16_t

> +foo2 (uint8_t a, int16x8_t b, mve_pred16_t p)

> +{

> +  return vmaxavq_p (a, b, p);

> +}

> +

> +/* { dg-final { scan-assembler-not "__ARM_undef" } } */

> +/* { dg-final { scan-assembler-times "vmaxavt.s16" 3 } } */

> diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmaxavq_p_s32.c

> b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmaxavq_p_s32.c

> index 7ecd94a..40800b0 100644

> --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmaxavq_p_s32.c

> +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmaxavq_p_s32.c

> @@ -10,7 +10,6 @@ foo (uint32_t a, int32x4_t b, mve_pred16_t p)

>    return vmaxavq_p_s32 (a, b, p);

>  }

> 

> -/* { dg-final { scan-assembler "vmaxavt.s32"  }  } */

> 

>  uint32_t

>  foo1 (uint32_t a, int32x4_t b, mve_pred16_t p)

> @@ -18,4 +17,12 @@ foo1 (uint32_t a, int32x4_t b, mve_pred16_t p)

>    return vmaxavq_p (a, b, p);

>  }

> 

> -/* { dg-final { scan-assembler "vmaxavt.s32"  }  } */

> +

> +int32_t

> +foo2 (uint16_t a, int32x4_t b, mve_pred16_t p)

> +{

> +  return vmaxavq_p (a, b, p);

> +}

> +

> +/* { dg-final { scan-assembler-not "__ARM_undef" } } */

> +/* { dg-final { scan-assembler-times "vmaxavt.s32" 3 } } */

> diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmaxavq_p_s8.c

> b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmaxavq_p_s8.c

> index 7a21de7..7638737 100644

> --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmaxavq_p_s8.c

> +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmaxavq_p_s8.c

> @@ -10,7 +10,6 @@ foo (uint8_t a, int8x16_t b, mve_pred16_t p)

>    return vmaxavq_p_s8 (a, b, p);

>  }

> 

> -/* { dg-final { scan-assembler "vmaxavt.s8"  }  } */

> 

>  uint8_t

>  foo1 (uint8_t a, int8x16_t b, mve_pred16_t p)

> @@ -18,4 +17,12 @@ foo1 (uint8_t a, int8x16_t b, mve_pred16_t p)

>    return vmaxavq_p (a, b, p);

>  }

> 

> -/* { dg-final { scan-assembler "vmaxavt.s8"  }  } */

> +

> +int8_t

> +foo2 (uint32_t a, int8x16_t b, mve_pred16_t p)

> +{

> +  return vmaxavq_p (a, b, p);

> +}

> +

> +/* { dg-final { scan-assembler-not "__ARM_undef" } } */

> +/* { dg-final { scan-assembler-times "vmaxavt.s8" 3 } } */

> diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmaxavq_s16.c

> b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmaxavq_s16.c

> index 4621eba..0dca149 100644

> --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmaxavq_s16.c

> +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmaxavq_s16.c

> @@ -10,7 +10,6 @@ foo (uint16_t a, int16x8_t b)

>    return vmaxavq_s16 (a, b);

>  }

> 

> -/* { dg-final { scan-assembler "vmaxav.s16"  }  } */

> 

>  uint16_t

>  foo1 (uint16_t a, int16x8_t b)

> @@ -18,4 +17,12 @@ foo1 (uint16_t a, int16x8_t b)

>    return vmaxavq (a, b);

>  }

> 

> -/* { dg-final { scan-assembler "vmaxav.s16"  }  } */

> +

> +int16_t

> +foo2 (uint8_t a, int16x8_t b)

> +{

> +  return vmaxavq (a, b);

> +}

> +

> +/* { dg-final { scan-assembler-not "__ARM_undef" } } */

> +/* { dg-final { scan-assembler-times "vmaxav.s16" 3 } } */

> diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmaxavq_s32.c

> b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmaxavq_s32.c

> index 8813d9d..f419a77 100644

> --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmaxavq_s32.c

> +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmaxavq_s32.c

> @@ -10,7 +10,6 @@ foo (uint32_t a, int32x4_t b)

>    return vmaxavq_s32 (a, b);

>  }

> 

> -/* { dg-final { scan-assembler "vmaxav.s32"  }  } */

> 

>  uint32_t

>  foo1 (uint32_t a, int32x4_t b)

> @@ -18,4 +17,12 @@ foo1 (uint32_t a, int32x4_t b)

>    return vmaxavq (a, b);

>  }

> 

> -/* { dg-final { scan-assembler "vmaxav.s32"  }  } */

> +

> +int32_t

> +foo2 (uint16_t a, int32x4_t b)

> +{

> +  return vmaxavq (a, b);

> +}

> +

> +/* { dg-final { scan-assembler-not "__ARM_undef" } } */

> +/* { dg-final { scan-assembler-times "vmaxav.s32" 3 } } */

> diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmaxavq_s8.c

> b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmaxavq_s8.c

> index 961f1d2..214ad88 100644

> --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmaxavq_s8.c

> +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmaxavq_s8.c

> @@ -10,7 +10,6 @@ foo (uint8_t a, int8x16_t b)

>    return vmaxavq_s8 (a, b);

>  }

> 

> -/* { dg-final { scan-assembler "vmaxav.s8"  }  } */

> 

>  uint8_t

>  foo1 (uint8_t a, int8x16_t b)

> @@ -18,4 +17,12 @@ foo1 (uint8_t a, int8x16_t b)

>    return vmaxavq (a, b);

>  }

> 

> -/* { dg-final { scan-assembler "vmaxav.s8"  }  } */

> +

> +int8_t

> +foo2 (uint32_t a, int8x16_t b)

> +{

> +  return vmaxavq (a, b);

> +}

> +

> +/* { dg-final { scan-assembler-not "__ARM_undef" } } */

> +/* { dg-final { scan-assembler-times "vmaxav.s8" 3 } } */

> diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmaxnmavq_f16.c

> b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmaxnmavq_f16.c

> index de48ea8..6d8cf19 100644

> --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmaxnmavq_f16.c

> +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmaxnmavq_f16.c

> @@ -10,7 +10,6 @@ foo (float16_t a, float16x8_t b)

>    return vmaxnmavq_f16 (a, b);

>  }

> 

> -/* { dg-final { scan-assembler "vmaxnmav.f16"  }  } */

> 

>  float16_t

>  foo1 (float16_t a, float16x8_t b)

> @@ -18,4 +17,12 @@ foo1 (float16_t a, float16x8_t b)

>    return vmaxnmavq (a, b);

>  }

> 

> -/* { dg-final { scan-assembler "vmaxnmav.f16"  }  } */

> +

> +float16_t

> +foo2 (float32_t a, float16x8_t b)

> +{

> +  return vmaxnmavq (a, b);

> +}

> +

> +/* { dg-final { scan-assembler-not "__ARM_undef" } } */

> +/* { dg-final { scan-assembler-times "vmaxnmav.f16" 3 } } */

> diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmaxnmavq_f32.c

> b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmaxnmavq_f32.c

> index b4c7f83..ef79030 100644

> --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmaxnmavq_f32.c

> +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmaxnmavq_f32.c

> @@ -10,7 +10,6 @@ foo (float32_t a, float32x4_t b)

>    return vmaxnmavq_f32 (a, b);

>  }

> 

> -/* { dg-final { scan-assembler "vmaxnmav.f32"  }  } */

> 

>  float32_t

>  foo1 (float32_t a, float32x4_t b)

> @@ -18,4 +17,12 @@ foo1 (float32_t a, float32x4_t b)

>    return vmaxnmavq (a, b);

>  }

> 

> -/* { dg-final { scan-assembler "vmaxnmav.f32"  }  } */

> +

> +float32_t

> +foo2 (float16_t a, float32x4_t b)

> +{

> +  return vmaxnmavq (a, b);

> +}

> +

> +/* { dg-final { scan-assembler-not "__ARM_undef" } } */

> +/* { dg-final { scan-assembler-times "vmaxnmav.f32" 3 } } */

> diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmaxnmavq_p_f16.c

> b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmaxnmavq_p_f16.c

> index 9c2eed0..f7f39f5 100644

> --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmaxnmavq_p_f16.c

> +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmaxnmavq_p_f16.c

> @@ -10,7 +10,6 @@ foo (float16_t a, float16x8_t b, mve_pred16_t p)

>    return vmaxnmavq_p_f16 (a, b, p);

>  }

> 

> -/* { dg-final { scan-assembler "vmaxnmavt.f16"  }  } */

> 

>  float16_t

>  foo1 (float16_t a, float16x8_t b, mve_pred16_t p)

> @@ -18,4 +17,12 @@ foo1 (float16_t a, float16x8_t b, mve_pred16_t p)

>    return vmaxnmavq_p (a, b, p);

>  }

> 

> -/* { dg-final { scan-assembler "vmaxnmavt.f16"  }  } */

> +

> +float16_t

> +foo2 (float32_t a, float16x8_t b, mve_pred16_t p)

> +{

> +  return vmaxnmavq_p (a, b, p);

> +}

> +

> +/* { dg-final { scan-assembler-not "__ARM_undef" } } */

> +/* { dg-final { scan-assembler-times "vmaxnmavt.f16" 3 } } */

> diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmaxnmavq_p_f32.c

> b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmaxnmavq_p_f32.c

> index 1cadccb..341f625 100644

> --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmaxnmavq_p_f32.c

> +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmaxnmavq_p_f32.c

> @@ -10,7 +10,6 @@ foo (float32_t a, float32x4_t b, mve_pred16_t p)

>    return vmaxnmavq_p_f32 (a, b, p);

>  }

> 

> -/* { dg-final { scan-assembler "vmaxnmavt.f32"  }  } */

> 

>  float32_t

>  foo1 (float32_t a, float32x4_t b, mve_pred16_t p)

> @@ -18,4 +17,12 @@ foo1 (float32_t a, float32x4_t b, mve_pred16_t p)

>    return vmaxnmavq_p (a, b, p);

>  }

> 

> -/* { dg-final { scan-assembler "vmaxnmavt.f32"  }  } */

> +

> +float32_t

> +foo2 (float16_t a, float32x4_t b, mve_pred16_t p)

> +{

> +  return vmaxnmavq_p (a, b, p);

> +}

> +

> +/* { dg-final { scan-assembler-not "__ARM_undef" } } */

> +/* { dg-final { scan-assembler-times "vmaxnmavt.f32" 3 } } */

> diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmaxnmvq_f16.c

> b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmaxnmvq_f16.c

> index 81f4b9b..80bd1d4 100644

> --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmaxnmvq_f16.c

> +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmaxnmvq_f16.c

> @@ -10,7 +10,6 @@ foo (float16_t a, float16x8_t b)

>    return vmaxnmvq_f16 (a, b);

>  }

> 

> -/* { dg-final { scan-assembler "vmaxnmv.f16"  }  } */

> 

>  float16_t

>  foo1 (float16_t a, float16x8_t b)

> @@ -18,4 +17,12 @@ foo1 (float16_t a, float16x8_t b)

>    return vmaxnmvq (a, b);

>  }

> 

> -/* { dg-final { scan-assembler "vmaxnmv.f16"  }  } */

> +

> +float16_t

> +foo2 (float32_t a, float16x8_t b)

> +{

> +  return vmaxnmvq (a, b);

> +}

> +

> +/* { dg-final { scan-assembler-not "__ARM_undef" } } */

> +/* { dg-final { scan-assembler-times "vmaxnmv.f16" 3 } } */

> diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmaxnmvq_f32.c

> b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmaxnmvq_f32.c

> index ab06c2b..bb2fc46 100644

> --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmaxnmvq_f32.c

> +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmaxnmvq_f32.c

> @@ -10,7 +10,6 @@ foo (float32_t a, float32x4_t b)

>    return vmaxnmvq_f32 (a, b);

>  }

> 

> -/* { dg-final { scan-assembler "vmaxnmv.f32"  }  } */

> 

>  float32_t

>  foo1 (float32_t a, float32x4_t b)

> @@ -18,4 +17,12 @@ foo1 (float32_t a, float32x4_t b)

>    return vmaxnmvq (a, b);

>  }

> 

> -/* { dg-final { scan-assembler "vmaxnmv.f32"  }  } */

> +

> +float32_t

> +foo2 (float16_t a, float32x4_t b)

> +{

> +  return vmaxnmvq (a, b);

> +}

> +

> +/* { dg-final { scan-assembler-not "__ARM_undef" } } */

> +/* { dg-final { scan-assembler-times "vmaxnmv.f32" 3 } } */

> diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmaxnmvq_p_f16.c

> b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmaxnmvq_p_f16.c

> index e37c5a1..3efe203 100644

> --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmaxnmvq_p_f16.c

> +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmaxnmvq_p_f16.c

> @@ -10,7 +10,6 @@ foo (float16_t a, float16x8_t b, mve_pred16_t p)

>    return vmaxnmvq_p_f16 (a, b, p);

>  }

> 

> -/* { dg-final { scan-assembler "vmaxnmvt.f16"  }  } */

> 

>  float16_t

>  foo1 (float16_t a, float16x8_t b, mve_pred16_t p)

> @@ -18,4 +17,12 @@ foo1 (float16_t a, float16x8_t b, mve_pred16_t p)

>    return vmaxnmvq_p (a, b, p);

>  }

> 

> -/* { dg-final { scan-assembler "vmaxnmvt.f16"  }  } */

> +

> +float16_t

> +foo2 (float32_t a, float16x8_t b, mve_pred16_t p)

> +{

> +  return vmaxnmvq_p (a, b, p);

> +}

> +

> +/* { dg-final { scan-assembler-not "__ARM_undef" } } */

> +/* { dg-final { scan-assembler-times "vmaxnmvt.f16" 3 } } */

> diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmaxnmvq_p_f32.c

> b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmaxnmvq_p_f32.c

> index 884cd45..6c13247 100644

> --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmaxnmvq_p_f32.c

> +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmaxnmvq_p_f32.c

> @@ -10,7 +10,6 @@ foo (float32_t a, float32x4_t b, mve_pred16_t p)

>    return vmaxnmvq_p_f32 (a, b, p);

>  }

> 

> -/* { dg-final { scan-assembler "vmaxnmvt.f32"  }  } */

> 

>  float32_t

>  foo1 (float32_t a, float32x4_t b, mve_pred16_t p)

> @@ -18,4 +17,12 @@ foo1 (float32_t a, float32x4_t b, mve_pred16_t p)

>    return vmaxnmvq_p (a, b, p);

>  }

> 

> -/* { dg-final { scan-assembler "vmaxnmvt.f32"  }  } */

> +

> +float32_t

> +foo2 (float16_t a, float32x4_t b, mve_pred16_t p)

> +{

> +  return vmaxnmvq_p (a, b, p);

> +}

> +

> +/* { dg-final { scan-assembler-not "__ARM_undef" } } */

> +/* { dg-final { scan-assembler-times "vmaxnmvt.f32" 3 } } */

> diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmaxvq_p_s16.c

> b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmaxvq_p_s16.c

> index 79de370..657efc5 100644

> --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmaxvq_p_s16.c

> +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmaxvq_p_s16.c

> @@ -10,7 +10,6 @@ foo (int16_t a, int16x8_t b, mve_pred16_t p)

>    return vmaxvq_p_s16 (a, b, p);

>  }

> 

> -/* { dg-final { scan-assembler "vmaxvt.s16"  }  } */

> 

>  int16_t

>  foo1 (int16_t a, int16x8_t b, mve_pred16_t p)

> @@ -18,4 +17,12 @@ foo1 (int16_t a, int16x8_t b, mve_pred16_t p)

>    return vmaxvq_p (a, b, p);

>  }

> 

> -/* { dg-final { scan-assembler "vmaxvt.s16"  }  } */

> +

> +int16_t

> +foo2 (int8_t a, int16x8_t b, mve_pred16_t p)

> +{

> +  return vmaxvq_p (a, b, p);

> +}

> +

> +/* { dg-final { scan-assembler-not "__ARM_undef" } } */

> +/* { dg-final { scan-assembler-times "vmaxvt.s16" 3 } } */

> diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmaxvq_p_s32.c

> b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmaxvq_p_s32.c

> index e526744..5882351 100644

> --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmaxvq_p_s32.c

> +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmaxvq_p_s32.c

> @@ -10,7 +10,6 @@ foo (int32_t a, int32x4_t b, mve_pred16_t p)

>    return vmaxvq_p_s32 (a, b, p);

>  }

> 

> -/* { dg-final { scan-assembler "vmaxvt.s32"  }  } */

> 

>  int32_t

>  foo1 (int32_t a, int32x4_t b, mve_pred16_t p)

> @@ -18,4 +17,12 @@ foo1 (int32_t a, int32x4_t b, mve_pred16_t p)

>    return vmaxvq_p (a, b, p);

>  }

> 

> -/* { dg-final { scan-assembler "vmaxvt.s32"  }  } */

> +

> +int32_t

> +foo2 (int16_t a, int32x4_t b, mve_pred16_t p)

> +{

> +  return vmaxvq_p (a, b, p);

> +}

> +

> +/* { dg-final { scan-assembler-not "__ARM_undef" } } */

> +/* { dg-final { scan-assembler-times "vmaxvt.s32" 3 } } */

> diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmaxvq_p_s8.c

> b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmaxvq_p_s8.c

> index d3cedd4..3737ecd 100644

> --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmaxvq_p_s8.c

> +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmaxvq_p_s8.c

> @@ -10,7 +10,6 @@ foo (int8_t a, int8x16_t b, mve_pred16_t p)

>    return vmaxvq_p_s8 (a, b, p);

>  }

> 

> -/* { dg-final { scan-assembler "vmaxvt.s8"  }  } */

> 

>  int8_t

>  foo1 (int8_t a, int8x16_t b, mve_pred16_t p)

> @@ -18,4 +17,12 @@ foo1 (int8_t a, int8x16_t b, mve_pred16_t p)

>    return vmaxvq_p (a, b, p);

>  }

> 

> -/* { dg-final { scan-assembler "vmaxvt.s8"  }  } */

> +

> +int8_t

> +foo2 (int32_t a, int8x16_t b, mve_pred16_t p)

> +{

> +  return vmaxvq_p (a, b, p);

> +}

> +

> +/* { dg-final { scan-assembler-not "__ARM_undef" } } */

> +/* { dg-final { scan-assembler-times "vmaxvt.s8" 3 } } */

> diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmaxvq_p_u16.c

> b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmaxvq_p_u16.c

> index 79572f7..348cf39 100644

> --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmaxvq_p_u16.c

> +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmaxvq_p_u16.c

> @@ -10,7 +10,6 @@ foo (uint16_t a, uint16x8_t b, mve_pred16_t p)

>    return vmaxvq_p_u16 (a, b, p);

>  }

> 

> -/* { dg-final { scan-assembler "vmaxvt.u16"  }  } */

> 

>  uint16_t

>  foo1 (uint16_t a, uint16x8_t b, mve_pred16_t p)

> @@ -18,4 +17,12 @@ foo1 (uint16_t a, uint16x8_t b, mve_pred16_t p)

>    return vmaxvq_p (a, b, p);

>  }

> 

> -/* { dg-final { scan-assembler "vmaxvt.u16"  }  } */

> +

> +uint16_t

> +foo2 (uint32_t a, uint16x8_t b, mve_pred16_t p)

> +{

> +  return vmaxvq_p (a, b, p);

> +}

> +

> +/* { dg-final { scan-assembler-not "__ARM_undef" } } */

> +/* { dg-final { scan-assembler-times "vmaxvt.u16" 3 } } */

> diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmaxvq_p_u32.c

> b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmaxvq_p_u32.c

> index e2f7a6f..f2e9762 100644

> --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmaxvq_p_u32.c

> +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmaxvq_p_u32.c

> @@ -10,7 +10,6 @@ foo (uint32_t a, uint32x4_t b, mve_pred16_t p)

>    return vmaxvq_p_u32 (a, b, p);

>  }

> 

> -/* { dg-final { scan-assembler "vmaxvt.u32"  }  } */

> 

>  uint32_t

>  foo1 (uint32_t a, uint32x4_t b, mve_pred16_t p)

> @@ -18,4 +17,12 @@ foo1 (uint32_t a, uint32x4_t b, mve_pred16_t p)

>    return vmaxvq_p (a, b, p);

>  }

> 

> -/* { dg-final { scan-assembler "vmaxvt.u32"  }  } */

> +

> +uint32_t

> +foo2 (uint8_t a, uint32x4_t b, mve_pred16_t p)

> +{

> +  return vmaxvq_p (a, b, p);

> +}

> +

> +/* { dg-final { scan-assembler-not "__ARM_undef" } } */

> +/* { dg-final { scan-assembler-times "vmaxvt.u32" 3 } } */

> diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmaxvq_p_u8.c

> b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmaxvq_p_u8.c

> index f977806..7df5b63 100644

> --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmaxvq_p_u8.c

> +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmaxvq_p_u8.c

> @@ -10,7 +10,6 @@ foo (uint8_t a, uint8x16_t b, mve_pred16_t p)

>    return vmaxvq_p_u8 (a, b, p);

>  }

> 

> -/* { dg-final { scan-assembler "vmaxvt.u8"  }  } */

> 

>  uint8_t

>  foo1 (uint8_t a, uint8x16_t b, mve_pred16_t p)

> @@ -18,4 +17,12 @@ foo1 (uint8_t a, uint8x16_t b, mve_pred16_t p)

>    return vmaxvq_p (a, b, p);

>  }

> 

> -/* { dg-final { scan-assembler "vmaxvt.u8"  }  } */

> +

> +uint8_t

> +foo2 (uint16_t a, uint8x16_t b, mve_pred16_t p)

> +{

> +  return vmaxvq_p (a, b, p);

> +}

> +

> +/* { dg-final { scan-assembler-not "__ARM_undef" } } */

> +/* { dg-final { scan-assembler-times "vmaxvt.u8" 3 } } */

> diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmaxvq_s16.c

> b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmaxvq_s16.c

> index 90f10b5..8412452 100644

> --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmaxvq_s16.c

> +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmaxvq_s16.c

> @@ -10,7 +10,6 @@ foo (int16_t a, int16x8_t b)

>    return vmaxvq_s16 (a, b);

>  }

> 

> -/* { dg-final { scan-assembler "vmaxv.s16"  }  } */

> 

>  int16_t

>  foo1 (int16_t a, int16x8_t b)

> @@ -18,4 +17,12 @@ foo1 (int16_t a, int16x8_t b)

>    return vmaxvq (a, b);

>  }

> 

> -/* { dg-final { scan-assembler "vmaxv.s16"  }  } */

> +

> +int16_t

> +foo2 (int8_t a, int16x8_t b)

> +{

> +  return vmaxvq (a, b);

> +}

> +

> +/* { dg-final { scan-assembler-not "__ARM_undef" } } */

> +/* { dg-final { scan-assembler-times "vmaxv.s16" 3 } } */

> diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmaxvq_s32.c

> b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmaxvq_s32.c

> index aa0e88b..09f4909 100644

> --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmaxvq_s32.c

> +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmaxvq_s32.c

> @@ -10,7 +10,6 @@ foo (int32_t a, int32x4_t b)

>    return vmaxvq_s32 (a, b);

>  }

> 

> -/* { dg-final { scan-assembler "vmaxv.s32"  }  } */

> 

>  int32_t

>  foo1 (int32_t a, int32x4_t b)

> @@ -18,4 +17,12 @@ foo1 (int32_t a, int32x4_t b)

>    return vmaxvq (a, b);

>  }

> 

> -/* { dg-final { scan-assembler "vmaxv.s32"  }  } */

> +

> +int32_t

> +foo2 (int16_t a, int32x4_t b)

> +{

> +  return vmaxvq (a, b);

> +}

> +

> +/* { dg-final { scan-assembler-not "__ARM_undef" } } */

> +/* { dg-final { scan-assembler-times "vmaxv.s32" 3 } } */

> diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmaxvq_s8.c

> b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmaxvq_s8.c

> index 884b84d..a087bbc 100644

> --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmaxvq_s8.c

> +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmaxvq_s8.c

> @@ -10,7 +10,6 @@ foo (int8_t a, int8x16_t b)

>    return vmaxvq_s8 (a, b);

>  }

> 

> -/* { dg-final { scan-assembler "vmaxv.s8"  }  } */

> 

>  int8_t

>  foo1 (int8_t a, int8x16_t b)

> @@ -18,4 +17,12 @@ foo1 (int8_t a, int8x16_t b)

>    return vmaxvq (a, b);

>  }

> 

> -/* { dg-final { scan-assembler "vmaxv.s8"  }  } */

> +

> +int8_t

> +foo2 (int32_t a, int8x16_t b)

> +{

> +  return vmaxvq (a, b);

> +}

> +

> +/* { dg-final { scan-assembler-not "__ARM_undef" } } */

> +/* { dg-final { scan-assembler-times "vmaxv.s8" 3 } } */

> diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmaxvq_u16.c

> b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmaxvq_u16.c

> index 2813ebd..47fe0d1 100644

> --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmaxvq_u16.c

> +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmaxvq_u16.c

> @@ -10,7 +10,6 @@ foo (uint16_t a, uint16x8_t b)

>    return vmaxvq_u16 (a, b);

>  }

> 

> -/* { dg-final { scan-assembler "vmaxv.u16"  }  } */

> 

>  uint16_t

>  foo1 (uint16_t a, uint16x8_t b)

> @@ -18,4 +17,12 @@ foo1 (uint16_t a, uint16x8_t b)

>    return vmaxvq (a, b);

>  }

> 

> -/* { dg-final { scan-assembler "vmaxv.u16"  }  } */

> +

> +uint16_t

> +foo2 (uint32_t a, uint16x8_t b)

> +{

> +  return vmaxvq (a, b);

> +}

> +

> +/* { dg-final { scan-assembler-not "__ARM_undef" } } */

> +/* { dg-final { scan-assembler-times "vmaxv.u16" 3 } } */

> diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmaxvq_u32.c

> b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmaxvq_u32.c

> index ab51b1e..aa723da 100644

> --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmaxvq_u32.c

> +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmaxvq_u32.c

> @@ -10,7 +10,6 @@ foo (uint32_t a, uint32x4_t b)

>    return vmaxvq_u32 (a, b);

>  }

> 

> -/* { dg-final { scan-assembler "vmaxv.u32"  }  } */

> 

>  uint32_t

>  foo1 (uint32_t a, uint32x4_t b)

> @@ -18,4 +17,12 @@ foo1 (uint32_t a, uint32x4_t b)

>    return vmaxvq (a, b);

>  }

> 

> -/* { dg-final { scan-assembler "vmaxv.u32"  }  } */

> +

> +uint32_t

> +foo2 (uint8_t a, uint32x4_t b)

> +{

> +  return vmaxvq (a, b);

> +}

> +

> +/* { dg-final { scan-assembler-not "__ARM_undef" } } */

> +/* { dg-final { scan-assembler-times "vmaxv.u32" 3 } } */

> diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmaxvq_u8.c

> b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmaxvq_u8.c

> index 3326cfb..3aae785 100644

> --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmaxvq_u8.c

> +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmaxvq_u8.c

> @@ -10,7 +10,6 @@ foo (uint8_t a, uint8x16_t b)

>    return vmaxvq_u8 (a, b);

>  }

> 

> -/* { dg-final { scan-assembler "vmaxv.u8"  }  } */

> 

>  uint8_t

>  foo1 (uint8_t a, uint8x16_t b)

> @@ -18,4 +17,12 @@ foo1 (uint8_t a, uint8x16_t b)

>    return vmaxvq (a, b);

>  }

> 

> -/* { dg-final { scan-assembler "vmaxv.u8"  }  } */

> +

> +uint8_t

> +foo2 (uint16_t a, uint8x16_t b)

> +{

> +  return vmaxvq (a, b);

> +}

> +

> +/* { dg-final { scan-assembler-not "__ARM_undef" } } */

> +/* { dg-final { scan-assembler-times "vmaxv.u8" 3 } } */

> diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vminavq_p_s16.c

> b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vminavq_p_s16.c

> index 6b87648..9303ae0 100644

> --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vminavq_p_s16.c

> +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vminavq_p_s16.c

> @@ -10,7 +10,6 @@ foo (uint16_t a, int16x8_t b, mve_pred16_t p)

>    return vminavq_p_s16 (a, b, p);

>  }

> 

> -/* { dg-final { scan-assembler "vminavt.s16"  }  } */

> 

>  uint16_t

>  foo1 (uint16_t a, int16x8_t b, mve_pred16_t p)

> @@ -18,4 +17,12 @@ foo1 (uint16_t a, int16x8_t b, mve_pred16_t p)

>    return vminavq_p (a, b, p);

>  }

> 

> -/* { dg-final { scan-assembler "vminavt.s16"  }  } */

> +

> +int16_t

> +foo2 (uint8_t a, int16x8_t b, mve_pred16_t p)

> +{

> +  return vminavq_p (a, b, p);

> +}

> +

> +/* { dg-final { scan-assembler-not "__ARM_undef" } } */

> +/* { dg-final { scan-assembler-times "vminavt.s16" 3 } } */

> diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vminavq_p_s32.c

> b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vminavq_p_s32.c

> index 086ff56..36247f6 100644

> --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vminavq_p_s32.c

> +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vminavq_p_s32.c

> @@ -10,7 +10,6 @@ foo (uint32_t a, int32x4_t b, mve_pred16_t p)

>    return vminavq_p_s32 (a, b, p);

>  }

> 

> -/* { dg-final { scan-assembler "vminavt.s32"  }  } */

> 

>  uint32_t

>  foo1 (uint32_t a, int32x4_t b, mve_pred16_t p)

> @@ -18,4 +17,12 @@ foo1 (uint32_t a, int32x4_t b, mve_pred16_t p)

>    return vminavq_p (a, b, p);

>  }

> 

> -/* { dg-final { scan-assembler "vminavt.s32"  }  } */

> +

> +int32_t

> +foo2 (uint16_t a, int32x4_t b, mve_pred16_t p)

> +{

> +  return vminavq_p (a, b, p);

> +}

> +

> +/* { dg-final { scan-assembler-not "__ARM_undef" } } */

> +/* { dg-final { scan-assembler-times "vminavt.s32" 3 } } */

> diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vminavq_p_s8.c

> b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vminavq_p_s8.c

> index 999c11c..d336161 100644

> --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vminavq_p_s8.c

> +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vminavq_p_s8.c

> @@ -10,7 +10,6 @@ foo (uint8_t a, int8x16_t b, mve_pred16_t p)

>    return vminavq_p_s8 (a, b, p);

>  }

> 

> -/* { dg-final { scan-assembler "vminavt.s8"  }  } */

> 

>  uint8_t

>  foo1 (uint8_t a, int8x16_t b, mve_pred16_t p)

> @@ -18,4 +17,12 @@ foo1 (uint8_t a, int8x16_t b, mve_pred16_t p)

>    return vminavq_p (a, b, p);

>  }

> 

> -/* { dg-final { scan-assembler "vminavt.s8"  }  } */

> +

> +int8_t

> +foo2 (uint32_t a, int8x16_t b, mve_pred16_t p)

> +{

> +  return vminavq_p (a, b, p);

> +}

> +

> +/* { dg-final { scan-assembler-not "__ARM_undef" } } */

> +/* { dg-final { scan-assembler-times "vminavt.s8" 3 } } */

> diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vminavq_s16.c

> b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vminavq_s16.c

> index a626e31..17e4edc 100644

> --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vminavq_s16.c

> +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vminavq_s16.c

> @@ -10,7 +10,6 @@ foo (uint16_t a, int16x8_t b)

>    return vminavq_s16 (a, b);

>  }

> 

> -/* { dg-final { scan-assembler "vminav.s16"  }  } */

> 

>  uint16_t

>  foo1 (uint16_t a, int16x8_t b)

> @@ -18,4 +17,12 @@ foo1 (uint16_t a, int16x8_t b)

>    return vminavq (a, b);

>  }

> 

> -/* { dg-final { scan-assembler "vminav.s16"  }  } */

> +

> +int16_t

> +foo2 (uint8_t a, int16x8_t b)

> +{

> +  return vminavq (a, b);

> +}

> +

> +/* { dg-final { scan-assembler-not "__ARM_undef" } } */

> +/* { dg-final { scan-assembler-times "vminav.s16" 3 } } */

> diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vminavq_s32.c

> b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vminavq_s32.c

> index be575cb..032d02b 100644

> --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vminavq_s32.c

> +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vminavq_s32.c

> @@ -10,7 +10,6 @@ foo (uint32_t a, int32x4_t b)

>    return vminavq_s32 (a, b);

>  }

> 

> -/* { dg-final { scan-assembler "vminav.s32"  }  } */

> 

>  uint32_t

>  foo1 (uint32_t a, int32x4_t b)

> @@ -18,4 +17,12 @@ foo1 (uint32_t a, int32x4_t b)

>    return vminavq (a, b);

>  }

> 

> -/* { dg-final { scan-assembler "vminav.s32"  }  } */

> +

> +int32_t

> +foo2 (uint16_t a, int32x4_t b)

> +{

> +  return vminavq (a, b);

> +}

> +

> +/* { dg-final { scan-assembler-not "__ARM_undef" } } */

> +/* { dg-final { scan-assembler-times "vminav.s32" 3 } } */

> diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vminavq_s8.c

> b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vminavq_s8.c

> index c3dfe4b..2a2bb3d6 100644

> --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vminavq_s8.c

> +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vminavq_s8.c

> @@ -10,7 +10,6 @@ foo (uint8_t a, int8x16_t b)

>    return vminavq_s8 (a, b);

>  }

> 

> -/* { dg-final { scan-assembler "vminav.s8"  }  } */

> 

>  uint8_t

>  foo1 (uint8_t a, int8x16_t b)

> @@ -18,4 +17,12 @@ foo1 (uint8_t a, int8x16_t b)

>    return vminavq (a, b);

>  }

> 

> -/* { dg-final { scan-assembler "vminav.s8"  }  } */

> +

> +int8_t

> +foo2 (uint32_t a, int8x16_t b)

> +{

> +  return vminavq (a, b);

> +}

> +

> +/* { dg-final { scan-assembler-not "__ARM_undef" } } */

> +/* { dg-final { scan-assembler-times "vminav.s8" 3 } } */

> diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vminnmavq_f16.c

> b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vminnmavq_f16.c

> index 2111681..fadb23e 100644

> --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vminnmavq_f16.c

> +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vminnmavq_f16.c

> @@ -10,7 +10,6 @@ foo (float16_t a, float16x8_t b)

>    return vminnmavq_f16 (a, b);

>  }

> 

> -/* { dg-final { scan-assembler "vminnmav.f16"  }  } */

> 

>  float16_t

>  foo1 (float16_t a, float16x8_t b)

> @@ -18,4 +17,12 @@ foo1 (float16_t a, float16x8_t b)

>    return vminnmavq (a, b);

>  }

> 

> -/* { dg-final { scan-assembler "vminnmav.f16"  }  } */

> +

> +float16_t

> +foo2 (float32_t a, float16x8_t b)

> +{

> +  return vminnmavq (a, b);

> +}

> +

> +/* { dg-final { scan-assembler-not "__ARM_undef" } } */

> +/* { dg-final { scan-assembler-times "vminnmav.f16" 3 } } */

> diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vminnmavq_f32.c

> b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vminnmavq_f32.c

> index bd87b85..84714a9 100644

> --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vminnmavq_f32.c

> +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vminnmavq_f32.c

> @@ -10,7 +10,6 @@ foo (float32_t a, float32x4_t b)

>    return vminnmavq_f32 (a, b);

>  }

> 

> -/* { dg-final { scan-assembler "vminnmav.f32"  }  } */

> 

>  float32_t

>  foo1 (float32_t a, float32x4_t b)

> @@ -18,4 +17,12 @@ foo1 (float32_t a, float32x4_t b)

>    return vminnmavq (a, b);

>  }

> 

> -/* { dg-final { scan-assembler "vminnmav.f32"  }  } */

> +

> +float32_t

> +foo2 (float16_t a, float32x4_t b)

> +{

> +  return vminnmavq (a, b);

> +}

> +

> +/* { dg-final { scan-assembler-not "__ARM_undef" } } */

> +/* { dg-final { scan-assembler-times "vminnmav.f32" 3 } } */

> diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vminnmavq_p_f16.c

> b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vminnmavq_p_f16.c

> index e6d0bb5..c79fa30 100644

> --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vminnmavq_p_f16.c

> +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vminnmavq_p_f16.c

> @@ -10,7 +10,6 @@ foo (float16_t a, float16x8_t b, mve_pred16_t p)

>    return vminnmavq_p_f16 (a, b, p);

>  }

> 

> -/* { dg-final { scan-assembler "vminnmavt.f16"  }  } */

> 

>  float16_t

>  foo1 (float16_t a, float16x8_t b, mve_pred16_t p)

> @@ -18,4 +17,12 @@ foo1 (float16_t a, float16x8_t b, mve_pred16_t p)

>    return vminnmavq_p (a, b, p);

>  }

> 

> -/* { dg-final { scan-assembler "vminnmavt.f16"  }  } */

> +

> +float16_t

> +foo2 (float32_t a, float16x8_t b, mve_pred16_t p)

> +{

> +  return vminnmavq_p (a, b, p);

> +}

> +

> +/* { dg-final { scan-assembler-not "__ARM_undef" } } */

> +/* { dg-final { scan-assembler-times "vminnmavt.f16" 3 } } */

> diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vminnmavq_p_f32.c

> b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vminnmavq_p_f32.c

> index 6b56b67..bea04c7 100644

> --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vminnmavq_p_f32.c

> +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vminnmavq_p_f32.c

> @@ -10,7 +10,6 @@ foo (float32_t a, float32x4_t b, mve_pred16_t p)

>    return vminnmavq_p_f32 (a, b, p);

>  }

> 

> -/* { dg-final { scan-assembler "vminnmavt.f32"  }  } */

> 

>  float32_t

>  foo1 (float32_t a, float32x4_t b, mve_pred16_t p)

> @@ -18,4 +17,12 @@ foo1 (float32_t a, float32x4_t b, mve_pred16_t p)

>    return vminnmavq_p (a, b, p);

>  }

> 

> -/* { dg-final { scan-assembler "vminnmavt.f32"  }  } */

> +

> +float32_t

> +foo2 (float16_t a, float32x4_t b, mve_pred16_t p)

> +{

> +  return vminnmavq_p (a, b, p);

> +}

> +

> +/* { dg-final { scan-assembler-not "__ARM_undef" } } */

> +/* { dg-final { scan-assembler-times "vminnmavt.f32" 3 } } */

> diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vminnmvq_f16.c

> b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vminnmvq_f16.c

> index 4d4caae..0eb3a4a 100644

> --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vminnmvq_f16.c

> +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vminnmvq_f16.c

> @@ -10,7 +10,6 @@ foo (float16_t a, float16x8_t b)

>    return vminnmvq_f16 (a, b);

>  }

> 

> -/* { dg-final { scan-assembler "vminnmv.f16"  }  } */

> 

>  float16_t

>  foo1 (float16_t a, float16x8_t b)

> @@ -18,4 +17,12 @@ foo1 (float16_t a, float16x8_t b)

>    return vminnmvq (a, b);

>  }

> 

> -/* { dg-final { scan-assembler "vminnmv.f16"  }  } */

> +

> +float16_t

> +foo2 (float32_t a, float16x8_t b)

> +{

> +  return vminnmvq (a, b);

> +}

> +

> +/* { dg-final { scan-assembler-not "__ARM_undef" } } */

> +/* { dg-final { scan-assembler-times "vminnmv.f16" 3 } } */

> diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vminnmvq_f32.c

> b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vminnmvq_f32.c

> index dab04d9..f318350 100644

> --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vminnmvq_f32.c

> +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vminnmvq_f32.c

> @@ -10,7 +10,6 @@ foo (float32_t a, float32x4_t b)

>    return vminnmvq_f32 (a, b);

>  }

> 

> -/* { dg-final { scan-assembler "vminnmv.f32"  }  } */

> 

>  float32_t

>  foo1 (float32_t a, float32x4_t b)

> @@ -18,4 +17,12 @@ foo1 (float32_t a, float32x4_t b)

>    return vminnmvq (a, b);

>  }

> 

> -/* { dg-final { scan-assembler "vminnmv.f32"  }  } */

> +

> +float32_t

> +foo2 (float16_t a, float32x4_t b)

> +{

> +  return vminnmvq (a, b);

> +}

> +

> +/* { dg-final { scan-assembler-not "__ARM_undef" } } */

> +/* { dg-final { scan-assembler-times "vminnmv.f32" 3 } } */

> diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vminnmvq_p_f16.c

> b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vminnmvq_p_f16.c

> index f5eafb1..16f6ac5 100644

> --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vminnmvq_p_f16.c

> +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vminnmvq_p_f16.c

> @@ -10,7 +10,6 @@ foo (float16_t a, float16x8_t b, mve_pred16_t p)

>    return vminnmvq_p_f16 (a, b, p);

>  }

> 

> -/* { dg-final { scan-assembler "vminnmvt.f16"  }  } */

> 

>  float16_t

>  foo1 (float16_t a, float16x8_t b, mve_pred16_t p)

> @@ -18,4 +17,12 @@ foo1 (float16_t a, float16x8_t b, mve_pred16_t p)

>    return vminnmvq_p (a, b, p);

>  }

> 

> -/* { dg-final { scan-assembler "vminnmvt.f16"  }  } */

> +

> +float16_t

> +foo2 (float32_t a, float16x8_t b, mve_pred16_t p)

> +{

> +  return vminnmvq_p (a, b, p);

> +}

> +

> +/* { dg-final { scan-assembler-not "__ARM_undef" } } */

> +/* { dg-final { scan-assembler-times "vminnmvt.f16" 3 } } */

> diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vminnmvq_p_f32.c

> b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vminnmvq_p_f32.c

> index 5ac20bf..a8e4f9f 100644

> --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vminnmvq_p_f32.c

> +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vminnmvq_p_f32.c

> @@ -10,7 +10,6 @@ foo (float32_t a, float32x4_t b, mve_pred16_t p)

>    return vminnmvq_p_f32 (a, b, p);

>  }

> 

> -/* { dg-final { scan-assembler "vminnmvt.f32"  }  } */

> 

>  float32_t

>  foo1 (float32_t a, float32x4_t b, mve_pred16_t p)

> @@ -18,4 +17,12 @@ foo1 (float32_t a, float32x4_t b, mve_pred16_t p)

>    return vminnmvq_p (a, b, p);

>  }

> 

> -/* { dg-final { scan-assembler "vminnmvt.f32"  }  } */

> +

> +float32_t

> +foo2 (float16_t a, float32x4_t b, mve_pred16_t p)

> +{

> +  return vminnmvq_p (a, b, p);

> +}

> +

> +/* { dg-final { scan-assembler-not "__ARM_undef" } } */

> +/* { dg-final { scan-assembler-times "vminnmvt.f32" 3 } } */

> diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vminvq_p_s16.c

> b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vminvq_p_s16.c

> index c2edb62..91bb63f 100644

> --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vminvq_p_s16.c

> +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vminvq_p_s16.c

> @@ -10,7 +10,6 @@ foo (int16_t a, int16x8_t b, mve_pred16_t p)

>    return vminvq_p_s16 (a, b, p);

>  }

> 

> -/* { dg-final { scan-assembler "vminvt.s16"  }  } */

> 

>  int16_t

>  foo1 (int16_t a, int16x8_t b, mve_pred16_t p)

> @@ -18,4 +17,12 @@ foo1 (int16_t a, int16x8_t b, mve_pred16_t p)

>    return vminvq_p (a, b, p);

>  }

> 

> -/* { dg-final { scan-assembler "vminvt.s16"  }  } */

> +

> +int16_t

> +foo2 (int8_t a, int16x8_t b, mve_pred16_t p)

> +{

> +  return vminvq_p (a, b, p);

> +}

> +

> +/* { dg-final { scan-assembler-not "__ARM_undef" } } */

> +/* { dg-final { scan-assembler-times "vminvt.s16" 3 } } */

> diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vminvq_p_s32.c

> b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vminvq_p_s32.c

> index ba89217..a846701 100644

> --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vminvq_p_s32.c

> +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vminvq_p_s32.c

> @@ -10,7 +10,6 @@ foo (int32_t a, int32x4_t b, mve_pred16_t p)

>    return vminvq_p_s32 (a, b, p);

>  }

> 

> -/* { dg-final { scan-assembler "vminvt.s32"  }  } */

> 

>  int32_t

>  foo1 (int32_t a, int32x4_t b, mve_pred16_t p)

> @@ -18,4 +17,12 @@ foo1 (int32_t a, int32x4_t b, mve_pred16_t p)

>    return vminvq_p (a, b, p);

>  }

> 

> -/* { dg-final { scan-assembler "vminvt.s32"  }  } */

> +

> +int32_t

> +foo2 (int16_t a, int32x4_t b, mve_pred16_t p)

> +{

> +  return vminvq_p (a, b, p);

> +}

> +

> +/* { dg-final { scan-assembler-not "__ARM_undef" } } */

> +/* { dg-final { scan-assembler-times "vminvt.s32" 3 } } */

> diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vminvq_p_s8.c

> b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vminvq_p_s8.c

> index 1665c53..716d414 100644

> --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vminvq_p_s8.c

> +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vminvq_p_s8.c

> @@ -10,7 +10,6 @@ foo (int8_t a, int8x16_t b, mve_pred16_t p)

>    return vminvq_p_s8 (a, b, p);

>  }

> 

> -/* { dg-final { scan-assembler "vminvt.s8"  }  } */

> 

>  int8_t

>  foo1 (int8_t a, int8x16_t b, mve_pred16_t p)

> @@ -18,4 +17,12 @@ foo1 (int8_t a, int8x16_t b, mve_pred16_t p)

>    return vminvq_p (a, b, p);

>  }

> 

> -/* { dg-final { scan-assembler "vminvt.s8"  }  } */

> +

> +int8_t

> +foo2 (int32_t a, int8x16_t b, mve_pred16_t p)

> +{

> +  return vminvq_p (a, b, p);

> +}

> +

> +/* { dg-final { scan-assembler-not "__ARM_undef" } } */

> +/* { dg-final { scan-assembler-times "vminvt.s8" 3 } } */

> diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vminvq_p_u16.c

> b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vminvq_p_u16.c

> index 5bade0a..cc7f8fe 100644

> --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vminvq_p_u16.c

> +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vminvq_p_u16.c

> @@ -10,7 +10,6 @@ foo (uint16_t a, uint16x8_t b, mve_pred16_t p)

>    return vminvq_p_u16 (a, b, p);

>  }

> 

> -/* { dg-final { scan-assembler "vminvt.u16"  }  } */

> 

>  uint16_t

>  foo1 (uint16_t a, uint16x8_t b, mve_pred16_t p)

> @@ -18,4 +17,12 @@ foo1 (uint16_t a, uint16x8_t b, mve_pred16_t p)

>    return vminvq_p (a, b, p);

>  }

> 

> -/* { dg-final { scan-assembler "vminvt.u16"  }  } */

> +

> +uint16_t

> +foo2 (uint32_t a, uint16x8_t b, mve_pred16_t p)

> +{

> +  return vminvq_p (a, b, p);

> +}

> +

> +/* { dg-final { scan-assembler-not "__ARM_undef" } } */

> +/* { dg-final { scan-assembler-times "vminvt.u16" 3 } } */

> diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vminvq_p_u32.c

> b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vminvq_p_u32.c

> index c4c5748..6bde0be 100644

> --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vminvq_p_u32.c

> +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vminvq_p_u32.c

> @@ -10,7 +10,6 @@ foo (uint32_t a, uint32x4_t b, mve_pred16_t p)

>    return vminvq_p_u32 (a, b, p);

>  }

> 

> -/* { dg-final { scan-assembler "vminvt.u32"  }  } */

> 

>  uint32_t

>  foo1 (uint32_t a, uint32x4_t b, mve_pred16_t p)

> @@ -18,4 +17,12 @@ foo1 (uint32_t a, uint32x4_t b, mve_pred16_t p)

>    return vminvq_p (a, b, p);

>  }

> 

> -/* { dg-final { scan-assembler "vminvt.u32"  }  } */

> +

> +uint32_t

> +foo2 (uint8_t a, uint32x4_t b, mve_pred16_t p)

> +{

> +  return vminvq_p (a, b, p);

> +}

> +

> +/* { dg-final { scan-assembler-not "__ARM_undef" } } */

> +/* { dg-final { scan-assembler-times "vminvt.u32" 3 } } */

> diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vminvq_p_u8.c

> b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vminvq_p_u8.c

> index dc890dc..bb89490 100644

> --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vminvq_p_u8.c

> +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vminvq_p_u8.c

> @@ -10,7 +10,6 @@ foo (uint8_t a, uint8x16_t b, mve_pred16_t p)

>    return vminvq_p_u8 (a, b, p);

>  }

> 

> -/* { dg-final { scan-assembler "vminvt.u8"  }  } */

> 

>  uint8_t

>  foo1 (uint8_t a, uint8x16_t b, mve_pred16_t p)

> @@ -18,4 +17,12 @@ foo1 (uint8_t a, uint8x16_t b, mve_pred16_t p)

>    return vminvq_p (a, b, p);

>  }

> 

> -/* { dg-final { scan-assembler "vminvt.u8"  }  } */

> +

> +uint8_t

> +foo2 (uint16_t a, uint8x16_t b, mve_pred16_t p)

> +{

> +  return vminvq_p (a, b, p);

> +}

> +

> +/* { dg-final { scan-assembler-not "__ARM_undef" } } */

> +/* { dg-final { scan-assembler-times "vminvt.u8" 3 } } */

> diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vminvq_s16.c

> b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vminvq_s16.c

> index f6eed63..6d589aa 100644

> --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vminvq_s16.c

> +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vminvq_s16.c

> @@ -10,7 +10,6 @@ foo (int16_t a, int16x8_t b)

>    return vminvq_s16 (a, b);

>  }

> 

> -/* { dg-final { scan-assembler "vminv.s16"  }  } */

> 

>  int16_t

>  foo1 (int16_t a, int16x8_t b)

> @@ -18,4 +17,11 @@ foo1 (int16_t a, int16x8_t b)

>    return vminvq (a, b);

>  }

> 

> -/* { dg-final { scan-assembler "vminv.s16"  }  } */

> +int16_t

> +foo2 (int8_t a, int16x8_t b)

> +{

> +  return vminvq (a, b);

> +}

> +

> +/* { dg-final { scan-assembler-not "__ARM_undef" } } */

> +/* { dg-final { scan-assembler-times "vminv.s16" 3 } } */

> diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vminvq_s32.c

> b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vminvq_s32.c

> index 4077c32..7c727d6 100644

> --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vminvq_s32.c

> +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vminvq_s32.c

> @@ -10,7 +10,6 @@ foo (int32_t a, int32x4_t b)

>    return vminvq_s32 (a, b);

>  }

> 

> -/* { dg-final { scan-assembler "vminv.s32"  }  } */

> 

>  int32_t

>  foo1 (int32_t a, int32x4_t b)

> @@ -18,4 +17,11 @@ foo1 (int32_t a, int32x4_t b)

>    return vminvq (a, b);

>  }

> 

> -/* { dg-final { scan-assembler "vminv.s32"  }  } */

> +int32_t

> +foo2 (int8_t a, int32x4_t b)

> +{

> +  return vminvq (a, b);

> +}

> +

> +/* { dg-final { scan-assembler-not "__ARM_undef" } } */

> +/* { dg-final { scan-assembler-times "vminv.s32" 3 } } */

> diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vminvq_s8.c

> b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vminvq_s8.c

> index bdf15f4..7630948 100644

> --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vminvq_s8.c

> +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vminvq_s8.c

> @@ -10,7 +10,6 @@ foo (int8_t a, int8x16_t b)

>    return vminvq_s8 (a, b);

>  }

> 

> -/* { dg-final { scan-assembler "vminv.s8"  }  } */

> 

>  int8_t

>  foo1 (int8_t a, int8x16_t b)

> @@ -18,4 +17,11 @@ foo1 (int8_t a, int8x16_t b)

>    return vminvq (a, b);

>  }

> 

> -/* { dg-final { scan-assembler "vminv.s8"  }  } */

> +int8_t

> +foo2 (int32_t a, int8x16_t b)

> +{

> +  return vminvq (a, b);

> +}

> +

> +/* { dg-final { scan-assembler-not "__ARM_undef" } } */

> +/* { dg-final { scan-assembler-times "vminv.s8" 3 } } */

> diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vminvq_u16.c

> b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vminvq_u16.c

> index 5c0935c..698975f 100644

> --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vminvq_u16.c

> +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vminvq_u16.c

> @@ -10,7 +10,6 @@ foo (uint16_t a, uint16x8_t b)

>    return vminvq_u16 (a, b);

>  }

> 

> -/* { dg-final { scan-assembler "vminv.u16"  }  } */

> 

>  uint16_t

>  foo1 (uint16_t a, uint16x8_t b)

> @@ -18,4 +17,12 @@ foo1 (uint16_t a, uint16x8_t b)

>    return vminvq (a, b);

>  }

> 

> -/* { dg-final { scan-assembler "vminv.u16"  }  } */

> +

> +uint8_t

> +foo2 (uint32_t a, uint16x8_t b)

> +{

> +  return vminvq (a, b);

> +}

> +

> +/* { dg-final { scan-assembler-not "__ARM_undef" } } */

> +/* { dg-final { scan-assembler-times "vminv.u16" 3 } } */

> diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vminvq_u32.c

> b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vminvq_u32.c

> index 1580c87..7489f81 100644

> --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vminvq_u32.c

> +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vminvq_u32.c

> @@ -10,7 +10,6 @@ foo (uint32_t a, uint32x4_t b)

>    return vminvq_u32 (a, b);

>  }

> 

> -/* { dg-final { scan-assembler "vminv.u32"  }  } */

> 

>  uint32_t

>  foo1 (uint32_t a, uint32x4_t b)

> @@ -18,4 +17,11 @@ foo1 (uint32_t a, uint32x4_t b)

>    return vminvq (a, b);

>  }

> 

> -/* { dg-final { scan-assembler "vminv.u32"  }  } */

> +uint32_t

> +foo2 (uint16_t a, uint32x4_t b)

> +{

> +  return vminvq (a, b);

> +}

> +

> +/* { dg-final { scan-assembler-not "__ARM_undef" } } */

> +/* { dg-final { scan-assembler-times "vminv.u32" 3 } } */

> diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vminvq_u8.c

> b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vminvq_u8.c

> index 95919b4..aa2b986 100644

> --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vminvq_u8.c

> +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vminvq_u8.c

> @@ -10,7 +10,6 @@ foo (uint8_t a, uint8x16_t b)

>    return vminvq_u8 (a, b);

>  }

> 

> -/* { dg-final { scan-assembler "vminv.u8"  }  } */

> 

>  uint8_t

>  foo1 (uint8_t a, uint8x16_t b)

> @@ -18,4 +17,12 @@ foo1 (uint8_t a, uint8x16_t b)

>    return vminvq (a, b);

>  }

> 

> -/* { dg-final { scan-assembler "vminv.u8"  }  } */

> +

> +uint16_t

> +foo2 (uint32_t a, uint8x16_t b)

> +{

> +  return vminvq (a, b);

> +}

> +

> +/* { dg-final { scan-assembler-not "__ARM_undef" } } */

> +/* { dg-final { scan-assembler-times "vminv.u8" 3 } } */

> --

> 2.7.4

Patch

diff --git a/gcc/config/arm/arm_mve.h b/gcc/config/arm/arm_mve.h
index a801705..e1de877 100644
--- a/gcc/config/arm/arm_mve.h
+++ b/gcc/config/arm/arm_mve.h
@@ -36179,8 +36179,8 @@  extern void *__ARM_undef;
 #define __arm_vmaxnmavq(p0,p1) ({ __typeof(p0) __p0 = (p0); \
   __typeof(p1) __p1 = (p1); \
   _Generic( (int (*)[__ARM_mve_typeid(__p0)][__ARM_mve_typeid(__p1)])0, \
-  int (*)[__ARM_mve_type_fp_n][__ARM_mve_type_float16x8_t]: __arm_vmaxnmavq_f16 (__ARM_mve_coerce(__p0, float16_t), __ARM_mve_coerce(__p1, float16x8_t)), \
-  int (*)[__ARM_mve_type_fp_n][__ARM_mve_type_float32x4_t]: __arm_vmaxnmavq_f32 (__ARM_mve_coerce(__p0, float32_t), __ARM_mve_coerce(__p1, float32x4_t)));})
+  int (*)[__ARM_mve_type_fp_n][__ARM_mve_type_float16x8_t]: __arm_vmaxnmavq_f16 (__p0, __ARM_mve_coerce(__p1, float16x8_t)), \
+  int (*)[__ARM_mve_type_fp_n][__ARM_mve_type_float32x4_t]: __arm_vmaxnmavq_f32 (__p0, __ARM_mve_coerce(__p1, float32x4_t)));})
 
 #define __arm_vmaxnmq(p0,p1) ({ __typeof(p0) __p0 = (p0); \
   __typeof(p1) __p1 = (p1); \
@@ -36191,14 +36191,8 @@  extern void *__ARM_undef;
 #define __arm_vmaxnmvq(p0,p1) ({ __typeof(p0) __p0 = (p0); \
   __typeof(p1) __p1 = (p1); \
   _Generic( (int (*)[__ARM_mve_typeid(__p0)][__ARM_mve_typeid(__p1)])0, \
-  int (*)[__ARM_mve_type_fp_n][__ARM_mve_type_float16x8_t]: __arm_vmaxnmvq_f16 (__ARM_mve_coerce(__p0, float16_t), __ARM_mve_coerce(__p1, float16x8_t)), \
-  int (*)[__ARM_mve_type_fp_n][__ARM_mve_type_float32x4_t]: __arm_vmaxnmvq_f32 (__ARM_mve_coerce(__p0, float32_t), __ARM_mve_coerce(__p1, float32x4_t)));})
-
-#define __arm_vmaxnmvq(p0,p1) ({ __typeof(p0) __p0 = (p0); \
-  __typeof(p1) __p1 = (p1); \
-  _Generic( (int (*)[__ARM_mve_typeid(__p0)][__ARM_mve_typeid(__p1)])0, \
-  int (*)[__ARM_mve_type_fp_n][__ARM_mve_type_float16x8_t]: __arm_vmaxnmvq_f16 (__ARM_mve_coerce(__p0, float16_t), __ARM_mve_coerce(__p1, float16x8_t)), \
-  int (*)[__ARM_mve_type_fp_n][__ARM_mve_type_float32x4_t]: __arm_vmaxnmvq_f32 (__ARM_mve_coerce(__p0, float32_t), __ARM_mve_coerce(__p1, float32x4_t)));})
+  int (*)[__ARM_mve_type_fp_n][__ARM_mve_type_float16x8_t]: __arm_vmaxnmvq_f16 (__p0, __ARM_mve_coerce(__p1, float16x8_t)), \
+  int (*)[__ARM_mve_type_fp_n][__ARM_mve_type_float32x4_t]: __arm_vmaxnmvq_f32 (__p0, __ARM_mve_coerce(__p1, float32x4_t)));})
 
 #define __arm_vminnmaq(p0,p1) ({ __typeof(p0) __p0 = (p0); \
   __typeof(p1) __p1 = (p1); \
@@ -36209,8 +36203,8 @@  extern void *__ARM_undef;
 #define __arm_vminnmavq(p0,p1) ({ __typeof(p0) __p0 = (p0); \
   __typeof(p1) __p1 = (p1); \
   _Generic( (int (*)[__ARM_mve_typeid(__p0)][__ARM_mve_typeid(__p1)])0, \
-  int (*)[__ARM_mve_type_fp_n][__ARM_mve_type_float16x8_t]: __arm_vminnmavq_f16 (__ARM_mve_coerce(__p0, float16_t), __ARM_mve_coerce(__p1, float16x8_t)), \
-  int (*)[__ARM_mve_type_fp_n][__ARM_mve_type_float32x4_t]: __arm_vminnmavq_f32 (__ARM_mve_coerce(__p0, float32_t), __ARM_mve_coerce(__p1, float32x4_t)));})
+  int (*)[__ARM_mve_type_fp_n][__ARM_mve_type_float16x8_t]: __arm_vminnmavq_f16 (__p0, __ARM_mve_coerce(__p1, float16x8_t)), \
+  int (*)[__ARM_mve_type_fp_n][__ARM_mve_type_float32x4_t]: __arm_vminnmavq_f32 (__p0, __ARM_mve_coerce(__p1, float32x4_t)));})
 
 #define __arm_vbrsrq(p0,p1) ({ __typeof(p0) __p0 = (p0); \
   _Generic( (int (*)[__ARM_mve_typeid(__p0)])0, \
@@ -36252,8 +36246,8 @@  extern void *__ARM_undef;
 #define __arm_vminnmvq(p0,p1) ({ __typeof(p0) __p0 = (p0); \
   __typeof(p1) __p1 = (p1); \
   _Generic( (int (*)[__ARM_mve_typeid(__p0)][__ARM_mve_typeid(__p1)])0, \
-  int (*)[__ARM_mve_type_fp_n][__ARM_mve_type_float16x8_t]: __arm_vminnmvq_f16 (__ARM_mve_coerce(__p0, float16_t), __ARM_mve_coerce(__p1, float16x8_t)), \
-  int (*)[__ARM_mve_type_fp_n][__ARM_mve_type_float32x4_t]: __arm_vminnmvq_f32 (__ARM_mve_coerce(__p0, float32_t), __ARM_mve_coerce(__p1, float32x4_t)));})
+  int (*)[__ARM_mve_type_fp_n][__ARM_mve_type_float16x8_t]: __arm_vminnmvq_f16 (__p0, __ARM_mve_coerce(__p1, float16x8_t)), \
+  int (*)[__ARM_mve_type_fp_n][__ARM_mve_type_float32x4_t]: __arm_vminnmvq_f32 (__p0, __ARM_mve_coerce(__p1, float32x4_t)));})
 
 #define __arm_vshlq_r(p0,p1) ({ __typeof(p0) __p0 = (p0); \
   _Generic( (int (*)[__ARM_mve_typeid(__p0)])0, \
@@ -37156,14 +37150,14 @@  extern void *__ARM_undef;
 #define __arm_vmaxnmavq_p(p0,p1,p2) ({ __typeof(p0) __p0 = (p0); \
   __typeof(p1) __p1 = (p1); \
   _Generic( (int (*)[__ARM_mve_typeid(__p0)][__ARM_mve_typeid(__p1)])0, \
-  int (*)[__ARM_mve_type_fp_n][__ARM_mve_type_float16x8_t]: __arm_vmaxnmavq_p_f16 (__ARM_mve_coerce(__p0, float16_t), __ARM_mve_coerce(__p1, float16x8_t), p2), \
-  int (*)[__ARM_mve_type_fp_n][__ARM_mve_type_float32x4_t]: __arm_vmaxnmavq_p_f32 (__ARM_mve_coerce(__p0, float32_t), __ARM_mve_coerce(__p1, float32x4_t), p2));})
+  int (*)[__ARM_mve_type_fp_n][__ARM_mve_type_float16x8_t]: __arm_vmaxnmavq_p_f16 (__p0, __ARM_mve_coerce(__p1, float16x8_t), p2), \
+  int (*)[__ARM_mve_type_fp_n][__ARM_mve_type_float32x4_t]: __arm_vmaxnmavq_p_f32 (__p0, __ARM_mve_coerce(__p1, float32x4_t), p2));})
 
 #define __arm_vmaxnmvq_p(p0,p1,p2) ({ __typeof(p0) __p0 = (p0); \
   __typeof(p1) __p1 = (p1); \
   _Generic( (int (*)[__ARM_mve_typeid(__p0)][__ARM_mve_typeid(__p1)])0, \
-  int (*)[__ARM_mve_type_fp_n][__ARM_mve_type_float16x8_t]: __arm_vmaxnmvq_p_f16 (__ARM_mve_coerce(__p0, float16_t), __ARM_mve_coerce(__p1, float16x8_t), p2), \
-  int (*)[__ARM_mve_type_fp_n][__ARM_mve_type_float32x4_t]: __arm_vmaxnmvq_p_f32 (__ARM_mve_coerce(__p0, float32_t), __ARM_mve_coerce(__p1, float32x4_t), p2));})
+  int (*)[__ARM_mve_type_fp_n][__ARM_mve_type_float16x8_t]: __arm_vmaxnmvq_p_f16 (__p0, __ARM_mve_coerce(__p1, float16x8_t), p2), \
+  int (*)[__ARM_mve_type_fp_n][__ARM_mve_type_float32x4_t]: __arm_vmaxnmvq_p_f32 (__p0, __ARM_mve_coerce(__p1, float32x4_t), p2));})
 
 #define __arm_vminnmaq_m(p0,p1,p2) ({ __typeof(p0) __p0 = (p0); \
   __typeof(p1) __p1 = (p1); \
@@ -37174,14 +37168,14 @@  extern void *__ARM_undef;
 #define __arm_vminnmavq_p(p0,p1,p2) ({ __typeof(p0) __p0 = (p0); \
   __typeof(p1) __p1 = (p1); \
   _Generic( (int (*)[__ARM_mve_typeid(__p0)][__ARM_mve_typeid(__p1)])0, \
-  int (*)[__ARM_mve_type_fp_n][__ARM_mve_type_float16x8_t]: __arm_vminnmavq_p_f16 (__ARM_mve_coerce(__p0, float16_t), __ARM_mve_coerce(__p1, float16x8_t), p2), \
-  int (*)[__ARM_mve_type_fp_n][__ARM_mve_type_float32x4_t]: __arm_vminnmavq_p_f32 (__ARM_mve_coerce(__p0, float32_t), __ARM_mve_coerce(__p1, float32x4_t), p2));})
+  int (*)[__ARM_mve_type_fp_n][__ARM_mve_type_float16x8_t]: __arm_vminnmavq_p_f16 (__p0, __ARM_mve_coerce(__p1, float16x8_t), p2), \
+  int (*)[__ARM_mve_type_fp_n][__ARM_mve_type_float32x4_t]: __arm_vminnmavq_p_f32 (__p0, __ARM_mve_coerce(__p1, float32x4_t), p2));})
 
 #define __arm_vminnmvq_p(p0,p1,p2) ({ __typeof(p0) __p0 = (p0); \
   __typeof(p1) __p1 = (p1); \
   _Generic( (int (*)[__ARM_mve_typeid(__p0)][__ARM_mve_typeid(__p1)])0, \
-  int (*)[__ARM_mve_type_fp_n][__ARM_mve_type_float16x8_t]: __arm_vminnmvq_p_f16 (__ARM_mve_coerce(__p0, float16_t), __ARM_mve_coerce(__p1, float16x8_t), p2), \
-  int (*)[__ARM_mve_type_fp_n][__ARM_mve_type_float32x4_t]: __arm_vminnmvq_p_f32 (__ARM_mve_coerce(__p0, float32_t), __ARM_mve_coerce(__p1, float32x4_t), p2));})
+  int (*)[__ARM_mve_type_fp_n][__ARM_mve_type_float16x8_t]: __arm_vminnmvq_p_f16 (__p0, __ARM_mve_coerce(__p1, float16x8_t), p2), \
+  int (*)[__ARM_mve_type_fp_n][__ARM_mve_type_float32x4_t]: __arm_vminnmvq_p_f32 (__p0, __ARM_mve_coerce(__p1, float32x4_t), p2));})
 
 #define __arm_vrndnq_m(p0,p1,p2) ({ __typeof(p0) __p0 = (p0); \
   __typeof(p1) __p1 = (p1); \
@@ -41679,16 +41673,16 @@  extern void *__ARM_undef;
 #define __arm_vmaxavq(p0,p1) ({ __typeof(p0) __p0 = (p0); \
   __typeof(p1) __p1 = (p1); \
   _Generic( (int (*)[__ARM_mve_typeid(__p0)][__ARM_mve_typeid(__p1)])0, \
-  int (*)[__ARM_mve_type_int_n][__ARM_mve_type_int8x16_t]: __arm_vmaxavq_s8 (__ARM_mve_coerce(__p0, uint8_t), __ARM_mve_coerce(__p1, int8x16_t)), \
-  int (*)[__ARM_mve_type_int_n][__ARM_mve_type_int16x8_t]: __arm_vmaxavq_s16 (__ARM_mve_coerce(__p0, uint16_t), __ARM_mve_coerce(__p1, int16x8_t)), \
-  int (*)[__ARM_mve_type_int_n][__ARM_mve_type_int32x4_t]: __arm_vmaxavq_s32 (__ARM_mve_coerce(__p0, uint32_t), __ARM_mve_coerce(__p1, int32x4_t)));})
+  int (*)[__ARM_mve_type_int_n][__ARM_mve_type_int8x16_t]: __arm_vmaxavq_s8 (__p0, __ARM_mve_coerce(__p1, int8x16_t)), \
+  int (*)[__ARM_mve_type_int_n][__ARM_mve_type_int16x8_t]: __arm_vmaxavq_s16 (__p0, __ARM_mve_coerce(__p1, int16x8_t)), \
+  int (*)[__ARM_mve_type_int_n][__ARM_mve_type_int32x4_t]: __arm_vmaxavq_s32 (__p0, __ARM_mve_coerce(__p1, int32x4_t)));})
 
 #define __arm_vmaxavq_p(p0,p1,p2) ({ __typeof(p0) __p0 = (p0); \
   __typeof(p1) __p1 = (p1); \
   _Generic( (int (*)[__ARM_mve_typeid(__p0)][__ARM_mve_typeid(__p1)])0, \
-  int (*)[__ARM_mve_type_int_n][__ARM_mve_type_int8x16_t]: __arm_vmaxavq_p_s8 (__ARM_mve_coerce(__p0, uint8_t), __ARM_mve_coerce(__p1, int8x16_t), p2), \
-  int (*)[__ARM_mve_type_int_n][__ARM_mve_type_int16x8_t]: __arm_vmaxavq_p_s16 (__ARM_mve_coerce(__p0, uint16_t), __ARM_mve_coerce(__p1, int16x8_t), p2), \
-  int (*)[__ARM_mve_type_int_n][__ARM_mve_type_int32x4_t]: __arm_vmaxavq_p_s32 (__ARM_mve_coerce(__p0, uint32_t), __ARM_mve_coerce(__p1, int32x4_t), p2));})
+  int (*)[__ARM_mve_type_int_n][__ARM_mve_type_int8x16_t]: __arm_vmaxavq_p_s8 (__p0, __ARM_mve_coerce(__p1, int8x16_t), p2), \
+  int (*)[__ARM_mve_type_int_n][__ARM_mve_type_int16x8_t]: __arm_vmaxavq_p_s16 (__p0, __ARM_mve_coerce(__p1, int16x8_t), p2), \
+  int (*)[__ARM_mve_type_int_n][__ARM_mve_type_int32x4_t]: __arm_vmaxavq_p_s32 (__p0, __ARM_mve_coerce(__p1, int32x4_t), p2));})
 
 #define __arm_vmaxq_x(p1,p2,p3) ({ __typeof(p1) __p1 = (p1); \
   __typeof(p2) __p2 = (p2); \
@@ -41703,36 +41697,36 @@  extern void *__ARM_undef;
 #define __arm_vmaxvq(p0,p1) ({ __typeof(p0) __p0 = (p0); \
   __typeof(p1) __p1 = (p1); \
   _Generic( (int (*)[__ARM_mve_typeid(__p0)][__ARM_mve_typeid(__p1)])0, \
-  int (*)[__ARM_mve_type_int_n][__ARM_mve_type_int8x16_t]: __arm_vmaxvq_s8 (__ARM_mve_coerce(__p0, int8_t), __ARM_mve_coerce(__p1, int8x16_t)), \
-  int (*)[__ARM_mve_type_int_n][__ARM_mve_type_int16x8_t]: __arm_vmaxvq_s16 (__ARM_mve_coerce(__p0, int16_t), __ARM_mve_coerce(__p1, int16x8_t)), \
-  int (*)[__ARM_mve_type_int_n][__ARM_mve_type_int32x4_t]: __arm_vmaxvq_s32 (__ARM_mve_coerce(__p0, int32_t), __ARM_mve_coerce(__p1, int32x4_t)), \
-  int (*)[__ARM_mve_type_int_n][__ARM_mve_type_uint8x16_t]: __arm_vmaxvq_u8 (__ARM_mve_coerce(__p0, uint8_t), __ARM_mve_coerce(__p1, uint8x16_t)), \
-  int (*)[__ARM_mve_type_int_n][__ARM_mve_type_uint16x8_t]: __arm_vmaxvq_u16 (__ARM_mve_coerce(__p0, uint16_t), __ARM_mve_coerce(__p1, uint16x8_t)), \
-  int (*)[__ARM_mve_type_int_n][__ARM_mve_type_uint32x4_t]: __arm_vmaxvq_u32 (__ARM_mve_coerce(__p0, uint32_t), __ARM_mve_coerce(__p1, uint32x4_t)));})
+  int (*)[__ARM_mve_type_int_n][__ARM_mve_type_int8x16_t]: __arm_vmaxvq_s8 (__p0, __ARM_mve_coerce(__p1, int8x16_t)), \
+  int (*)[__ARM_mve_type_int_n][__ARM_mve_type_int16x8_t]: __arm_vmaxvq_s16 (__p0, __ARM_mve_coerce(__p1, int16x8_t)), \
+  int (*)[__ARM_mve_type_int_n][__ARM_mve_type_int32x4_t]: __arm_vmaxvq_s32 (__p0, __ARM_mve_coerce(__p1, int32x4_t)), \
+  int (*)[__ARM_mve_type_int_n][__ARM_mve_type_uint8x16_t]: __arm_vmaxvq_u8 (__p0, __ARM_mve_coerce(__p1, uint8x16_t)), \
+  int (*)[__ARM_mve_type_int_n][__ARM_mve_type_uint16x8_t]: __arm_vmaxvq_u16 (__p0, __ARM_mve_coerce(__p1, uint16x8_t)), \
+  int (*)[__ARM_mve_type_int_n][__ARM_mve_type_uint32x4_t]: __arm_vmaxvq_u32 (__p0,__ARM_mve_coerce(__p1, uint32x4_t)));})
 
 #define __arm_vmaxvq_p(p0,p1,p2) ({ __typeof(p0) __p0 = (p0); \
   __typeof(p1) __p1 = (p1); \
   _Generic( (int (*)[__ARM_mve_typeid(__p0)][__ARM_mve_typeid(__p1)])0, \
-  int (*)[__ARM_mve_type_int_n][__ARM_mve_type_int8x16_t]: __arm_vmaxvq_p_s8 (__ARM_mve_coerce(__p0, int8_t), __ARM_mve_coerce(__p1, int8x16_t), p2), \
-  int (*)[__ARM_mve_type_int_n][__ARM_mve_type_int16x8_t]: __arm_vmaxvq_p_s16 (__ARM_mve_coerce(__p0, int16_t), __ARM_mve_coerce(__p1, int16x8_t), p2), \
-  int (*)[__ARM_mve_type_int_n][__ARM_mve_type_int32x4_t]: __arm_vmaxvq_p_s32 (__ARM_mve_coerce(__p0, int32_t), __ARM_mve_coerce(__p1, int32x4_t), p2), \
-  int (*)[__ARM_mve_type_int_n][__ARM_mve_type_uint8x16_t]: __arm_vmaxvq_p_u8 (__ARM_mve_coerce(__p0, uint8_t), __ARM_mve_coerce(__p1, uint8x16_t), p2), \
-  int (*)[__ARM_mve_type_int_n][__ARM_mve_type_uint16x8_t]: __arm_vmaxvq_p_u16 (__ARM_mve_coerce(__p0, uint16_t), __ARM_mve_coerce(__p1, uint16x8_t), p2), \
-  int (*)[__ARM_mve_type_int_n][__ARM_mve_type_uint32x4_t]: __arm_vmaxvq_p_u32 (__ARM_mve_coerce(__p0, uint32_t), __ARM_mve_coerce(__p1, uint32x4_t), p2));})
+  int (*)[__ARM_mve_type_int_n][__ARM_mve_type_int8x16_t]: __arm_vmaxvq_p_s8 (__p0, __ARM_mve_coerce(__p1, int8x16_t), p2), \
+  int (*)[__ARM_mve_type_int_n][__ARM_mve_type_int16x8_t]: __arm_vmaxvq_p_s16 (__p0, __ARM_mve_coerce(__p1, int16x8_t), p2), \
+  int (*)[__ARM_mve_type_int_n][__ARM_mve_type_int32x4_t]: __arm_vmaxvq_p_s32 (__p0, __ARM_mve_coerce(__p1, int32x4_t), p2), \
+  int (*)[__ARM_mve_type_int_n][__ARM_mve_type_uint8x16_t]: __arm_vmaxvq_p_u8 (__p0, __ARM_mve_coerce(__p1, uint8x16_t), p2), \
+  int (*)[__ARM_mve_type_int_n][__ARM_mve_type_uint16x8_t]: __arm_vmaxvq_p_u16 (__p0, __ARM_mve_coerce(__p1, uint16x8_t), p2), \
+  int (*)[__ARM_mve_type_int_n][__ARM_mve_type_uint32x4_t]: __arm_vmaxvq_p_u32 (__p0, __ARM_mve_coerce(__p1, uint32x4_t), p2));})
 
 #define __arm_vminavq(p0,p1) ({ __typeof(p0) __p0 = (p0); \
   __typeof(p1) __p1 = (p1); \
   _Generic( (int (*)[__ARM_mve_typeid(__p0)][__ARM_mve_typeid(__p1)])0, \
-  int (*)[__ARM_mve_type_int_n][__ARM_mve_type_int8x16_t]: __arm_vminavq_s8 (__ARM_mve_coerce(__p0, uint8_t), __ARM_mve_coerce(__p1, int8x16_t)), \
-  int (*)[__ARM_mve_type_int_n][__ARM_mve_type_int16x8_t]: __arm_vminavq_s16 (__ARM_mve_coerce(__p0, uint16_t), __ARM_mve_coerce(__p1, int16x8_t)), \
-  int (*)[__ARM_mve_type_int_n][__ARM_mve_type_int32x4_t]: __arm_vminavq_s32 (__ARM_mve_coerce(__p0, uint32_t), __ARM_mve_coerce(__p1, int32x4_t)));})
+  int (*)[__ARM_mve_type_int_n][__ARM_mve_type_int8x16_t]: __arm_vminavq_s8 (__p0, __ARM_mve_coerce(__p1, int8x16_t)), \
+  int (*)[__ARM_mve_type_int_n][__ARM_mve_type_int16x8_t]: __arm_vminavq_s16 (__p0, __ARM_mve_coerce(__p1, int16x8_t)), \
+  int (*)[__ARM_mve_type_int_n][__ARM_mve_type_int32x4_t]: __arm_vminavq_s32 (__p0, __ARM_mve_coerce(__p1, int32x4_t)));})
 
 #define __arm_vminavq_p(p0,p1,p2) ({ __typeof(p0) __p0 = (p0); \
   __typeof(p1) __p1 = (p1); \
   _Generic( (int (*)[__ARM_mve_typeid(__p0)][__ARM_mve_typeid(__p1)])0, \
-  int (*)[__ARM_mve_type_int_n][__ARM_mve_type_int8x16_t]: __arm_vminavq_p_s8 (__ARM_mve_coerce(__p0, uint8_t), __ARM_mve_coerce(__p1, int8x16_t), p2), \
-  int (*)[__ARM_mve_type_int_n][__ARM_mve_type_int16x8_t]: __arm_vminavq_p_s16 (__ARM_mve_coerce(__p0, uint16_t), __ARM_mve_coerce(__p1, int16x8_t), p2), \
-  int (*)[__ARM_mve_type_int_n][__ARM_mve_type_int32x4_t]: __arm_vminavq_p_s32 (__ARM_mve_coerce(__p0, uint32_t), __ARM_mve_coerce(__p1, int32x4_t), p2));})
+  int (*)[__ARM_mve_type_int_n][__ARM_mve_type_int8x16_t]: __arm_vminavq_p_s8 (__p0, __ARM_mve_coerce(__p1, int8x16_t), p2), \
+  int (*)[__ARM_mve_type_int_n][__ARM_mve_type_int16x8_t]: __arm_vminavq_p_s16 (__p0, __ARM_mve_coerce(__p1, int16x8_t), p2), \
+  int (*)[__ARM_mve_type_int_n][__ARM_mve_type_int32x4_t]: __arm_vminavq_p_s32 (__p0, __ARM_mve_coerce(__p1, int32x4_t), p2));})
 
 #define __arm_vminq_x(p1,p2,p3) ({ __typeof(p1) __p1 = (p1); \
   __typeof(p2) __p2 = (p2); \
@@ -41747,22 +41741,22 @@  extern void *__ARM_undef;
 #define __arm_vminvq(p0,p1) ({ __typeof(p0) __p0 = (p0); \
   __typeof(p1) __p1 = (p1); \
   _Generic( (int (*)[__ARM_mve_typeid(__p0)][__ARM_mve_typeid(__p1)])0, \
-  int (*)[__ARM_mve_type_int_n][__ARM_mve_type_int8x16_t]: __arm_vminvq_s8 (__ARM_mve_coerce(__p0, int8_t), __ARM_mve_coerce(__p1, int8x16_t)), \
-  int (*)[__ARM_mve_type_int_n][__ARM_mve_type_int16x8_t]: __arm_vminvq_s16 (__ARM_mve_coerce(__p0, int16_t), __ARM_mve_coerce(__p1, int16x8_t)), \
-  int (*)[__ARM_mve_type_int_n][__ARM_mve_type_int32x4_t]: __arm_vminvq_s32 (__ARM_mve_coerce(__p0, int32_t), __ARM_mve_coerce(__p1, int32x4_t)), \
-  int (*)[__ARM_mve_type_int_n][__ARM_mve_type_uint8x16_t]: __arm_vminvq_u8 (__ARM_mve_coerce(__p0, uint8_t), __ARM_mve_coerce(__p1, uint8x16_t)), \
-  int (*)[__ARM_mve_type_int_n][__ARM_mve_type_uint16x8_t]: __arm_vminvq_u16 (__ARM_mve_coerce(__p0, uint16_t), __ARM_mve_coerce(__p1, uint16x8_t)), \
-  int (*)[__ARM_mve_type_int_n][__ARM_mve_type_uint32x4_t]: __arm_vminvq_u32 (__ARM_mve_coerce(__p0, uint32_t), __ARM_mve_coerce(__p1, uint32x4_t)));})
+  int (*)[__ARM_mve_type_int_n][__ARM_mve_type_int8x16_t]: __arm_vminvq_s8 (__p0, __ARM_mve_coerce(__p1, int8x16_t)), \
+  int (*)[__ARM_mve_type_int_n][__ARM_mve_type_int16x8_t]: __arm_vminvq_s16 (__p0, __ARM_mve_coerce(__p1, int16x8_t)), \
+  int (*)[__ARM_mve_type_int_n][__ARM_mve_type_int32x4_t]: __arm_vminvq_s32 (__p0, __ARM_mve_coerce(__p1, int32x4_t)), \
+  int (*)[__ARM_mve_type_int_n][__ARM_mve_type_uint8x16_t]: __arm_vminvq_u8 (__p0, __ARM_mve_coerce(__p1, uint8x16_t)), \
+  int (*)[__ARM_mve_type_int_n][__ARM_mve_type_uint16x8_t]: __arm_vminvq_u16 (__p0, __ARM_mve_coerce(__p1, uint16x8_t)), \
+  int (*)[__ARM_mve_type_int_n][__ARM_mve_type_uint32x4_t]: __arm_vminvq_u32 (__p0, __ARM_mve_coerce(__p1, uint32x4_t)));})
 
 #define __arm_vminvq_p(p0,p1,p2) ({ __typeof(p0) __p0 = (p0); \
   __typeof(p1) __p1 = (p1); \
   _Generic( (int (*)[__ARM_mve_typeid(__p0)][__ARM_mve_typeid(__p1)])0, \
-  int (*)[__ARM_mve_type_int_n][__ARM_mve_type_int8x16_t]: __arm_vminvq_p_s8 (__ARM_mve_coerce(__p0, int8_t), __ARM_mve_coerce(__p1, int8x16_t), p2), \
-  int (*)[__ARM_mve_type_int_n][__ARM_mve_type_int16x8_t]: __arm_vminvq_p_s16 (__ARM_mve_coerce(__p0, int16_t), __ARM_mve_coerce(__p1, int16x8_t), p2), \
-  int (*)[__ARM_mve_type_int_n][__ARM_mve_type_int32x4_t]: __arm_vminvq_p_s32 (__ARM_mve_coerce(__p0, int32_t), __ARM_mve_coerce(__p1, int32x4_t), p2), \
-  int (*)[__ARM_mve_type_int_n][__ARM_mve_type_uint8x16_t]: __arm_vminvq_p_u8 (__ARM_mve_coerce(__p0, uint8_t), __ARM_mve_coerce(__p1, uint8x16_t), p2), \
-  int (*)[__ARM_mve_type_int_n][__ARM_mve_type_uint16x8_t]: __arm_vminvq_p_u16 (__ARM_mve_coerce(__p0, uint16_t), __ARM_mve_coerce(__p1, uint16x8_t), p2), \
-  int (*)[__ARM_mve_type_int_n][__ARM_mve_type_uint32x4_t]: __arm_vminvq_p_u32 (__ARM_mve_coerce(__p0, uint32_t), __ARM_mve_coerce(__p1, uint32x4_t), p2));})
+  int (*)[__ARM_mve_type_int_n][__ARM_mve_type_int8x16_t]: __arm_vminvq_p_s8 (__p0, __ARM_mve_coerce(__p1, int8x16_t), p2), \
+  int (*)[__ARM_mve_type_int_n][__ARM_mve_type_int16x8_t]: __arm_vminvq_p_s16 (__p0, __ARM_mve_coerce(__p1, int16x8_t), p2), \
+  int (*)[__ARM_mve_type_int_n][__ARM_mve_type_int32x4_t]: __arm_vminvq_p_s32 (__p0, __ARM_mve_coerce(__p1, int32x4_t), p2), \
+  int (*)[__ARM_mve_type_int_n][__ARM_mve_type_uint8x16_t]: __arm_vminvq_p_u8 (__p0, __ARM_mve_coerce(__p1, uint8x16_t), p2), \
+  int (*)[__ARM_mve_type_int_n][__ARM_mve_type_uint16x8_t]: __arm_vminvq_p_u16 (__p0, __ARM_mve_coerce(__p1, uint16x8_t), p2), \
+  int (*)[__ARM_mve_type_int_n][__ARM_mve_type_uint32x4_t]: __arm_vminvq_p_u32 (__p0, __ARM_mve_coerce(__p1, uint32x4_t), p2));})
 
 #define __arm_vmladavaq(p0,p1,p2) ({ __typeof(p0) __p0 = (p0); \
   __typeof(p1) __p1 = (p1); \
diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmaxavq_p_s16.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmaxavq_p_s16.c
index 02e0227..74ffad4 100644
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmaxavq_p_s16.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmaxavq_p_s16.c
@@ -10,7 +10,6 @@  foo (uint16_t a, int16x8_t b, mve_pred16_t p)
   return vmaxavq_p_s16 (a, b, p);
 }
 
-/* { dg-final { scan-assembler "vmaxavt.s16"  }  } */
 
 uint16_t
 foo1 (uint16_t a, int16x8_t b, mve_pred16_t p)
@@ -18,4 +17,12 @@  foo1 (uint16_t a, int16x8_t b, mve_pred16_t p)
   return vmaxavq_p (a, b, p);
 }
 
-/* { dg-final { scan-assembler "vmaxavt.s16"  }  } */
+
+int16_t
+foo2 (uint8_t a, int16x8_t b, mve_pred16_t p)
+{
+  return vmaxavq_p (a, b, p);
+}
+
+/* { dg-final { scan-assembler-not "__ARM_undef" } } */
+/* { dg-final { scan-assembler-times "vmaxavt.s16" 3 } } */
diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmaxavq_p_s32.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmaxavq_p_s32.c
index 7ecd94a..40800b0 100644
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmaxavq_p_s32.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmaxavq_p_s32.c
@@ -10,7 +10,6 @@  foo (uint32_t a, int32x4_t b, mve_pred16_t p)
   return vmaxavq_p_s32 (a, b, p);
 }
 
-/* { dg-final { scan-assembler "vmaxavt.s32"  }  } */
 
 uint32_t
 foo1 (uint32_t a, int32x4_t b, mve_pred16_t p)
@@ -18,4 +17,12 @@  foo1 (uint32_t a, int32x4_t b, mve_pred16_t p)
   return vmaxavq_p (a, b, p);
 }
 
-/* { dg-final { scan-assembler "vmaxavt.s32"  }  } */
+
+int32_t
+foo2 (uint16_t a, int32x4_t b, mve_pred16_t p)
+{
+  return vmaxavq_p (a, b, p);
+}
+
+/* { dg-final { scan-assembler-not "__ARM_undef" } } */
+/* { dg-final { scan-assembler-times "vmaxavt.s32" 3 } } */
diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmaxavq_p_s8.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmaxavq_p_s8.c
index 7a21de7..7638737 100644
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmaxavq_p_s8.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmaxavq_p_s8.c
@@ -10,7 +10,6 @@  foo (uint8_t a, int8x16_t b, mve_pred16_t p)
   return vmaxavq_p_s8 (a, b, p);
 }
 
-/* { dg-final { scan-assembler "vmaxavt.s8"  }  } */
 
 uint8_t
 foo1 (uint8_t a, int8x16_t b, mve_pred16_t p)
@@ -18,4 +17,12 @@  foo1 (uint8_t a, int8x16_t b, mve_pred16_t p)
   return vmaxavq_p (a, b, p);
 }
 
-/* { dg-final { scan-assembler "vmaxavt.s8"  }  } */
+
+int8_t
+foo2 (uint32_t a, int8x16_t b, mve_pred16_t p)
+{
+  return vmaxavq_p (a, b, p);
+}
+
+/* { dg-final { scan-assembler-not "__ARM_undef" } } */
+/* { dg-final { scan-assembler-times "vmaxavt.s8" 3 } } */
diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmaxavq_s16.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmaxavq_s16.c
index 4621eba..0dca149 100644
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmaxavq_s16.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmaxavq_s16.c
@@ -10,7 +10,6 @@  foo (uint16_t a, int16x8_t b)
   return vmaxavq_s16 (a, b);
 }
 
-/* { dg-final { scan-assembler "vmaxav.s16"  }  } */
 
 uint16_t
 foo1 (uint16_t a, int16x8_t b)
@@ -18,4 +17,12 @@  foo1 (uint16_t a, int16x8_t b)
   return vmaxavq (a, b);
 }
 
-/* { dg-final { scan-assembler "vmaxav.s16"  }  } */
+
+int16_t
+foo2 (uint8_t a, int16x8_t b)
+{
+  return vmaxavq (a, b);
+}
+
+/* { dg-final { scan-assembler-not "__ARM_undef" } } */
+/* { dg-final { scan-assembler-times "vmaxav.s16" 3 } } */
diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmaxavq_s32.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmaxavq_s32.c
index 8813d9d..f419a77 100644
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmaxavq_s32.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmaxavq_s32.c
@@ -10,7 +10,6 @@  foo (uint32_t a, int32x4_t b)
   return vmaxavq_s32 (a, b);
 }
 
-/* { dg-final { scan-assembler "vmaxav.s32"  }  } */
 
 uint32_t
 foo1 (uint32_t a, int32x4_t b)
@@ -18,4 +17,12 @@  foo1 (uint32_t a, int32x4_t b)
   return vmaxavq (a, b);
 }
 
-/* { dg-final { scan-assembler "vmaxav.s32"  }  } */
+
+int32_t
+foo2 (uint16_t a, int32x4_t b)
+{
+  return vmaxavq (a, b);
+}
+
+/* { dg-final { scan-assembler-not "__ARM_undef" } } */
+/* { dg-final { scan-assembler-times "vmaxav.s32" 3 } } */
diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmaxavq_s8.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmaxavq_s8.c
index 961f1d2..214ad88 100644
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmaxavq_s8.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmaxavq_s8.c
@@ -10,7 +10,6 @@  foo (uint8_t a, int8x16_t b)
   return vmaxavq_s8 (a, b);
 }
 
-/* { dg-final { scan-assembler "vmaxav.s8"  }  } */
 
 uint8_t
 foo1 (uint8_t a, int8x16_t b)
@@ -18,4 +17,12 @@  foo1 (uint8_t a, int8x16_t b)
   return vmaxavq (a, b);
 }
 
-/* { dg-final { scan-assembler "vmaxav.s8"  }  } */
+
+int8_t
+foo2 (uint32_t a, int8x16_t b)
+{
+  return vmaxavq (a, b);
+}
+
+/* { dg-final { scan-assembler-not "__ARM_undef" } } */
+/* { dg-final { scan-assembler-times "vmaxav.s8" 3 } } */
diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmaxnmavq_f16.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmaxnmavq_f16.c
index de48ea8..6d8cf19 100644
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmaxnmavq_f16.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmaxnmavq_f16.c
@@ -10,7 +10,6 @@  foo (float16_t a, float16x8_t b)
   return vmaxnmavq_f16 (a, b);
 }
 
-/* { dg-final { scan-assembler "vmaxnmav.f16"  }  } */
 
 float16_t
 foo1 (float16_t a, float16x8_t b)
@@ -18,4 +17,12 @@  foo1 (float16_t a, float16x8_t b)
   return vmaxnmavq (a, b);
 }
 
-/* { dg-final { scan-assembler "vmaxnmav.f16"  }  } */
+
+float16_t
+foo2 (float32_t a, float16x8_t b)
+{
+  return vmaxnmavq (a, b);
+}
+
+/* { dg-final { scan-assembler-not "__ARM_undef" } } */
+/* { dg-final { scan-assembler-times "vmaxnmav.f16" 3 } } */
diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmaxnmavq_f32.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmaxnmavq_f32.c
index b4c7f83..ef79030 100644
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmaxnmavq_f32.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmaxnmavq_f32.c
@@ -10,7 +10,6 @@  foo (float32_t a, float32x4_t b)
   return vmaxnmavq_f32 (a, b);
 }
 
-/* { dg-final { scan-assembler "vmaxnmav.f32"  }  } */
 
 float32_t
 foo1 (float32_t a, float32x4_t b)
@@ -18,4 +17,12 @@  foo1 (float32_t a, float32x4_t b)
   return vmaxnmavq (a, b);
 }
 
-/* { dg-final { scan-assembler "vmaxnmav.f32"  }  } */
+
+float32_t
+foo2 (float16_t a, float32x4_t b)
+{
+  return vmaxnmavq (a, b);
+}
+
+/* { dg-final { scan-assembler-not "__ARM_undef" } } */
+/* { dg-final { scan-assembler-times "vmaxnmav.f32" 3 } } */
diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmaxnmavq_p_f16.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmaxnmavq_p_f16.c
index 9c2eed0..f7f39f5 100644
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmaxnmavq_p_f16.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmaxnmavq_p_f16.c
@@ -10,7 +10,6 @@  foo (float16_t a, float16x8_t b, mve_pred16_t p)
   return vmaxnmavq_p_f16 (a, b, p);
 }
 
-/* { dg-final { scan-assembler "vmaxnmavt.f16"  }  } */
 
 float16_t
 foo1 (float16_t a, float16x8_t b, mve_pred16_t p)
@@ -18,4 +17,12 @@  foo1 (float16_t a, float16x8_t b, mve_pred16_t p)
   return vmaxnmavq_p (a, b, p);
 }
 
-/* { dg-final { scan-assembler "vmaxnmavt.f16"  }  } */
+
+float16_t
+foo2 (float32_t a, float16x8_t b, mve_pred16_t p)
+{
+  return vmaxnmavq_p (a, b, p);
+}
+
+/* { dg-final { scan-assembler-not "__ARM_undef" } } */
+/* { dg-final { scan-assembler-times "vmaxnmavt.f16" 3 } } */
diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmaxnmavq_p_f32.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmaxnmavq_p_f32.c
index 1cadccb..341f625 100644
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmaxnmavq_p_f32.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmaxnmavq_p_f32.c
@@ -10,7 +10,6 @@  foo (float32_t a, float32x4_t b, mve_pred16_t p)
   return vmaxnmavq_p_f32 (a, b, p);
 }
 
-/* { dg-final { scan-assembler "vmaxnmavt.f32"  }  } */
 
 float32_t
 foo1 (float32_t a, float32x4_t b, mve_pred16_t p)
@@ -18,4 +17,12 @@  foo1 (float32_t a, float32x4_t b, mve_pred16_t p)
   return vmaxnmavq_p (a, b, p);
 }
 
-/* { dg-final { scan-assembler "vmaxnmavt.f32"  }  } */
+
+float32_t
+foo2 (float16_t a, float32x4_t b, mve_pred16_t p)
+{
+  return vmaxnmavq_p (a, b, p);
+}
+
+/* { dg-final { scan-assembler-not "__ARM_undef" } } */
+/* { dg-final { scan-assembler-times "vmaxnmavt.f32" 3 } } */
diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmaxnmvq_f16.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmaxnmvq_f16.c
index 81f4b9b..80bd1d4 100644
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmaxnmvq_f16.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmaxnmvq_f16.c
@@ -10,7 +10,6 @@  foo (float16_t a, float16x8_t b)
   return vmaxnmvq_f16 (a, b);
 }
 
-/* { dg-final { scan-assembler "vmaxnmv.f16"  }  } */
 
 float16_t
 foo1 (float16_t a, float16x8_t b)
@@ -18,4 +17,12 @@  foo1 (float16_t a, float16x8_t b)
   return vmaxnmvq (a, b);
 }
 
-/* { dg-final { scan-assembler "vmaxnmv.f16"  }  } */
+
+float16_t
+foo2 (float32_t a, float16x8_t b)
+{
+  return vmaxnmvq (a, b);
+}
+
+/* { dg-final { scan-assembler-not "__ARM_undef" } } */
+/* { dg-final { scan-assembler-times "vmaxnmv.f16" 3 } } */
diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmaxnmvq_f32.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmaxnmvq_f32.c
index ab06c2b..bb2fc46 100644
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmaxnmvq_f32.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmaxnmvq_f32.c
@@ -10,7 +10,6 @@  foo (float32_t a, float32x4_t b)
   return vmaxnmvq_f32 (a, b);
 }
 
-/* { dg-final { scan-assembler "vmaxnmv.f32"  }  } */
 
 float32_t
 foo1 (float32_t a, float32x4_t b)
@@ -18,4 +17,12 @@  foo1 (float32_t a, float32x4_t b)
   return vmaxnmvq (a, b);
 }
 
-/* { dg-final { scan-assembler "vmaxnmv.f32"  }  } */
+
+float32_t
+foo2 (float16_t a, float32x4_t b)
+{
+  return vmaxnmvq (a, b);
+}
+
+/* { dg-final { scan-assembler-not "__ARM_undef" } } */
+/* { dg-final { scan-assembler-times "vmaxnmv.f32" 3 } } */
diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmaxnmvq_p_f16.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmaxnmvq_p_f16.c
index e37c5a1..3efe203 100644
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmaxnmvq_p_f16.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmaxnmvq_p_f16.c
@@ -10,7 +10,6 @@  foo (float16_t a, float16x8_t b, mve_pred16_t p)
   return vmaxnmvq_p_f16 (a, b, p);
 }
 
-/* { dg-final { scan-assembler "vmaxnmvt.f16"  }  } */
 
 float16_t
 foo1 (float16_t a, float16x8_t b, mve_pred16_t p)
@@ -18,4 +17,12 @@  foo1 (float16_t a, float16x8_t b, mve_pred16_t p)
   return vmaxnmvq_p (a, b, p);
 }
 
-/* { dg-final { scan-assembler "vmaxnmvt.f16"  }  } */
+
+float16_t
+foo2 (float32_t a, float16x8_t b, mve_pred16_t p)
+{
+  return vmaxnmvq_p (a, b, p);
+}
+
+/* { dg-final { scan-assembler-not "__ARM_undef" } } */
+/* { dg-final { scan-assembler-times "vmaxnmvt.f16" 3 } } */
diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmaxnmvq_p_f32.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmaxnmvq_p_f32.c
index 884cd45..6c13247 100644
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmaxnmvq_p_f32.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmaxnmvq_p_f32.c
@@ -10,7 +10,6 @@  foo (float32_t a, float32x4_t b, mve_pred16_t p)
   return vmaxnmvq_p_f32 (a, b, p);
 }
 
-/* { dg-final { scan-assembler "vmaxnmvt.f32"  }  } */
 
 float32_t
 foo1 (float32_t a, float32x4_t b, mve_pred16_t p)
@@ -18,4 +17,12 @@  foo1 (float32_t a, float32x4_t b, mve_pred16_t p)
   return vmaxnmvq_p (a, b, p);
 }
 
-/* { dg-final { scan-assembler "vmaxnmvt.f32"  }  } */
+
+float32_t
+foo2 (float16_t a, float32x4_t b, mve_pred16_t p)
+{
+  return vmaxnmvq_p (a, b, p);
+}
+
+/* { dg-final { scan-assembler-not "__ARM_undef" } } */
+/* { dg-final { scan-assembler-times "vmaxnmvt.f32" 3 } } */
diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmaxvq_p_s16.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmaxvq_p_s16.c
index 79de370..657efc5 100644
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmaxvq_p_s16.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmaxvq_p_s16.c
@@ -10,7 +10,6 @@  foo (int16_t a, int16x8_t b, mve_pred16_t p)
   return vmaxvq_p_s16 (a, b, p);
 }
 
-/* { dg-final { scan-assembler "vmaxvt.s16"  }  } */
 
 int16_t
 foo1 (int16_t a, int16x8_t b, mve_pred16_t p)
@@ -18,4 +17,12 @@  foo1 (int16_t a, int16x8_t b, mve_pred16_t p)
   return vmaxvq_p (a, b, p);
 }
 
-/* { dg-final { scan-assembler "vmaxvt.s16"  }  } */
+
+int16_t
+foo2 (int8_t a, int16x8_t b, mve_pred16_t p)
+{
+  return vmaxvq_p (a, b, p);
+}
+
+/* { dg-final { scan-assembler-not "__ARM_undef" } } */
+/* { dg-final { scan-assembler-times "vmaxvt.s16" 3 } } */
diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmaxvq_p_s32.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmaxvq_p_s32.c
index e526744..5882351 100644
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmaxvq_p_s32.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmaxvq_p_s32.c
@@ -10,7 +10,6 @@  foo (int32_t a, int32x4_t b, mve_pred16_t p)
   return vmaxvq_p_s32 (a, b, p);
 }
 
-/* { dg-final { scan-assembler "vmaxvt.s32"  }  } */
 
 int32_t
 foo1 (int32_t a, int32x4_t b, mve_pred16_t p)
@@ -18,4 +17,12 @@  foo1 (int32_t a, int32x4_t b, mve_pred16_t p)
   return vmaxvq_p (a, b, p);
 }
 
-/* { dg-final { scan-assembler "vmaxvt.s32"  }  } */
+
+int32_t
+foo2 (int16_t a, int32x4_t b, mve_pred16_t p)
+{
+  return vmaxvq_p (a, b, p);
+}
+
+/* { dg-final { scan-assembler-not "__ARM_undef" } } */
+/* { dg-final { scan-assembler-times "vmaxvt.s32" 3 } } */
diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmaxvq_p_s8.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmaxvq_p_s8.c
index d3cedd4..3737ecd 100644
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmaxvq_p_s8.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmaxvq_p_s8.c
@@ -10,7 +10,6 @@  foo (int8_t a, int8x16_t b, mve_pred16_t p)
   return vmaxvq_p_s8 (a, b, p);
 }
 
-/* { dg-final { scan-assembler "vmaxvt.s8"  }  } */
 
 int8_t
 foo1 (int8_t a, int8x16_t b, mve_pred16_t p)
@@ -18,4 +17,12 @@  foo1 (int8_t a, int8x16_t b, mve_pred16_t p)
   return vmaxvq_p (a, b, p);
 }
 
-/* { dg-final { scan-assembler "vmaxvt.s8"  }  } */
+
+int8_t
+foo2 (int32_t a, int8x16_t b, mve_pred16_t p)
+{
+  return vmaxvq_p (a, b, p);
+}
+
+/* { dg-final { scan-assembler-not "__ARM_undef" } } */
+/* { dg-final { scan-assembler-times "vmaxvt.s8" 3 } } */
diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmaxvq_p_u16.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmaxvq_p_u16.c
index 79572f7..348cf39 100644
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmaxvq_p_u16.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmaxvq_p_u16.c
@@ -10,7 +10,6 @@  foo (uint16_t a, uint16x8_t b, mve_pred16_t p)
   return vmaxvq_p_u16 (a, b, p);
 }
 
-/* { dg-final { scan-assembler "vmaxvt.u16"  }  } */
 
 uint16_t
 foo1 (uint16_t a, uint16x8_t b, mve_pred16_t p)
@@ -18,4 +17,12 @@  foo1 (uint16_t a, uint16x8_t b, mve_pred16_t p)
   return vmaxvq_p (a, b, p);
 }
 
-/* { dg-final { scan-assembler "vmaxvt.u16"  }  } */
+
+uint16_t
+foo2 (uint32_t a, uint16x8_t b, mve_pred16_t p)
+{
+  return vmaxvq_p (a, b, p);
+}
+
+/* { dg-final { scan-assembler-not "__ARM_undef" } } */
+/* { dg-final { scan-assembler-times "vmaxvt.u16" 3 } } */
diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmaxvq_p_u32.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmaxvq_p_u32.c
index e2f7a6f..f2e9762 100644
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmaxvq_p_u32.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmaxvq_p_u32.c
@@ -10,7 +10,6 @@  foo (uint32_t a, uint32x4_t b, mve_pred16_t p)
   return vmaxvq_p_u32 (a, b, p);
 }
 
-/* { dg-final { scan-assembler "vmaxvt.u32"  }  } */
 
 uint32_t
 foo1 (uint32_t a, uint32x4_t b, mve_pred16_t p)
@@ -18,4 +17,12 @@  foo1 (uint32_t a, uint32x4_t b, mve_pred16_t p)
   return vmaxvq_p (a, b, p);
 }
 
-/* { dg-final { scan-assembler "vmaxvt.u32"  }  } */
+
+uint32_t
+foo2 (uint8_t a, uint32x4_t b, mve_pred16_t p)
+{
+  return vmaxvq_p (a, b, p);
+}
+
+/* { dg-final { scan-assembler-not "__ARM_undef" } } */
+/* { dg-final { scan-assembler-times "vmaxvt.u32" 3 } } */
diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmaxvq_p_u8.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmaxvq_p_u8.c
index f977806..7df5b63 100644
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmaxvq_p_u8.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmaxvq_p_u8.c
@@ -10,7 +10,6 @@  foo (uint8_t a, uint8x16_t b, mve_pred16_t p)
   return vmaxvq_p_u8 (a, b, p);
 }
 
-/* { dg-final { scan-assembler "vmaxvt.u8"  }  } */
 
 uint8_t
 foo1 (uint8_t a, uint8x16_t b, mve_pred16_t p)
@@ -18,4 +17,12 @@  foo1 (uint8_t a, uint8x16_t b, mve_pred16_t p)
   return vmaxvq_p (a, b, p);
 }
 
-/* { dg-final { scan-assembler "vmaxvt.u8"  }  } */
+
+uint8_t
+foo2 (uint16_t a, uint8x16_t b, mve_pred16_t p)
+{
+  return vmaxvq_p (a, b, p);
+}
+
+/* { dg-final { scan-assembler-not "__ARM_undef" } } */
+/* { dg-final { scan-assembler-times "vmaxvt.u8" 3 } } */
diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmaxvq_s16.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmaxvq_s16.c
index 90f10b5..8412452 100644
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmaxvq_s16.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmaxvq_s16.c
@@ -10,7 +10,6 @@  foo (int16_t a, int16x8_t b)
   return vmaxvq_s16 (a, b);
 }
 
-/* { dg-final { scan-assembler "vmaxv.s16"  }  } */
 
 int16_t
 foo1 (int16_t a, int16x8_t b)
@@ -18,4 +17,12 @@  foo1 (int16_t a, int16x8_t b)
   return vmaxvq (a, b);
 }
 
-/* { dg-final { scan-assembler "vmaxv.s16"  }  } */
+
+int16_t
+foo2 (int8_t a, int16x8_t b)
+{
+  return vmaxvq (a, b);
+}
+
+/* { dg-final { scan-assembler-not "__ARM_undef" } } */
+/* { dg-final { scan-assembler-times "vmaxv.s16" 3 } } */
diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmaxvq_s32.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmaxvq_s32.c
index aa0e88b..09f4909 100644
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmaxvq_s32.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmaxvq_s32.c
@@ -10,7 +10,6 @@  foo (int32_t a, int32x4_t b)
   return vmaxvq_s32 (a, b);
 }
 
-/* { dg-final { scan-assembler "vmaxv.s32"  }  } */
 
 int32_t
 foo1 (int32_t a, int32x4_t b)
@@ -18,4 +17,12 @@  foo1 (int32_t a, int32x4_t b)
   return vmaxvq (a, b);
 }
 
-/* { dg-final { scan-assembler "vmaxv.s32"  }  } */
+
+int32_t
+foo2 (int16_t a, int32x4_t b)
+{
+  return vmaxvq (a, b);
+}
+
+/* { dg-final { scan-assembler-not "__ARM_undef" } } */
+/* { dg-final { scan-assembler-times "vmaxv.s32" 3 } } */
diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmaxvq_s8.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmaxvq_s8.c
index 884b84d..a087bbc 100644
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmaxvq_s8.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmaxvq_s8.c
@@ -10,7 +10,6 @@  foo (int8_t a, int8x16_t b)
   return vmaxvq_s8 (a, b);
 }
 
-/* { dg-final { scan-assembler "vmaxv.s8"  }  } */
 
 int8_t
 foo1 (int8_t a, int8x16_t b)
@@ -18,4 +17,12 @@  foo1 (int8_t a, int8x16_t b)
   return vmaxvq (a, b);
 }
 
-/* { dg-final { scan-assembler "vmaxv.s8"  }  } */
+
+int8_t
+foo2 (int32_t a, int8x16_t b)
+{
+  return vmaxvq (a, b);
+}
+
+/* { dg-final { scan-assembler-not "__ARM_undef" } } */
+/* { dg-final { scan-assembler-times "vmaxv.s8" 3 } } */
diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmaxvq_u16.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmaxvq_u16.c
index 2813ebd..47fe0d1 100644
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmaxvq_u16.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmaxvq_u16.c
@@ -10,7 +10,6 @@  foo (uint16_t a, uint16x8_t b)
   return vmaxvq_u16 (a, b);
 }
 
-/* { dg-final { scan-assembler "vmaxv.u16"  }  } */
 
 uint16_t
 foo1 (uint16_t a, uint16x8_t b)
@@ -18,4 +17,12 @@  foo1 (uint16_t a, uint16x8_t b)
   return vmaxvq (a, b);
 }
 
-/* { dg-final { scan-assembler "vmaxv.u16"  }  } */
+
+uint16_t
+foo2 (uint32_t a, uint16x8_t b)
+{
+  return vmaxvq (a, b);
+}
+
+/* { dg-final { scan-assembler-not "__ARM_undef" } } */
+/* { dg-final { scan-assembler-times "vmaxv.u16" 3 } } */
diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmaxvq_u32.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmaxvq_u32.c
index ab51b1e..aa723da 100644
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmaxvq_u32.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmaxvq_u32.c
@@ -10,7 +10,6 @@  foo (uint32_t a, uint32x4_t b)
   return vmaxvq_u32 (a, b);
 }
 
-/* { dg-final { scan-assembler "vmaxv.u32"  }  } */
 
 uint32_t
 foo1 (uint32_t a, uint32x4_t b)
@@ -18,4 +17,12 @@  foo1 (uint32_t a, uint32x4_t b)
   return vmaxvq (a, b);
 }
 
-/* { dg-final { scan-assembler "vmaxv.u32"  }  } */
+
+uint32_t
+foo2 (uint8_t a, uint32x4_t b)
+{
+  return vmaxvq (a, b);
+}
+
+/* { dg-final { scan-assembler-not "__ARM_undef" } } */
+/* { dg-final { scan-assembler-times "vmaxv.u32" 3 } } */
diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmaxvq_u8.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmaxvq_u8.c
index 3326cfb..3aae785 100644
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmaxvq_u8.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmaxvq_u8.c
@@ -10,7 +10,6 @@  foo (uint8_t a, uint8x16_t b)
   return vmaxvq_u8 (a, b);
 }
 
-/* { dg-final { scan-assembler "vmaxv.u8"  }  } */
 
 uint8_t
 foo1 (uint8_t a, uint8x16_t b)
@@ -18,4 +17,12 @@  foo1 (uint8_t a, uint8x16_t b)
   return vmaxvq (a, b);
 }
 
-/* { dg-final { scan-assembler "vmaxv.u8"  }  } */
+
+uint8_t
+foo2 (uint16_t a, uint8x16_t b)
+{
+  return vmaxvq (a, b);
+}
+
+/* { dg-final { scan-assembler-not "__ARM_undef" } } */
+/* { dg-final { scan-assembler-times "vmaxv.u8" 3 } } */
diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vminavq_p_s16.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vminavq_p_s16.c
index 6b87648..9303ae0 100644
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vminavq_p_s16.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vminavq_p_s16.c
@@ -10,7 +10,6 @@  foo (uint16_t a, int16x8_t b, mve_pred16_t p)
   return vminavq_p_s16 (a, b, p);
 }
 
-/* { dg-final { scan-assembler "vminavt.s16"  }  } */
 
 uint16_t
 foo1 (uint16_t a, int16x8_t b, mve_pred16_t p)
@@ -18,4 +17,12 @@  foo1 (uint16_t a, int16x8_t b, mve_pred16_t p)
   return vminavq_p (a, b, p);
 }
 
-/* { dg-final { scan-assembler "vminavt.s16"  }  } */
+
+int16_t
+foo2 (uint8_t a, int16x8_t b, mve_pred16_t p)
+{
+  return vminavq_p (a, b, p);
+}
+
+/* { dg-final { scan-assembler-not "__ARM_undef" } } */
+/* { dg-final { scan-assembler-times "vminavt.s16" 3 } } */
diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vminavq_p_s32.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vminavq_p_s32.c
index 086ff56..36247f6 100644
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vminavq_p_s32.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vminavq_p_s32.c
@@ -10,7 +10,6 @@  foo (uint32_t a, int32x4_t b, mve_pred16_t p)
   return vminavq_p_s32 (a, b, p);
 }
 
-/* { dg-final { scan-assembler "vminavt.s32"  }  } */
 
 uint32_t
 foo1 (uint32_t a, int32x4_t b, mve_pred16_t p)
@@ -18,4 +17,12 @@  foo1 (uint32_t a, int32x4_t b, mve_pred16_t p)
   return vminavq_p (a, b, p);
 }
 
-/* { dg-final { scan-assembler "vminavt.s32"  }  } */
+
+int32_t
+foo2 (uint16_t a, int32x4_t b, mve_pred16_t p)
+{
+  return vminavq_p (a, b, p);
+}
+
+/* { dg-final { scan-assembler-not "__ARM_undef" } } */
+/* { dg-final { scan-assembler-times "vminavt.s32" 3 } } */
diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vminavq_p_s8.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vminavq_p_s8.c
index 999c11c..d336161 100644
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vminavq_p_s8.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vminavq_p_s8.c
@@ -10,7 +10,6 @@  foo (uint8_t a, int8x16_t b, mve_pred16_t p)
   return vminavq_p_s8 (a, b, p);
 }
 
-/* { dg-final { scan-assembler "vminavt.s8"  }  } */
 
 uint8_t
 foo1 (uint8_t a, int8x16_t b, mve_pred16_t p)
@@ -18,4 +17,12 @@  foo1 (uint8_t a, int8x16_t b, mve_pred16_t p)
   return vminavq_p (a, b, p);
 }
 
-/* { dg-final { scan-assembler "vminavt.s8"  }  } */
+
+int8_t
+foo2 (uint32_t a, int8x16_t b, mve_pred16_t p)
+{
+  return vminavq_p (a, b, p);
+}
+
+/* { dg-final { scan-assembler-not "__ARM_undef" } } */
+/* { dg-final { scan-assembler-times "vminavt.s8" 3 } } */
diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vminavq_s16.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vminavq_s16.c
index a626e31..17e4edc 100644
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vminavq_s16.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vminavq_s16.c
@@ -10,7 +10,6 @@  foo (uint16_t a, int16x8_t b)
   return vminavq_s16 (a, b);
 }
 
-/* { dg-final { scan-assembler "vminav.s16"  }  } */
 
 uint16_t
 foo1 (uint16_t a, int16x8_t b)
@@ -18,4 +17,12 @@  foo1 (uint16_t a, int16x8_t b)
   return vminavq (a, b);
 }
 
-/* { dg-final { scan-assembler "vminav.s16"  }  } */
+
+int16_t
+foo2 (uint8_t a, int16x8_t b)
+{
+  return vminavq (a, b);
+}
+
+/* { dg-final { scan-assembler-not "__ARM_undef" } } */
+/* { dg-final { scan-assembler-times "vminav.s16" 3 } } */
diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vminavq_s32.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vminavq_s32.c
index be575cb..032d02b 100644
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vminavq_s32.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vminavq_s32.c
@@ -10,7 +10,6 @@  foo (uint32_t a, int32x4_t b)
   return vminavq_s32 (a, b);
 }
 
-/* { dg-final { scan-assembler "vminav.s32"  }  } */
 
 uint32_t
 foo1 (uint32_t a, int32x4_t b)
@@ -18,4 +17,12 @@  foo1 (uint32_t a, int32x4_t b)
   return vminavq (a, b);
 }
 
-/* { dg-final { scan-assembler "vminav.s32"  }  } */
+
+int32_t
+foo2 (uint16_t a, int32x4_t b)
+{
+  return vminavq (a, b);
+}
+
+/* { dg-final { scan-assembler-not "__ARM_undef" } } */
+/* { dg-final { scan-assembler-times "vminav.s32" 3 } } */
diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vminavq_s8.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vminavq_s8.c
index c3dfe4b..2a2bb3d6 100644
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vminavq_s8.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vminavq_s8.c
@@ -10,7 +10,6 @@  foo (uint8_t a, int8x16_t b)
   return vminavq_s8 (a, b);
 }
 
-/* { dg-final { scan-assembler "vminav.s8"  }  } */
 
 uint8_t
 foo1 (uint8_t a, int8x16_t b)
@@ -18,4 +17,12 @@  foo1 (uint8_t a, int8x16_t b)
   return vminavq (a, b);
 }
 
-/* { dg-final { scan-assembler "vminav.s8"  }  } */
+
+int8_t
+foo2 (uint32_t a, int8x16_t b)
+{
+  return vminavq (a, b);
+}
+
+/* { dg-final { scan-assembler-not "__ARM_undef" } } */
+/* { dg-final { scan-assembler-times "vminav.s8" 3 } } */
diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vminnmavq_f16.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vminnmavq_f16.c
index 2111681..fadb23e 100644
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vminnmavq_f16.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vminnmavq_f16.c
@@ -10,7 +10,6 @@  foo (float16_t a, float16x8_t b)
   return vminnmavq_f16 (a, b);
 }
 
-/* { dg-final { scan-assembler "vminnmav.f16"  }  } */
 
 float16_t
 foo1 (float16_t a, float16x8_t b)
@@ -18,4 +17,12 @@  foo1 (float16_t a, float16x8_t b)
   return vminnmavq (a, b);
 }
 
-/* { dg-final { scan-assembler "vminnmav.f16"  }  } */
+
+float16_t
+foo2 (float32_t a, float16x8_t b)
+{
+  return vminnmavq (a, b);
+}
+
+/* { dg-final { scan-assembler-not "__ARM_undef" } } */
+/* { dg-final { scan-assembler-times "vminnmav.f16" 3 } } */
diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vminnmavq_f32.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vminnmavq_f32.c
index bd87b85..84714a9 100644
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vminnmavq_f32.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vminnmavq_f32.c
@@ -10,7 +10,6 @@  foo (float32_t a, float32x4_t b)
   return vminnmavq_f32 (a, b);
 }
 
-/* { dg-final { scan-assembler "vminnmav.f32"  }  } */
 
 float32_t
 foo1 (float32_t a, float32x4_t b)
@@ -18,4 +17,12 @@  foo1 (float32_t a, float32x4_t b)
   return vminnmavq (a, b);
 }
 
-/* { dg-final { scan-assembler "vminnmav.f32"  }  } */
+
+float32_t
+foo2 (float16_t a, float32x4_t b)
+{
+  return vminnmavq (a, b);
+}
+
+/* { dg-final { scan-assembler-not "__ARM_undef" } } */
+/* { dg-final { scan-assembler-times "vminnmav.f32" 3 } } */
diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vminnmavq_p_f16.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vminnmavq_p_f16.c
index e6d0bb5..c79fa30 100644
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vminnmavq_p_f16.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vminnmavq_p_f16.c
@@ -10,7 +10,6 @@  foo (float16_t a, float16x8_t b, mve_pred16_t p)
   return vminnmavq_p_f16 (a, b, p);
 }
 
-/* { dg-final { scan-assembler "vminnmavt.f16"  }  } */
 
 float16_t
 foo1 (float16_t a, float16x8_t b, mve_pred16_t p)
@@ -18,4 +17,12 @@  foo1 (float16_t a, float16x8_t b, mve_pred16_t p)
   return vminnmavq_p (a, b, p);
 }
 
-/* { dg-final { scan-assembler "vminnmavt.f16"  }  } */
+
+float16_t
+foo2 (float32_t a, float16x8_t b, mve_pred16_t p)
+{
+  return vminnmavq_p (a, b, p);
+}
+
+/* { dg-final { scan-assembler-not "__ARM_undef" } } */
+/* { dg-final { scan-assembler-times "vminnmavt.f16" 3 } } */
diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vminnmavq_p_f32.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vminnmavq_p_f32.c
index 6b56b67..bea04c7 100644
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vminnmavq_p_f32.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vminnmavq_p_f32.c
@@ -10,7 +10,6 @@  foo (float32_t a, float32x4_t b, mve_pred16_t p)
   return vminnmavq_p_f32 (a, b, p);
 }
 
-/* { dg-final { scan-assembler "vminnmavt.f32"  }  } */
 
 float32_t
 foo1 (float32_t a, float32x4_t b, mve_pred16_t p)
@@ -18,4 +17,12 @@  foo1 (float32_t a, float32x4_t b, mve_pred16_t p)
   return vminnmavq_p (a, b, p);
 }
 
-/* { dg-final { scan-assembler "vminnmavt.f32"  }  } */
+
+float32_t
+foo2 (float16_t a, float32x4_t b, mve_pred16_t p)
+{
+  return vminnmavq_p (a, b, p);
+}
+
+/* { dg-final { scan-assembler-not "__ARM_undef" } } */
+/* { dg-final { scan-assembler-times "vminnmavt.f32" 3 } } */
diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vminnmvq_f16.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vminnmvq_f16.c
index 4d4caae..0eb3a4a 100644
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vminnmvq_f16.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vminnmvq_f16.c
@@ -10,7 +10,6 @@  foo (float16_t a, float16x8_t b)
   return vminnmvq_f16 (a, b);
 }
 
-/* { dg-final { scan-assembler "vminnmv.f16"  }  } */
 
 float16_t
 foo1 (float16_t a, float16x8_t b)
@@ -18,4 +17,12 @@  foo1 (float16_t a, float16x8_t b)
   return vminnmvq (a, b);
 }
 
-/* { dg-final { scan-assembler "vminnmv.f16"  }  } */
+
+float16_t
+foo2 (float32_t a, float16x8_t b)
+{
+  return vminnmvq (a, b);
+}
+
+/* { dg-final { scan-assembler-not "__ARM_undef" } } */
+/* { dg-final { scan-assembler-times "vminnmv.f16" 3 } } */
diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vminnmvq_f32.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vminnmvq_f32.c
index dab04d9..f318350 100644
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vminnmvq_f32.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vminnmvq_f32.c
@@ -10,7 +10,6 @@  foo (float32_t a, float32x4_t b)
   return vminnmvq_f32 (a, b);
 }
 
-/* { dg-final { scan-assembler "vminnmv.f32"  }  } */
 
 float32_t
 foo1 (float32_t a, float32x4_t b)
@@ -18,4 +17,12 @@  foo1 (float32_t a, float32x4_t b)
   return vminnmvq (a, b);
 }
 
-/* { dg-final { scan-assembler "vminnmv.f32"  }  } */
+
+float32_t
+foo2 (float16_t a, float32x4_t b)
+{
+  return vminnmvq (a, b);
+}
+
+/* { dg-final { scan-assembler-not "__ARM_undef" } } */
+/* { dg-final { scan-assembler-times "vminnmv.f32" 3 } } */
diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vminnmvq_p_f16.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vminnmvq_p_f16.c
index f5eafb1..16f6ac5 100644
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vminnmvq_p_f16.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vminnmvq_p_f16.c
@@ -10,7 +10,6 @@  foo (float16_t a, float16x8_t b, mve_pred16_t p)
   return vminnmvq_p_f16 (a, b, p);
 }
 
-/* { dg-final { scan-assembler "vminnmvt.f16"  }  } */
 
 float16_t
 foo1 (float16_t a, float16x8_t b, mve_pred16_t p)
@@ -18,4 +17,12 @@  foo1 (float16_t a, float16x8_t b, mve_pred16_t p)
   return vminnmvq_p (a, b, p);
 }
 
-/* { dg-final { scan-assembler "vminnmvt.f16"  }  } */
+
+float16_t
+foo2 (float32_t a, float16x8_t b, mve_pred16_t p)
+{
+  return vminnmvq_p (a, b, p);
+}
+
+/* { dg-final { scan-assembler-not "__ARM_undef" } } */
+/* { dg-final { scan-assembler-times "vminnmvt.f16" 3 } } */
diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vminnmvq_p_f32.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vminnmvq_p_f32.c
index 5ac20bf..a8e4f9f 100644
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vminnmvq_p_f32.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vminnmvq_p_f32.c
@@ -10,7 +10,6 @@  foo (float32_t a, float32x4_t b, mve_pred16_t p)
   return vminnmvq_p_f32 (a, b, p);
 }
 
-/* { dg-final { scan-assembler "vminnmvt.f32"  }  } */
 
 float32_t
 foo1 (float32_t a, float32x4_t b, mve_pred16_t p)
@@ -18,4 +17,12 @@  foo1 (float32_t a, float32x4_t b, mve_pred16_t p)
   return vminnmvq_p (a, b, p);
 }
 
-/* { dg-final { scan-assembler "vminnmvt.f32"  }  } */
+
+float32_t
+foo2 (float16_t a, float32x4_t b, mve_pred16_t p)
+{
+  return vminnmvq_p (a, b, p);
+}
+
+/* { dg-final { scan-assembler-not "__ARM_undef" } } */
+/* { dg-final { scan-assembler-times "vminnmvt.f32" 3 } } */
diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vminvq_p_s16.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vminvq_p_s16.c
index c2edb62..91bb63f 100644
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vminvq_p_s16.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vminvq_p_s16.c
@@ -10,7 +10,6 @@  foo (int16_t a, int16x8_t b, mve_pred16_t p)
   return vminvq_p_s16 (a, b, p);
 }
 
-/* { dg-final { scan-assembler "vminvt.s16"  }  } */
 
 int16_t
 foo1 (int16_t a, int16x8_t b, mve_pred16_t p)
@@ -18,4 +17,12 @@  foo1 (int16_t a, int16x8_t b, mve_pred16_t p)
   return vminvq_p (a, b, p);
 }
 
-/* { dg-final { scan-assembler "vminvt.s16"  }  } */
+
+int16_t
+foo2 (int8_t a, int16x8_t b, mve_pred16_t p)
+{
+  return vminvq_p (a, b, p);
+}
+
+/* { dg-final { scan-assembler-not "__ARM_undef" } } */
+/* { dg-final { scan-assembler-times "vminvt.s16" 3 } } */
diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vminvq_p_s32.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vminvq_p_s32.c
index ba89217..a846701 100644
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vminvq_p_s32.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vminvq_p_s32.c
@@ -10,7 +10,6 @@  foo (int32_t a, int32x4_t b, mve_pred16_t p)
   return vminvq_p_s32 (a, b, p);
 }
 
-/* { dg-final { scan-assembler "vminvt.s32"  }  } */
 
 int32_t
 foo1 (int32_t a, int32x4_t b, mve_pred16_t p)
@@ -18,4 +17,12 @@  foo1 (int32_t a, int32x4_t b, mve_pred16_t p)
   return vminvq_p (a, b, p);
 }
 
-/* { dg-final { scan-assembler "vminvt.s32"  }  } */
+
+int32_t
+foo2 (int16_t a, int32x4_t b, mve_pred16_t p)
+{
+  return vminvq_p (a, b, p);
+}
+
+/* { dg-final { scan-assembler-not "__ARM_undef" } } */
+/* { dg-final { scan-assembler-times "vminvt.s32" 3 } } */
diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vminvq_p_s8.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vminvq_p_s8.c
index 1665c53..716d414 100644
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vminvq_p_s8.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vminvq_p_s8.c
@@ -10,7 +10,6 @@  foo (int8_t a, int8x16_t b, mve_pred16_t p)
   return vminvq_p_s8 (a, b, p);
 }
 
-/* { dg-final { scan-assembler "vminvt.s8"  }  } */
 
 int8_t
 foo1 (int8_t a, int8x16_t b, mve_pred16_t p)
@@ -18,4 +17,12 @@  foo1 (int8_t a, int8x16_t b, mve_pred16_t p)
   return vminvq_p (a, b, p);
 }
 
-/* { dg-final { scan-assembler "vminvt.s8"  }  } */
+
+int8_t
+foo2 (int32_t a, int8x16_t b, mve_pred16_t p)
+{
+  return vminvq_p (a, b, p);
+}
+
+/* { dg-final { scan-assembler-not "__ARM_undef" } } */
+/* { dg-final { scan-assembler-times "vminvt.s8" 3 } } */
diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vminvq_p_u16.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vminvq_p_u16.c
index 5bade0a..cc7f8fe 100644
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vminvq_p_u16.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vminvq_p_u16.c
@@ -10,7 +10,6 @@  foo (uint16_t a, uint16x8_t b, mve_pred16_t p)
   return vminvq_p_u16 (a, b, p);
 }
 
-/* { dg-final { scan-assembler "vminvt.u16"  }  } */
 
 uint16_t
 foo1 (uint16_t a, uint16x8_t b, mve_pred16_t p)
@@ -18,4 +17,12 @@  foo1 (uint16_t a, uint16x8_t b, mve_pred16_t p)
   return vminvq_p (a, b, p);
 }
 
-/* { dg-final { scan-assembler "vminvt.u16"  }  } */
+
+uint16_t
+foo2 (uint32_t a, uint16x8_t b, mve_pred16_t p)
+{
+  return vminvq_p (a, b, p);
+}
+
+/* { dg-final { scan-assembler-not "__ARM_undef" } } */
+/* { dg-final { scan-assembler-times "vminvt.u16" 3 } } */
diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vminvq_p_u32.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vminvq_p_u32.c
index c4c5748..6bde0be 100644
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vminvq_p_u32.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vminvq_p_u32.c
@@ -10,7 +10,6 @@  foo (uint32_t a, uint32x4_t b, mve_pred16_t p)
   return vminvq_p_u32 (a, b, p);
 }
 
-/* { dg-final { scan-assembler "vminvt.u32"  }  } */
 
 uint32_t
 foo1 (uint32_t a, uint32x4_t b, mve_pred16_t p)
@@ -18,4 +17,12 @@  foo1 (uint32_t a, uint32x4_t b, mve_pred16_t p)
   return vminvq_p (a, b, p);
 }
 
-/* { dg-final { scan-assembler "vminvt.u32"  }  } */
+
+uint32_t
+foo2 (uint8_t a, uint32x4_t b, mve_pred16_t p)
+{
+  return vminvq_p (a, b, p);
+}
+
+/* { dg-final { scan-assembler-not "__ARM_undef" } } */
+/* { dg-final { scan-assembler-times "vminvt.u32" 3 } } */
diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vminvq_p_u8.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vminvq_p_u8.c
index dc890dc..bb89490 100644
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vminvq_p_u8.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vminvq_p_u8.c
@@ -10,7 +10,6 @@  foo (uint8_t a, uint8x16_t b, mve_pred16_t p)
   return vminvq_p_u8 (a, b, p);
 }
 
-/* { dg-final { scan-assembler "vminvt.u8"  }  } */
 
 uint8_t
 foo1 (uint8_t a, uint8x16_t b, mve_pred16_t p)
@@ -18,4 +17,12 @@  foo1 (uint8_t a, uint8x16_t b, mve_pred16_t p)
   return vminvq_p (a, b, p);
 }
 
-/* { dg-final { scan-assembler "vminvt.u8"  }  } */
+
+uint8_t
+foo2 (uint16_t a, uint8x16_t b, mve_pred16_t p)
+{
+  return vminvq_p (a, b, p);
+}
+
+/* { dg-final { scan-assembler-not "__ARM_undef" } } */
+/* { dg-final { scan-assembler-times "vminvt.u8" 3 } } */
diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vminvq_s16.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vminvq_s16.c
index f6eed63..6d589aa 100644
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vminvq_s16.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vminvq_s16.c
@@ -10,7 +10,6 @@  foo (int16_t a, int16x8_t b)
   return vminvq_s16 (a, b);
 }
 
-/* { dg-final { scan-assembler "vminv.s16"  }  } */
 
 int16_t
 foo1 (int16_t a, int16x8_t b)
@@ -18,4 +17,11 @@  foo1 (int16_t a, int16x8_t b)
   return vminvq (a, b);
 }
 
-/* { dg-final { scan-assembler "vminv.s16"  }  } */
+int16_t
+foo2 (int8_t a, int16x8_t b)
+{
+  return vminvq (a, b);
+}
+
+/* { dg-final { scan-assembler-not "__ARM_undef" } } */
+/* { dg-final { scan-assembler-times "vminv.s16" 3 } } */
diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vminvq_s32.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vminvq_s32.c
index 4077c32..7c727d6 100644
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vminvq_s32.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vminvq_s32.c
@@ -10,7 +10,6 @@  foo (int32_t a, int32x4_t b)
   return vminvq_s32 (a, b);
 }
 
-/* { dg-final { scan-assembler "vminv.s32"  }  } */
 
 int32_t
 foo1 (int32_t a, int32x4_t b)
@@ -18,4 +17,11 @@  foo1 (int32_t a, int32x4_t b)
   return vminvq (a, b);
 }
 
-/* { dg-final { scan-assembler "vminv.s32"  }  } */
+int32_t
+foo2 (int8_t a, int32x4_t b)
+{
+  return vminvq (a, b);
+}
+
+/* { dg-final { scan-assembler-not "__ARM_undef" } } */
+/* { dg-final { scan-assembler-times "vminv.s32" 3 } } */
diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vminvq_s8.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vminvq_s8.c
index bdf15f4..7630948 100644
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vminvq_s8.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vminvq_s8.c
@@ -10,7 +10,6 @@  foo (int8_t a, int8x16_t b)
   return vminvq_s8 (a, b);
 }
 
-/* { dg-final { scan-assembler "vminv.s8"  }  } */
 
 int8_t
 foo1 (int8_t a, int8x16_t b)
@@ -18,4 +17,11 @@  foo1 (int8_t a, int8x16_t b)
   return vminvq (a, b);
 }
 
-/* { dg-final { scan-assembler "vminv.s8"  }  } */
+int8_t
+foo2 (int32_t a, int8x16_t b)
+{
+  return vminvq (a, b);
+}
+
+/* { dg-final { scan-assembler-not "__ARM_undef" } } */
+/* { dg-final { scan-assembler-times "vminv.s8" 3 } } */
diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vminvq_u16.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vminvq_u16.c
index 5c0935c..698975f 100644
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vminvq_u16.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vminvq_u16.c
@@ -10,7 +10,6 @@  foo (uint16_t a, uint16x8_t b)
   return vminvq_u16 (a, b);
 }
 
-/* { dg-final { scan-assembler "vminv.u16"  }  } */
 
 uint16_t
 foo1 (uint16_t a, uint16x8_t b)
@@ -18,4 +17,12 @@  foo1 (uint16_t a, uint16x8_t b)
   return vminvq (a, b);
 }
 
-/* { dg-final { scan-assembler "vminv.u16"  }  } */
+
+uint8_t
+foo2 (uint32_t a, uint16x8_t b)
+{
+  return vminvq (a, b);
+}
+
+/* { dg-final { scan-assembler-not "__ARM_undef" } } */
+/* { dg-final { scan-assembler-times "vminv.u16" 3 } } */
diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vminvq_u32.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vminvq_u32.c
index 1580c87..7489f81 100644
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vminvq_u32.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vminvq_u32.c
@@ -10,7 +10,6 @@  foo (uint32_t a, uint32x4_t b)
   return vminvq_u32 (a, b);
 }
 
-/* { dg-final { scan-assembler "vminv.u32"  }  } */
 
 uint32_t
 foo1 (uint32_t a, uint32x4_t b)
@@ -18,4 +17,11 @@  foo1 (uint32_t a, uint32x4_t b)
   return vminvq (a, b);
 }
 
-/* { dg-final { scan-assembler "vminv.u32"  }  } */
+uint32_t
+foo2 (uint16_t a, uint32x4_t b)
+{
+  return vminvq (a, b);
+}
+
+/* { dg-final { scan-assembler-not "__ARM_undef" } } */
+/* { dg-final { scan-assembler-times "vminv.u32" 3 } } */
diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vminvq_u8.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vminvq_u8.c
index 95919b4..aa2b986 100644
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vminvq_u8.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vminvq_u8.c
@@ -10,7 +10,6 @@  foo (uint8_t a, uint8x16_t b)
   return vminvq_u8 (a, b);
 }
 
-/* { dg-final { scan-assembler "vminv.u8"  }  } */
 
 uint8_t
 foo1 (uint8_t a, uint8x16_t b)
@@ -18,4 +17,12 @@  foo1 (uint8_t a, uint8x16_t b)
   return vminvq (a, b);
 }
 
-/* { dg-final { scan-assembler "vminv.u8"  }  } */
+
+uint16_t
+foo2 (uint32_t a, uint8x16_t b)
+{
+  return vminvq (a, b);
+}
+
+/* { dg-final { scan-assembler-not "__ARM_undef" } } */
+/* { dg-final { scan-assembler-times "vminv.u8" 3 } } */