[committed] sel-sched: fixup reset of first_insn (PR 85876)

Message ID alpine.LNX.2.20.13.1904021836570.10215@monopod.intra.ispras.ru
State New
Headers show
Series
  • [committed] sel-sched: fixup reset of first_insn (PR 85876)
Related show

Commit Message

Alexander Monakov April 2, 2019, 3:39 p.m.
Hi,

this patch by Andrey adjusts reset of first_insn in code_motion_path_driver in
order to avoid taking it from before the original insn.

Alexander

2019-04-02  Andrey Belevantsev  <abel@ispras.ru>

        PR rtl-optimization/85876
        * sel-sched.c (code_motion_path_driver): Avoid unwinding first_insn
        beyond the original fence.

        * gcc.dg/pr85876.c: New test.

Patch

diff --git a/gcc/sel-sched.c b/gcc/sel-sched.c
index 552dd0b9263..f6e94bfc15c 100644
--- a/gcc/sel-sched.c
+++ b/gcc/sel-sched.c
@@ -6439,7 +6439,7 @@  code_motion_path_driver (insn_t insn, av_set_t orig_ops, ilist_t path,
 {
   expr_t expr = NULL;
   basic_block bb = BLOCK_FOR_INSN (insn);
-  insn_t first_insn, bb_tail, before_first;
+  insn_t first_insn, original_insn, bb_tail, before_first;
   bool removed_last_insn = false;

   if (sched_verbose >= 6)
@@ -6523,7 +6523,7 @@  code_motion_path_driver (insn_t insn, av_set_t orig_ops, ilist_t path,
   /* It is enough to place only heads and tails of visited basic blocks into
      the PATH.  */
   ilist_add (&path, insn);
-  first_insn = insn;
+  first_insn = original_insn = insn;
   bb_tail = sel_bb_end (bb);

   /* Descend the basic block in search of the original expr; this part
@@ -6630,6 +6630,8 @@  code_motion_path_driver (insn_t insn, av_set_t orig_ops, ilist_t path,
         {
           insn = sel_bb_end (bb);
           first_insn = sel_bb_head (bb);
+         if (first_insn != original_insn)
+           first_insn = original_insn;
         }

       /* Remove bb tail from path.  */
diff --git a/gcc/testsuite/gcc.dg/pr85876.c b/gcc/testsuite/gcc.dg/pr85876.c
new file mode 100644
index 00000000000..64618e5258c
--- /dev/null
+++ b/gcc/testsuite/gcc.dg/pr85876.c
@@ -0,0 +1,18 @@ 
+/* { dg-do compile { target powerpc*-*-* ia64-*-* i?86-*-* x86_64-*-* } } */
+/* { dg-options "-O2 -fschedule-insns -fsel-sched-pipelining -fselective-scheduling -fno-if-conversion -fno-tree-dce" } */
+/* { dg-additional-options "-march=bdver1" { target i?86-*-* x86_64-*-* } } */
+
+int ov, rq, ac;
+
+int
+y2 (int);
+
+void
+f8 (int vn)
+{
+  while (rq < 1)
+    {
+      ov *= y2 (ac);
+      vn += (!!ov && !!ac) + ac;
+    }
+}