[Aarch64] Testsuite fix to fix one of the regressions in PR 87433, gcc.dg/zero_bits_compound-1.c

Message ID 1537973924.18948.20.camel@cavium.com
State New
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  • [Aarch64] Testsuite fix to fix one of the regressions in PR 87433, gcc.dg/zero_bits_compound-1.c
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Commit Message

Steve Ellcey Sept. 26, 2018, 2:58 p.m.
PR rtl-optimization/85160 which allowed combine to convert
two instructions into two different instructions if they had a lower cost
caused a couple of regressions on aarch64.  This patch fixes one of them.

After the above patch, the gcc.dg/zero_bits_compound-1.c test on 
aarch64 generates an and rtl instruction where it did not before.
A comparision of the code generated before and after the 85160 patch
shows that GCC is still generating the same number of instructions
but there are fewer dependencies between some of the instructions
so the new code would be better on systems with multiple functional
units and no worse on systems with a single functional unit.

Since the test is just verifying that an 'and' rtl instruction is
not generated and that is now happening on aarch64 but the new code
is as good as or better than the old code this test doesn't seem
to make sense for aarch64 anymore and I would like to just not
run it on aarch64.

Tested on aarch64.  OK for checkin?

Steve Ellcey
sellcey@cavium.com


2018-09-26  Steve Ellcey  <sellcey@cavium.com>

	PR testsuite/87433
	* gcc.dg/zero_bits_compound-1.c: Do not run on aarch64*-*-*.

Comments

Jeff Law Sept. 26, 2018, 6:10 p.m. | #1
On 9/26/18 8:58 AM, Steve Ellcey wrote:
> PR rtl-optimization/85160 which allowed combine to convert

> two instructions into two different instructions if they had a lower cost

> caused a couple of regressions on aarch64.  This patch fixes one of them.

> 

> After the above patch, the gcc.dg/zero_bits_compound-1.c test on 

> aarch64 generates an and rtl instruction where it did not before.

> A comparision of the code generated before and after the 85160 patch

> shows that GCC is still generating the same number of instructions

> but there are fewer dependencies between some of the instructions

> so the new code would be better on systems with multiple functional

> units and no worse on systems with a single functional unit.

> 

> Since the test is just verifying that an 'and' rtl instruction is

> not generated and that is now happening on aarch64 but the new code

> is as good as or better than the old code this test doesn't seem

> to make sense for aarch64 anymore and I would like to just not

> run it on aarch64.

> 

> Tested on aarch64.  OK for checkin?

> 

> Steve Ellcey

> sellcey@cavium.com

> 

> 

> 2018-09-26  Steve Ellcey  <sellcey@cavium.com>

> 

> 	PR testsuite/87433

> 	* gcc.dg/zero_bits_compound-1.c: Do not run on aarch64*-*-*.

OK.
jeff

Patch

diff --git a/gcc/testsuite/gcc.dg/zero_bits_compound-1.c b/gcc/testsuite/gcc.dg/zero_bits_compound-1.c
index 63b8ac1..e715949 100644
--- a/gcc/testsuite/gcc.dg/zero_bits_compound-1.c
+++ b/gcc/testsuite/gcc.dg/zero_bits_compound-1.c
@@ -4,7 +4,7 @@ 
 /* Note: This test requires that char, int and long have different sizes and the
    target has a way to do 32 -> 64 bit zero extension other than AND.  */
 
-/* { dg-do compile { target i?86-*-* x86_64-*-* s390*-*-* aarch64*-*-* } } */
+/* { dg-do compile { target i?86-*-* x86_64-*-* s390*-*-* } } */
 /* { dg-require-effective-target lp64 } */
 /* { dg-options "-O3 -dP" } */