Show patches with: Archived = No       |   21046 patches
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Patch Series S/W/F Date Submitter Delegate State
[v2,ARM,1/5x] : MVE store intrinsics. [v2,ARM,1/5x] : MVE store intrinsics. 0 0 0 2020-03-18 Srinath Parvathaneni New
[v2,ARM,1/4x] : MVE intrinsics with quaternary operands. [v2,ARM,1/4x] : MVE intrinsics with quaternary operands. 0 0 0 2020-03-18 Srinath Parvathaneni New
[v4,ARM,3/x] : MVE ACLE intrinsics framework patch. [v4,ARM,3/x] : MVE ACLE intrinsics framework patch. 0 0 0 2020-03-16 Srinath Parvathaneni New
[v4,ARM,2/x] : MVE ACLE intrinsics framework patch. [v4,ARM,2/x] : MVE ACLE intrinsics framework patch. 0 0 0 2020-03-11 Srinath Parvathaneni New
[v2,ARM,3/2x] : MVE intrinsics with binary operands. [v2,ARM,3/2x] : MVE intrinsics with binary operands. 0 0 0 2020-03-10 Srinath Parvathaneni New
[v2,ARM,2/2x] : MVE intrinsics with binary operands. [v2,ARM,2/2x] : MVE intrinsics with binary operands. 0 0 0 2020-03-10 Srinath Parvathaneni New
[v2,ARM,1/2x] : MVE intrinsics with binary operands. [v2,ARM,1/2x] : MVE intrinsics with binary operands. 0 0 0 2020-03-10 Srinath Parvathaneni New
[v2,ARM,4/1x] : MVE intrinsics with unary operand. [v2,ARM,4/1x] : MVE intrinsics with unary operand. 0 0 0 2020-03-10 Srinath Parvathaneni New
[v2,ARM,2/1x] : MVE intrinsics with unary operand. [v2,ARM,2/1x] : MVE intrinsics with unary operand. 0 0 0 2020-03-10 Srinath Parvathaneni New
[v2,ARM,1/1x] : Patch to support MVE ACLE intrinsics with unary operand. [v2,ARM,1/1x] : Patch to support MVE ACLE intrinsics with unary operand. 0 0 0 2020-03-10 Srinath Parvathaneni New
[v2,ARM,4/x] : MVE ACLE vector interleaving store intrinsics. [v2,ARM,4/x] : MVE ACLE vector interleaving store intrinsics. 0 0 0 2020-03-10 Srinath Parvathaneni New
[v3,ARM,3/x] : MVE ACLE intrinsics framework patch. [v3,ARM,3/x] : MVE ACLE intrinsics framework patch. 0 0 0 2020-03-10 Srinath Parvathaneni New
[v3,ARM,2/x] : MVE ACLE intrinsics framework patch. [v3,ARM,2/x] : MVE ACLE intrinsics framework patch. 0 0 0 2020-03-10 Srinath Parvathaneni Superseded
: Add myself to MAINTAINERS : Add myself to MAINTAINERS 0 0 0 2020-03-05 Srinath Parvathaneni New
[v2,ARM,3/x] : MVE ACLE intrinsics framework patch. [v2,ARM,3/x] : MVE ACLE intrinsics framework patch. 0 0 0 2020-02-14 Srinath Parvathaneni Superseded
[v2,ARM,2/x] : MVE ACLE intrinsics framework patch. [v2,ARM,2/x] : MVE ACLE intrinsics framework patch. 0 0 0 2020-02-14 Srinath Parvathaneni Superseded
[ARM] : Fix the failing ACLE testcase with correct test directive. [ARM] : Fix the failing ACLE testcase with correct test directive. 0 0 0 2019-11-21 Srinath Parvathaneni New
[ARM,14x] : MVE ACLE whole vector left shift with carry intrinsics. [ARM,14x] : MVE ACLE whole vector left shift with carry intrinsics. 0 0 0 2019-11-14 Srinath Parvathaneni New
[ARM,13x] : MVE ACLE scalar shift intrinsics. [ARM,13x] : MVE ACLE scalar shift intrinsics. 0 0 0 2019-11-14 Srinath Parvathaneni New
[ARM,12x] : MVE ACLE intrinsics to set and get vector lane. [ARM,12x] : MVE ACLE intrinsics to set and get vector lane. 0 0 0 2019-11-14 Srinath Parvathaneni New
[ARM,11x] : MVE ACLE vector interleaving store and deinterleaving load intrinsics and also aliase... [ARM,11x] : MVE ACLE vector interleaving store and deinterleaving load intrinsics and also aliase... 0 0 0 2019-11-14 Srinath Parvathaneni New
[ARM,10x] : MVE ACLE intrinsics "add with carry across beats" and "beat-wise substract". [ARM,10x] : MVE ACLE intrinsics "add with carry across beats" and "beat-wise substract". 0 0 0 2019-11-14 Srinath Parvathaneni New
[ARM,2/8x] : MVE ACLE gather load and scatter store intrinsics with writeback. [ARM,2/8x] : MVE ACLE gather load and scatter store intrinsics with writeback. 0 0 0 2019-11-14 Srinath Parvathaneni New
[ARM,7x] : MVE vreinterpretq and vuninitializedq intrinsics. [ARM,7x] : MVE vreinterpretq and vuninitializedq intrinsics. 0 0 0 2019-11-14 Srinath Parvathaneni New
[ARM,6x] :MVE ACLE vaddq intrinsics using arithmetic plus operator. [ARM,6x] :MVE ACLE vaddq intrinsics using arithmetic plus operator. 0 0 0 2019-11-14 Srinath Parvathaneni New
[ARM,7/5x] : MVE store intrinsics which stores byte,half word or word to memory. [ARM,7/5x] : MVE store intrinsics which stores byte,half word or word to memory. 0 0 0 2019-11-14 Srinath Parvathaneni New
[ARM,6/5x] : Remaining MVE load intrinsics which loads half word and word or double word from mem... [ARM,6/5x] : Remaining MVE load intrinsics which loads half word and word or double word from mem... 0 0 0 2019-11-14 Srinath Parvathaneni Superseded
[ARM,5/5x] : MVE ACLE load intrinsics which load a byte, halfword, or word from memory. [ARM,5/5x] : MVE ACLE load intrinsics which load a byte, halfword, or word from memory. 0 0 0 2019-11-14 Srinath Parvathaneni New
[ARM,4/5x] : MVE load intrinsics with zero(_z) suffix. [ARM,4/5x] : MVE load intrinsics with zero(_z) suffix. 0 0 0 2019-11-14 Srinath Parvathaneni New
[ARM,3/5x] : MVE store intrinsics with predicated suffix. [ARM,3/5x] : MVE store intrinsics with predicated suffix. 0 0 0 2019-11-14 Srinath Parvathaneni New
[ARM,2/5x] : MVE load intrinsics. [ARM,2/5x] : MVE load intrinsics. 0 0 0 2019-11-14 Srinath Parvathaneni New
[ARM,1/5x] : MVE store intrinsics. [ARM,1/5x] : MVE store intrinsics. 0 0 0 2019-11-14 Srinath Parvathaneni New
[ARM,1/4x] : MVE intrinsics with quaternary operands. [ARM,1/4x] : MVE intrinsics with quaternary operands. 0 0 0 2019-11-14 Srinath Parvathaneni New
[ARM,1/3x] : MVE intrinsics with ternary operands. [ARM,1/3x] : MVE intrinsics with ternary operands. 0 0 0 2019-11-14 Srinath Parvathaneni New
[ARM,3/2x] : MVE intrinsics with binary operands. [ARM,3/2x] : MVE intrinsics with binary operands. 0 0 0 2019-11-14 Srinath Parvathaneni New
[ARM,2/2x] : MVE intrinsics with binary operands. [ARM,2/2x] : MVE intrinsics with binary operands. 0 0 0 2019-11-14 Srinath Parvathaneni New
[ARM,1/2x] : MVE intrinsics with binary operands. [ARM,1/2x] : MVE intrinsics with binary operands. 0 0 0 2019-11-14 Srinath Parvathaneni New
[ARM,4/1x] : MVE intrinsics with unary operand. [ARM,4/1x] : MVE intrinsics with unary operand. 0 0 0 2019-11-14 Srinath Parvathaneni New
[ARM,2/1x] : MVE intrinsics with unary operand. [ARM,2/1x] : MVE intrinsics with unary operand. 0 0 0 2019-11-14 Srinath Parvathaneni New
[ARM,1/1x] : Patch to support MVE ACLE intrinsics with unary operand. [ARM,1/1x] : Patch to support MVE ACLE intrinsics with unary operand. 0 0 0 2019-11-14 Srinath Parvathaneni New
[ARM,4/x] : MVE ACLE vector interleaving store intrinsics. [ARM,4/x] : MVE ACLE vector interleaving store intrinsics. 0 0 0 2019-11-14 Srinath Parvathaneni Superseded
[ARM,3/x] : MVE ACLE intrinsics framework patch. [ARM,3/x] : MVE ACLE intrinsics framework patch. 0 0 0 2019-11-14 Srinath Parvathaneni New
[ARM,2/x] : MVE ACLE intrinsics framework patch. [ARM,2/x] : MVE ACLE intrinsics framework patch. 0 0 0 2019-11-14 Srinath Parvathaneni New
[ARM,1/x] : MVE ACLE intrinsics framework patch. [ARM,1/x] : MVE ACLE intrinsics framework patch. 0 0 0 2019-11-14 Srinath Parvathaneni New
[GCC-7,AArch64] PR target/90075 Prefer bsl/bit/bif for copysignf. (backport GCC-7) [GCC-7,AArch64] PR target/90075 Prefer bsl/bit/bif for copysignf. (backport GCC-7) 0 0 0 2019-04-29 Srinath Parvathaneni New
[GCC-8,AArch64] PR target/90075 Prefer bsl/bit/bif for copysignf. (backport GCC-8) [GCC-8,AArch64] PR target/90075 Prefer bsl/bit/bif for copysignf. (backport GCC-8) 0 0 0 2019-04-29 Srinath Parvathaneni New
[2/2,ARM] Implement hint intrinsics for ARM [1/2,AArch64] Implement hint intrinsics for AArch64 0 0 0 2019-01-10 Srinath Parvathaneni New
[1/2,AArch64] Implement hint intrinsics for AArch64 [1/2,AArch64] Implement hint intrinsics for AArch64 0 0 0 2019-01-10 Srinath Parvathaneni New
or1k: Fix issue with set_got clobbering r9 or1k: Fix issue with set_got clobbering r9 0 0 0 2019-08-22 Stafford Horne New
[v3,5/5] or1k: only force reg for immediates OpenRISC updates for 10 (fpu, fixes) 0 0 0 2019-07-09 Stafford Horne New
[v3,4/5] or1k: Initial support for FPU OpenRISC updates for 10 (fpu, fixes) 0 0 0 2019-07-09 Stafford Horne New
[v3,3/5] or1k: Add mrori option, fix option docs OpenRISC updates for 10 (fpu, fixes) 0 0 0 2019-07-09 Stafford Horne New
[v3,2/5] or1k: Fix issues with msoft-div OpenRISC updates for 10 (fpu, fixes) 0 0 0 2019-07-09 Stafford Horne New
[v3,1/5] or1k: Fix code quality for volatile memory loads OpenRISC updates for 10 (fpu, fixes) 0 0 0 2019-07-09 Stafford Horne New
[v2,5/5] or1k: only force reg for immediates OpenRISC updates for 10 (fpu, fixes) 0 0 0 2019-07-03 Stafford Horne Superseded
[v2,4/5] or1k: Initial support for FPU OpenRISC updates for 10 (fpu, fixes) 0 0 0 2019-07-03 Stafford Horne Superseded
[v2,3/5] or1k: Add mrori option, fix option docs OpenRISC updates for 10 (fpu, fixes) 0 0 0 2019-07-03 Stafford Horne Superseded
[v2,2/5] or1k: Fix issues with msoft-div OpenRISC updates for 10 (fpu, fixes) 0 0 0 2019-07-03 Stafford Horne Superseded
[v2,1/5] or1k: Fix code quality for volatile memory loads OpenRISC updates for 10 (fpu, fixes) 0 0 0 2019-07-03 Stafford Horne Superseded
[2/2] or1k: Fix issues with msoft-div OpenRISC fixes 0 0 0 2019-05-06 Stafford Horne Superseded
[1/2] or1k: Fix code quality for volatile memory loads OpenRISC fixes 0 0 0 2019-05-06 Stafford Horne New
[3/3] or1k: only force reg for immediates OpenRISC floating point support + fixes 0 0 0 2019-04-10 Stafford Horne New
[2/3] or1k: Allow volatile memory for sign/zero extend loads OpenRISC floating point support + fixes 0 0 0 2019-04-10 Stafford Horne New
[1/3] or1k: Initial support for FPU OpenRISC floating point support + fixes 0 0 0 2019-04-10 Stafford Horne New
[wwwdocs] gcc-9/changes.html - Mention new OpenRISC backend [wwwdocs] gcc-9/changes.html - Mention new OpenRISC backend 0 0 0 2019-04-02 Stafford Horne New
MAINTAINERS: add myself as or1k maintainer MAINTAINERS: add myself as or1k maintainer 0 0 0 2018-11-09 Stafford Horne New
[v4,3/3] or1k: gcc: initial support for openrisc OpenRISC port 0 0 0 2018-11-06 Stafford Horne New
[v4,2/3] or1k: testsuite: initial support for openrisc OpenRISC port 0 0 0 2018-11-06 Stafford Horne New
[v4,1/3] or1k: libgcc: initial support for openrisc OpenRISC port 0 0 0 2018-11-06 Stafford Horne New
Add myself to MAINTAINERS Add myself to MAINTAINERS 0 0 0 2018-11-03 Stafford Horne New
[wwwdocs] readings.html - add OpenRISC links [wwwdocs] readings.html - add OpenRISC links 0 0 0 2018-11-01 Stafford Horne New
[v3,3/3] or1k: gcc: initial support for openrisc OpenRISC port 0 0 0 2018-10-27 Stafford Horne Superseded
[v3,2/3] or1k: testsuite: initial support for openrisc OpenRISC port 0 0 0 2018-10-27 Stafford Horne Superseded
[v3,1/3] or1k: libgcc: initial support for openrisc OpenRISC port 0 0 0 2018-10-27 Stafford Horne New
[v2,3/3] or1k: gcc: initial support for openrisc OpenRISC port 0 0 0 2018-10-04 Stafford Horne Superseded
[v2,2/3] or1k: testsuite: initial support for openrisc OpenRISC port 0 0 0 2018-10-04 Stafford Horne Superseded
[v2,1/3] or1k: libgcc: initial support for openrisc OpenRISC port 0 0 0 2018-10-04 Stafford Horne Superseded
[3/3] or1k: gcc: initial support for openrisc OpenRISC port 0 0 0 2018-08-26 Stafford Horne New
[2/3] or1k: testsuite: initial support for openrisc OpenRISC port 0 0 0 2018-08-26 Stafford Horne Superseded
[1/3] or1k: libgcc: initial support for openrisc OpenRISC port 0 0 0 2018-08-26 Stafford Horne New
[Pingx3,ARM] Add ACLE intrinsics for dot product (vusdot - vector, v<us/su>dot - by element) for ... [Pingx3,ARM] Add ACLE intrinsics for dot product (vusdot - vector, v<us/su>dot - by element) for ... 0 0 0 2020-02-10 Stam Markianos-Wright New
[BUG,Aarch64,ARM] (PR93300) Fix ICE due to BFmode placement in GET_MODES_WIDER chain. [BUG,Aarch64,ARM] (PR93300) Fix ICE due to BFmode placement in GET_MODES_WIDER chain. 0 0 0 2020-01-29 Stam Markianos-Wright New
[committed,ARM] Update __fp16 test to fix regression caused by Bfloat optimisation. [committed,ARM] Update __fp16 test to fix regression caused by Bfloat optimisation. 0 0 0 2020-01-27 Stam Markianos-Wright New
[ARM] Add Bfloat16_t scalar type, vector types and machine modes to ARM back-end [2/2] [ARM] Add Bfloat16_t scalar type, vector types and machine modes to ARM back-end [2/2] 0 0 0 2020-01-10 Stam Markianos-Wright New
[ARM] Add Bfloat16_t scalar type, vector types and machine modes to ARM back-end [1/2] [ARM] Add Bfloat16_t scalar type, vector types and machine modes to ARM back-end [1/2] 0 0 0 2020-01-10 Stam Markianos-Wright New
[ARM] Add Bfloat16_t scalar type, vector types and machine modes to ARM back-end [ARM] Add Bfloat16_t scalar type, vector types and machine modes to ARM back-end 0 0 0 2019-12-20 Stam Markianos-Wright New
[AArch64] Add ACLE intrinsics for bfdot for ARMv8.6 Extension [AArch64] Add ACLE intrinsics for bfdot for ARMv8.6 Extension 0 0 0 2019-12-20 Stam Markianos-Wright New
[committed] Add myself to MAINTAINERS. [committed] Add myself to MAINTAINERS. 0 0 0 2019-12-19 Stam Markianos-Wright New
[Aarch64] Add Bfloat16_t scalar type, vector types and machine modes to Aarch64 back-end [2/2] [Aarch64] Add Bfloat16_t scalar type, vector types and machine modes to Aarch64 back-end [2/2] 0 0 0 2019-12-18 Stam Markianos-Wright New
[Aarch64] Add Bfloat16_t scalar type, vector types and machine modes to Aarch64 back-end [1/2] [Aarch64] Add Bfloat16_t scalar type, vector types and machine modes to Aarch64 back-end [1/2] 0 0 0 2019-12-18 Stam Markianos-Wright New
[ARM] Add ACLE intrinsics for dot product (vusdot - vector, v<us/su>dot - by element) for AArch32... [ARM] Add ACLE intrinsics for dot product (vusdot - vector, v<us/su>dot - by element) for AArch32... 0 0 0 2019-12-13 Stam Markianos-Wright New
[AArch64] Add ACLE intrinsics for dot product (usdot - vector, <us/su>dot - by element) for AArch... [AArch64] Add ACLE intrinsics for dot product (usdot - vector, <us/su>dot - by element) for AArch... 0 0 0 2019-12-13 Stam Markianos-Wright New
[testsuite,ARM,AArch64] Add ARM v8.6 effective target checks to target-supports.exp [testsuite,ARM,AArch64] Add ARM v8.6 effective target checks to target-supports.exp 0 0 0 2019-12-12 Stam Markianos-Wright New
[PING,ARM] Arm generates out of range conditional branches in Thumb2 (PR91816) [PING,ARM] Arm generates out of range conditional branches in Thumb2 (PR91816) 0 0 0 2019-11-15 Stam Markianos-Wright New
Add ARM-specific Bfloat format support to middle-end Add ARM-specific Bfloat format support to middle-end 0 0 0 2019-11-15 Stam Markianos-Wright New
[ARM] Arm generates out of range conditional branches in Thumb2 (PR91816) [ARM] Arm generates out of range conditional branches in Thumb2 (PR91816) 0 0 0 2019-10-11 Stam Markianos-Wright New
[AArch64] Update hwcap string for fp16fml in aarch64-option-extensions.def [AArch64] Update hwcap string for fp16fml in aarch64-option-extensions.def 0 0 0 2019-09-10 Stam Markianos-Wright New
[v2] ARM: add test case for -masm-syntax-unified (PR88648) [v2] ARM: add test case for -masm-syntax-unified (PR88648) 0 0 0 2019-01-08 Stefan Agner New
ARM: add test case for -masm-syntax-unified (PR88648) ARM: add test case for -masm-syntax-unified (PR88648) 0 0 0 2019-01-02 Stefan Agner Superseded
ARM: fix -masm-syntax-unified (PR88648) ARM: fix -masm-syntax-unified (PR88648) 0 0 0 2019-01-01 Stefan Agner New
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