Show patches with: Series = V5: Emulate MMX intrinsics with SSE       |    Archived = No       |   41 patches
Patch Series S/W/F Date Submitter Delegate State
[41/40] Prevent allocation of MMX registers with TARGET_MMX_WITH_SSE V5: Emulate MMX intrinsics with SSE 0 0 0 2019-02-14 Uros Bizjak New
[40/40] i386: Also enable SSSE3 __m64 tests in 64-bit mode V5: Emulate MMX intrinsics with SSE 0 0 0 2019-02-14 H.J. Lu New
[39/40] i386: Add tests for MMX intrinsic emulations with SSE V5: Emulate MMX intrinsics with SSE 0 0 0 2019-02-14 H.J. Lu Superseded
[38/40] i386: Enable TM MMX intrinsics with SSE2 V5: Emulate MMX intrinsics with SSE 0 0 0 2019-02-14 H.J. Lu Superseded
[37/40] i386: Allow MMX intrinsic emulation with SSE V5: Emulate MMX intrinsics with SSE 0 0 0 2019-02-14 H.J. Lu Superseded
[36/40] i386: Allow MMX vector expanders with TARGET_MMX_WITH_SSE V5: Emulate MMX intrinsics with SSE 0 0 0 2019-02-14 H.J. Lu Superseded
[35/40] i386: Allow MMXMODE moves with TARGET_MMX_WITH_SSE V5: Emulate MMX intrinsics with SSE 0 0 0 2019-02-14 H.J. Lu Superseded
[34/40] i386: Emulate MMX abs<mode>2 with SSE V5: Emulate MMX intrinsics with SSE 0 0 0 2019-02-14 H.J. Lu Superseded
[33/40] i386: Emulate MMX ssse3_palignrdi with SSE V5: Emulate MMX intrinsics with SSE 0 0 0 2019-02-14 H.J. Lu Superseded
[32/40] i386: Emulate MMX ssse3_psign<mode>3 with SSE V5: Emulate MMX intrinsics with SSE 0 0 0 2019-02-14 H.J. Lu Superseded
[31/40] i386: Emulate MMX pshufb with SSE version V5: Emulate MMX intrinsics with SSE 0 0 0 2019-02-14 H.J. Lu New
[30/40] i386: Emulate MMX ssse3_pmulhrswv4hi3 with SSE V5: Emulate MMX intrinsics with SSE 0 0 0 2019-02-14 H.J. Lu Superseded
[29/40] i386: Emulate MMX ssse3_pmaddubsw with SSE V5: Emulate MMX intrinsics with SSE 0 0 0 2019-02-14 H.J. Lu Superseded
[28/40] i386: Emulate MMX ssse3_ph<plusminus_mnemonic>dv2si3 with SSE V5: Emulate MMX intrinsics with SSE 0 0 0 2019-02-14 H.J. Lu Superseded
[27/40] i386: Emulate MMX ssse3_ph<plusminus_mnemonic>wv4hi3 with SSE V5: Emulate MMX intrinsics with SSE 0 0 0 2019-02-14 H.J. Lu Superseded
[26/40] i386: Emulate MMX umulv1siv1di3 with SSE2 V5: Emulate MMX intrinsics with SSE 0 0 0 2019-02-14 H.J. Lu Superseded
[25/40] i386: Emulate MMX movntq with SSE2 movntidi V5: Emulate MMX intrinsics with SSE 0 0 0 2019-02-14 H.J. Lu Superseded
[24/40] i386: Emulate MMX mmx_psadbw with SSE V5: Emulate MMX intrinsics with SSE 0 0 0 2019-02-14 H.J. Lu Superseded
[23/40] i386: Emulate MMX mmx_uavgv4hi3 with SSE V5: Emulate MMX intrinsics with SSE 0 0 0 2019-02-14 H.J. Lu Superseded
[22/40] i386: Emulate MMX mmx_uavgv8qi3 with SSE V5: Emulate MMX intrinsics with SSE 0 0 0 2019-02-14 H.J. Lu Superseded
[21/40] i386: Emulate MMX maskmovq with SSE2 maskmovdqu V5: Emulate MMX intrinsics with SSE 0 0 0 2019-02-14 H.J. Lu New
[20/40] i386: Emulate MMX mmx_umulv4hi3_highpart with SSE V5: Emulate MMX intrinsics with SSE 0 0 0 2019-02-14 H.J. Lu Superseded
[19/40] i386: Emulate MMX mmx_pmovmskb with SSE V5: Emulate MMX intrinsics with SSE 0 0 0 2019-02-14 H.J. Lu Superseded
[18/40] i386: Emulate MMX V4HI smaxmin/V8QI umaxmin with SSE V5: Emulate MMX intrinsics with SSE 0 0 0 2019-02-14 H.J. Lu Superseded
[17/40] i386: Emulate MMX mmx_pinsrw with SSE V5: Emulate MMX intrinsics with SSE 0 0 0 2019-02-14 H.J. Lu Superseded
[16/40] i386: Emulate MMX mmx_pextrw with SSE V5: Emulate MMX intrinsics with SSE 0 0 0 2019-02-14 H.J. Lu Superseded
[15/40] i386: Emulate MMX sse_cvtpi2ps with SSE V5: Emulate MMX intrinsics with SSE 0 0 0 2019-02-14 H.J. Lu New
[14/40] i386: Emulate MMX sse_cvtps2pi/sse_cvttps2pi with SSE V5: Emulate MMX intrinsics with SSE 0 0 0 2019-02-14 H.J. Lu Superseded
[13/40] i386: Emulate MMX pshufw with SSE V5: Emulate MMX intrinsics with SSE 0 0 0 2019-02-14 H.J. Lu Superseded
[12/40] i386: Emulate MMX vec_dupv2si with SSE V5: Emulate MMX intrinsics with SSE 0 0 0 2019-02-14 H.J. Lu Superseded
[11/40] i386: Emulate MMX mmx_eq/mmx_gt<mode>3 with SSE V5: Emulate MMX intrinsics with SSE 0 0 0 2019-02-14 H.J. Lu Superseded
[10/40] i386: Emulate MMX mmx_andnot<mode>3 with SSE V5: Emulate MMX intrinsics with SSE 0 0 0 2019-02-14 H.J. Lu Superseded
[09/40] i386: Emulate MMX <any_logic><mode>3 with SSE V5: Emulate MMX intrinsics with SSE 0 0 0 2019-02-14 H.J. Lu Superseded
[08/40] i386: Emulate MMX ashr<mode>3/<shift_insn><mode>3 with SSE V5: Emulate MMX intrinsics with SSE 0 0 0 2019-02-14 H.J. Lu New
[07/40] i386: Emulate MMX mmx_pmaddwd with SSE V5: Emulate MMX intrinsics with SSE 0 0 0 2019-02-14 H.J. Lu Superseded
[06/40] i386: Emulate MMX smulv4hi3_highpart with SSE V5: Emulate MMX intrinsics with SSE 0 0 0 2019-02-14 H.J. Lu Superseded
[05/40] i386: Emulate MMX mulv4hi3 with SSE V5: Emulate MMX intrinsics with SSE 0 0 0 2019-02-14 H.J. Lu Superseded
[04/40] i386: Emulate MMX plusminus/sat_plusminus with SSE V5: Emulate MMX intrinsics with SSE 0 0 0 2019-02-14 H.J. Lu Superseded
[03/40] i386: Emulate MMX punpcklXX/punpckhXX with SSE punpcklXX V5: Emulate MMX intrinsics with SSE 0 0 0 2019-02-14 H.J. Lu Superseded
[02/40] i386: Emulate MMX packsswb/packssdw/packuswb with SSE2 V5: Emulate MMX intrinsics with SSE 0 0 0 2019-02-14 H.J. Lu Superseded
[01/40] i386: Allow MMX register modes in SSE registers V5: Emulate MMX intrinsics with SSE 0 0 0 2019-02-14 H.J. Lu New