Show patches with: State = Action Required       |    Archived = No       |   19878 patches
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Patch Series S/W/F Date Submitter Delegate State
arm: Fix the failing mve scalar shift execution tests. arm: Fix the failing mve scalar shift execution tests. 0 0 0 2020-06-18 Srinath Parvathaneni New
[GCC-10,Backport] arm: Fix the MVE ACLE vaddq_m polymorphic variants. [GCC-10,Backport] arm: Fix the MVE ACLE vaddq_m polymorphic variants. 0 0 0 2020-06-17 Srinath Parvathaneni New
[GCC-10,Backport] arm: Fix MVE scalar shift intrinsics code-gen. [GCC-10,Backport] arm: Fix MVE scalar shift intrinsics code-gen. 0 0 0 2020-06-17 Srinath Parvathaneni New
[GCC-10,Backport] arm: Fix the MVE ACLE vbicq intrinsics. [GCC-10,Backport] arm: Fix the MVE ACLE vbicq intrinsics. 0 0 0 2020-06-16 Srinath Parvathaneni New
[GCC-10,Backport] arm: Correct the grouping of operands in MVE vector scatter store intrinsics (P... [GCC-10,Backport] arm: Correct the grouping of operands in MVE vector scatter store intrinsics (P... 0 0 0 2020-06-16 Srinath Parvathaneni New
[GCC-10,Backport] arm: Fix unintentional fall throughs in arm.c [GCC-10,Backport] arm: Fix unintentional fall throughs in arm.c 0 0 0 2020-06-16 Srinath Parvathaneni New
[GCC-10,Backport] arm: Fix the wrong code-gen generated by MVE vector load/store intrinsics (PR94... [GCC-10,Backport] arm: Fix the wrong code-gen generated by MVE vector load/store intrinsics (PR94... 0 0 0 2020-06-16 Srinath Parvathaneni New
arm: Fix the MVE ACLE vaddq_m polymorphic variants. arm: Fix the MVE ACLE vaddq_m polymorphic variants. 0 0 0 2020-06-04 Srinath Parvathaneni Superseded
[ARM] : Correct the grouping of operands in MVE vector scatter store intrinsics (PR94735). [ARM] : Correct the grouping of operands in MVE vector scatter store intrinsics (PR94735). 0 0 0 2020-06-02 Srinath Parvathaneni Superseded
arm: Fix the MVE ACLE vbicq intrinsics. arm: Fix the MVE ACLE vbicq intrinsics. 0 0 0 2020-05-28 Srinath Parvathaneni Superseded
[ARM] : Fix typo in documentation. [ARM] : Fix typo in documentation. 0 0 0 2020-05-18 Srinath Parvathaneni New
[ARM,wwwdocs] : Document Armv8.1-M Mainline Security Extensions changes. [ARM,wwwdocs] : Document Armv8.1-M Mainline Security Extensions changes. 0 0 0 2020-05-15 Srinath Parvathaneni New
[ARM,wwwdocs] : Document Armv8.1-M, Helium Intrinsics and Cortex-M55 changes. [ARM,wwwdocs] : Document Armv8.1-M, Helium Intrinsics and Cortex-M55 changes. 0 0 0 2020-05-15 Srinath Parvathaneni New
[ARM] : Fix the wrong code-gen generated by MVE vector load/store intrinsics (PR94959). [ARM] : Fix the wrong code-gen generated by MVE vector load/store intrinsics (PR94959). 0 0 0 2020-05-13 Srinath Parvathaneni Superseded
[ARM] : Change arm constraint name from "e" to "Te". [ARM] : Change arm constraint name from "e" to "Te". 0 0 0 2020-04-24 Srinath Parvathaneni New
[ARM] : Fix for MVE ACLE intrinsics with writeback (PR94317). [ARM] : Fix for MVE ACLE intrinsics with writeback (PR94317). 0 0 0 2020-03-31 Srinath Parvathaneni New
[ARM] : Add MVE ACLE intrinsics vbicq_n_* polymorphic variant support. [ARM] : Add MVE ACLE intrinsics vbicq_n_* polymorphic variant support. 0 0 0 2020-03-31 Srinath Parvathaneni New
[v2,ARM,14x] : MVE ACLE whole vector left shift with carry intrinsics. [v2,ARM,14x] : MVE ACLE whole vector left shift with carry intrinsics. 0 0 0 2020-03-23 Srinath Parvathaneni New
[v2,ARM,13x] : MVE ACLE scalar shift intrinsics. [v2,ARM,13x] : MVE ACLE scalar shift intrinsics. 0 0 0 2020-03-23 Srinath Parvathaneni New
[v2,ARM,12x] : MVE ACLE intrinsics to set and get vector lane. [v2,ARM,12x] : MVE ACLE intrinsics to set and get vector lane. 0 0 0 2020-03-23 Srinath Parvathaneni New
[v2,ARM,11x] : MVE ACLE vector interleaving store and deinterleaving load intrinsics and also ali... [v2,ARM,11x] : MVE ACLE vector interleaving store and deinterleaving load intrinsics and also ali... 0 0 0 2020-03-20 Srinath Parvathaneni New
[v2,ARM,10x] : MVE ACLE intrinsics "add with carry across beats" and "beat-wise substract". [v2,ARM,10x] : MVE ACLE intrinsics "add with carry across beats" and "beat-wise substract". 0 0 0 2020-03-20 Srinath Parvathaneni New
[v2,ARM,2/8x] : MVE ACLE gather load and scatter store intrinsics with writeback. [v2,ARM,2/8x] : MVE ACLE gather load and scatter store intrinsics with writeback. 0 0 0 2020-03-20 Srinath Parvathaneni New
[v2,ARM,7x] : MVE vreinterpretq and vuninitializedq intrinsics. [v2,ARM,7x] : MVE vreinterpretq and vuninitializedq intrinsics. 0 0 0 2020-03-19 Srinath Parvathaneni New
[v2,ARM,6x] :MVE ACLE vaddq intrinsics using arithmetic plus operator. [v2,ARM,6x] :MVE ACLE vaddq intrinsics using arithmetic plus operator. 0 0 0 2020-03-19 Srinath Parvathaneni New
[v2,ARM,6/5x] : Remaining MVE load intrinsics which loads half word and word or double word from ... [v2,ARM,6/5x] : Remaining MVE load intrinsics which loads half word and word or double word from ... 0 0 0 2020-03-18 Srinath Parvathaneni New
[v2,ARM,5/5x] : MVE ACLE load intrinsics which load a byte, halfword, or word from memory. [v2,ARM,5/5x] : MVE ACLE load intrinsics which load a byte, halfword, or word from memory. 0 0 0 2020-03-18 Srinath Parvathaneni New
[v2,ARM,4/5x] : MVE load intrinsics with zero(_z) suffix. [v2,ARM,4/5x] : MVE load intrinsics with zero(_z) suffix. 0 0 0 2020-03-18 Srinath Parvathaneni New
[v2,ARM,3/5x] : MVE store intrinsics with predicated suffix. [v2,ARM,3/5x] : MVE store intrinsics with predicated suffix. 0 0 0 2020-03-18 Srinath Parvathaneni New
[v2,ARM,2/5x] : MVE load intrinsics. [v2,ARM,2/5x] : MVE load intrinsics. 0 0 0 2020-03-18 Srinath Parvathaneni New
[v2,ARM,1/5x] : MVE store intrinsics. [v2,ARM,1/5x] : MVE store intrinsics. 0 0 0 2020-03-18 Srinath Parvathaneni New
[v2,ARM,1/4x] : MVE intrinsics with quaternary operands. [v2,ARM,1/4x] : MVE intrinsics with quaternary operands. 0 0 0 2020-03-18 Srinath Parvathaneni New
[v4,ARM,3/x] : MVE ACLE intrinsics framework patch. [v4,ARM,3/x] : MVE ACLE intrinsics framework patch. 0 0 0 2020-03-16 Srinath Parvathaneni New
[v4,ARM,2/x] : MVE ACLE intrinsics framework patch. [v4,ARM,2/x] : MVE ACLE intrinsics framework patch. 0 0 0 2020-03-11 Srinath Parvathaneni New
[v2,ARM,3/2x] : MVE intrinsics with binary operands. [v2,ARM,3/2x] : MVE intrinsics with binary operands. 0 0 0 2020-03-10 Srinath Parvathaneni New
[v2,ARM,2/2x] : MVE intrinsics with binary operands. [v2,ARM,2/2x] : MVE intrinsics with binary operands. 0 0 0 2020-03-10 Srinath Parvathaneni New
[v2,ARM,1/2x] : MVE intrinsics with binary operands. [v2,ARM,1/2x] : MVE intrinsics with binary operands. 0 0 0 2020-03-10 Srinath Parvathaneni New
[v2,ARM,4/1x] : MVE intrinsics with unary operand. [v2,ARM,4/1x] : MVE intrinsics with unary operand. 0 0 0 2020-03-10 Srinath Parvathaneni New
[v2,ARM,2/1x] : MVE intrinsics with unary operand. [v2,ARM,2/1x] : MVE intrinsics with unary operand. 0 0 0 2020-03-10 Srinath Parvathaneni New
[v2,ARM,1/1x] : Patch to support MVE ACLE intrinsics with unary operand. [v2,ARM,1/1x] : Patch to support MVE ACLE intrinsics with unary operand. 0 0 0 2020-03-10 Srinath Parvathaneni New
[v2,ARM,4/x] : MVE ACLE vector interleaving store intrinsics. [v2,ARM,4/x] : MVE ACLE vector interleaving store intrinsics. 0 0 0 2020-03-10 Srinath Parvathaneni New
[v3,ARM,3/x] : MVE ACLE intrinsics framework patch. [v3,ARM,3/x] : MVE ACLE intrinsics framework patch. 0 0 0 2020-03-10 Srinath Parvathaneni New
[v3,ARM,2/x] : MVE ACLE intrinsics framework patch. [v3,ARM,2/x] : MVE ACLE intrinsics framework patch. 0 0 0 2020-03-10 Srinath Parvathaneni Superseded
: Add myself to MAINTAINERS : Add myself to MAINTAINERS 0 0 0 2020-03-05 Srinath Parvathaneni New
[v2,ARM,3/x] : MVE ACLE intrinsics framework patch. [v2,ARM,3/x] : MVE ACLE intrinsics framework patch. 0 0 0 2020-02-14 Srinath Parvathaneni Superseded
[v2,ARM,2/x] : MVE ACLE intrinsics framework patch. [v2,ARM,2/x] : MVE ACLE intrinsics framework patch. 0 0 0 2020-02-14 Srinath Parvathaneni Superseded
[ARM] : Fix the failing ACLE testcase with correct test directive. [ARM] : Fix the failing ACLE testcase with correct test directive. 0 0 0 2019-11-21 Srinath Parvathaneni New
[ARM,14x] : MVE ACLE whole vector left shift with carry intrinsics. [ARM,14x] : MVE ACLE whole vector left shift with carry intrinsics. 0 0 0 2019-11-14 Srinath Parvathaneni New
[ARM,13x] : MVE ACLE scalar shift intrinsics. [ARM,13x] : MVE ACLE scalar shift intrinsics. 0 0 0 2019-11-14 Srinath Parvathaneni New
[ARM,12x] : MVE ACLE intrinsics to set and get vector lane. [ARM,12x] : MVE ACLE intrinsics to set and get vector lane. 0 0 0 2019-11-14 Srinath Parvathaneni New
[ARM,11x] : MVE ACLE vector interleaving store and deinterleaving load intrinsics and also aliase... [ARM,11x] : MVE ACLE vector interleaving store and deinterleaving load intrinsics and also aliase... 0 0 0 2019-11-14 Srinath Parvathaneni New
[ARM,10x] : MVE ACLE intrinsics "add with carry across beats" and "beat-wise substract". [ARM,10x] : MVE ACLE intrinsics "add with carry across beats" and "beat-wise substract". 0 0 0 2019-11-14 Srinath Parvathaneni New
[ARM,2/8x] : MVE ACLE gather load and scatter store intrinsics with writeback. [ARM,2/8x] : MVE ACLE gather load and scatter store intrinsics with writeback. 0 0 0 2019-11-14 Srinath Parvathaneni New
[ARM,7x] : MVE vreinterpretq and vuninitializedq intrinsics. [ARM,7x] : MVE vreinterpretq and vuninitializedq intrinsics. 0 0 0 2019-11-14 Srinath Parvathaneni New
[ARM,6x] :MVE ACLE vaddq intrinsics using arithmetic plus operator. [ARM,6x] :MVE ACLE vaddq intrinsics using arithmetic plus operator. 0 0 0 2019-11-14 Srinath Parvathaneni New
[ARM,7/5x] : MVE store intrinsics which stores byte,half word or word to memory. [ARM,7/5x] : MVE store intrinsics which stores byte,half word or word to memory. 0 0 0 2019-11-14 Srinath Parvathaneni New
[ARM,6/5x] : Remaining MVE load intrinsics which loads half word and word or double word from mem... [ARM,6/5x] : Remaining MVE load intrinsics which loads half word and word or double word from mem... 0 0 0 2019-11-14 Srinath Parvathaneni Superseded
[ARM,5/5x] : MVE ACLE load intrinsics which load a byte, halfword, or word from memory. [ARM,5/5x] : MVE ACLE load intrinsics which load a byte, halfword, or word from memory. 0 0 0 2019-11-14 Srinath Parvathaneni New
[ARM,4/5x] : MVE load intrinsics with zero(_z) suffix. [ARM,4/5x] : MVE load intrinsics with zero(_z) suffix. 0 0 0 2019-11-14 Srinath Parvathaneni New
[ARM,3/5x] : MVE store intrinsics with predicated suffix. [ARM,3/5x] : MVE store intrinsics with predicated suffix. 0 0 0 2019-11-14 Srinath Parvathaneni New
[ARM,2/5x] : MVE load intrinsics. [ARM,2/5x] : MVE load intrinsics. 0 0 0 2019-11-14 Srinath Parvathaneni New
[ARM,1/5x] : MVE store intrinsics. [ARM,1/5x] : MVE store intrinsics. 0 0 0 2019-11-14 Srinath Parvathaneni New
[ARM,1/4x] : MVE intrinsics with quaternary operands. [ARM,1/4x] : MVE intrinsics with quaternary operands. 0 0 0 2019-11-14 Srinath Parvathaneni New
[ARM,1/3x] : MVE intrinsics with ternary operands. [ARM,1/3x] : MVE intrinsics with ternary operands. 0 0 0 2019-11-14 Srinath Parvathaneni New
[ARM,3/2x] : MVE intrinsics with binary operands. [ARM,3/2x] : MVE intrinsics with binary operands. 0 0 0 2019-11-14 Srinath Parvathaneni New
[ARM,2/2x] : MVE intrinsics with binary operands. [ARM,2/2x] : MVE intrinsics with binary operands. 0 0 0 2019-11-14 Srinath Parvathaneni New
[ARM,1/2x] : MVE intrinsics with binary operands. [ARM,1/2x] : MVE intrinsics with binary operands. 0 0 0 2019-11-14 Srinath Parvathaneni New
[ARM,4/1x] : MVE intrinsics with unary operand. [ARM,4/1x] : MVE intrinsics with unary operand. 0 0 0 2019-11-14 Srinath Parvathaneni New
[ARM,2/1x] : MVE intrinsics with unary operand. [ARM,2/1x] : MVE intrinsics with unary operand. 0 0 0 2019-11-14 Srinath Parvathaneni New
[ARM,1/1x] : Patch to support MVE ACLE intrinsics with unary operand. [ARM,1/1x] : Patch to support MVE ACLE intrinsics with unary operand. 0 0 0 2019-11-14 Srinath Parvathaneni New
[ARM,4/x] : MVE ACLE vector interleaving store intrinsics. [ARM,4/x] : MVE ACLE vector interleaving store intrinsics. 0 0 0 2019-11-14 Srinath Parvathaneni Superseded
[ARM,3/x] : MVE ACLE intrinsics framework patch. [ARM,3/x] : MVE ACLE intrinsics framework patch. 0 0 0 2019-11-14 Srinath Parvathaneni New
[ARM,2/x] : MVE ACLE intrinsics framework patch. [ARM,2/x] : MVE ACLE intrinsics framework patch. 0 0 0 2019-11-14 Srinath Parvathaneni New
[ARM,1/x] : MVE ACLE intrinsics framework patch. [ARM,1/x] : MVE ACLE intrinsics framework patch. 0 0 0 2019-11-14 Srinath Parvathaneni New
[GCC-7,AArch64] PR target/90075 Prefer bsl/bit/bif for copysignf. (backport GCC-7) [GCC-7,AArch64] PR target/90075 Prefer bsl/bit/bif for copysignf. (backport GCC-7) 0 0 0 2019-04-29 Srinath Parvathaneni New
[GCC-8,AArch64] PR target/90075 Prefer bsl/bit/bif for copysignf. (backport GCC-8) [GCC-8,AArch64] PR target/90075 Prefer bsl/bit/bif for copysignf. (backport GCC-8) 0 0 0 2019-04-29 Srinath Parvathaneni New
[2/2,ARM] Implement hint intrinsics for ARM [1/2,AArch64] Implement hint intrinsics for AArch64 0 0 0 2019-01-10 Srinath Parvathaneni New
[1/2,AArch64] Implement hint intrinsics for AArch64 [1/2,AArch64] Implement hint intrinsics for AArch64 0 0 0 2019-01-10 Srinath Parvathaneni New
or1k: Fix issue with set_got clobbering r9 or1k: Fix issue with set_got clobbering r9 0 0 0 2019-08-22 Stafford Horne New
[v3,5/5] or1k: only force reg for immediates OpenRISC updates for 10 (fpu, fixes) 0 0 0 2019-07-09 Stafford Horne New
[v3,4/5] or1k: Initial support for FPU OpenRISC updates for 10 (fpu, fixes) 0 0 0 2019-07-09 Stafford Horne New
[v3,3/5] or1k: Add mrori option, fix option docs OpenRISC updates for 10 (fpu, fixes) 0 0 0 2019-07-09 Stafford Horne New
[v3,2/5] or1k: Fix issues with msoft-div OpenRISC updates for 10 (fpu, fixes) 0 0 0 2019-07-09 Stafford Horne New
[v3,1/5] or1k: Fix code quality for volatile memory loads OpenRISC updates for 10 (fpu, fixes) 0 0 0 2019-07-09 Stafford Horne New
[v2,5/5] or1k: only force reg for immediates OpenRISC updates for 10 (fpu, fixes) 0 0 0 2019-07-03 Stafford Horne Superseded
[v2,4/5] or1k: Initial support for FPU OpenRISC updates for 10 (fpu, fixes) 0 0 0 2019-07-03 Stafford Horne Superseded
[v2,3/5] or1k: Add mrori option, fix option docs OpenRISC updates for 10 (fpu, fixes) 0 0 0 2019-07-03 Stafford Horne Superseded
[v2,2/5] or1k: Fix issues with msoft-div OpenRISC updates for 10 (fpu, fixes) 0 0 0 2019-07-03 Stafford Horne Superseded
[v2,1/5] or1k: Fix code quality for volatile memory loads OpenRISC updates for 10 (fpu, fixes) 0 0 0 2019-07-03 Stafford Horne Superseded
[2/2] or1k: Fix issues with msoft-div OpenRISC fixes 0 0 0 2019-05-06 Stafford Horne Superseded
[1/2] or1k: Fix code quality for volatile memory loads OpenRISC fixes 0 0 0 2019-05-06 Stafford Horne New
[3/3] or1k: only force reg for immediates OpenRISC floating point support + fixes 0 0 0 2019-04-10 Stafford Horne New
[2/3] or1k: Allow volatile memory for sign/zero extend loads OpenRISC floating point support + fixes 0 0 0 2019-04-10 Stafford Horne New
[1/3] or1k: Initial support for FPU OpenRISC floating point support + fixes 0 0 0 2019-04-10 Stafford Horne New
[wwwdocs] gcc-9/changes.html - Mention new OpenRISC backend [wwwdocs] gcc-9/changes.html - Mention new OpenRISC backend 0 0 0 2019-04-02 Stafford Horne New
MAINTAINERS: add myself as or1k maintainer MAINTAINERS: add myself as or1k maintainer 0 0 0 2018-11-09 Stafford Horne New
[v4,3/3] or1k: gcc: initial support for openrisc OpenRISC port 0 0 0 2018-11-06 Stafford Horne New
[v4,2/3] or1k: testsuite: initial support for openrisc OpenRISC port 0 0 0 2018-11-06 Stafford Horne New
[v4,1/3] or1k: libgcc: initial support for openrisc OpenRISC port 0 0 0 2018-11-06 Stafford Horne New
Add myself to MAINTAINERS Add myself to MAINTAINERS 0 0 0 2018-11-03 Stafford Horne New
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