RL78 addsi3 improvement

Message ID 000001d39611$e9adac80$bd090580$@renesas.com
State New
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Series
  • RL78 addsi3 improvement
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Commit Message

Sebastian Perta Jan. 25, 2018, 7:22 p.m.
Hello,
 
The following patch improves addsi3 by eliminating addw ax, #0 and replacing
addw ax, #-1 with decw ax where possible (if operand 2 is const)

The patch adds also a test case to check this.

Regression test is OK, tested with the following command:
make -k check-gcc RUNTESTFLAGS=--target_board=rl78-sim
 
 Please let me know if this is OK to check-in, Thank you!

Best Regards,
 Sebastian

Comments

Sebastian Perta Jan. 26, 2018, 11:48 a.m. | #1
HI DJ,

Thank you!

>> I wonder if these types of optimizations should be added to the

assembler too?  
Thank you for the suggestion, I will take a look into it.

Best Regards,
Sebastian


> -----Original Message-----

> From: DJ Delorie [mailto:dj@redhat.com]

> Sent: 25 January 2018 19:38

> To: Sebastian Perta <Sebastian.Perta@renesas.com>

> Cc: gcc-patches@gcc.gnu.org

> Subject: Re: [PATCH] RL78 addsi3 improvement

> 

> 

> This is OK.

> 

> I wonder if these types of optimizations should be added to the

> assembler too?  At least, if relaxation is enabled...

Patch

Index: ChangeLog
===================================================================
--- ChangeLog	(revision 257055)
+++ ChangeLog	(working copy)
@@ -1,3 +1,9 @@ 
+2018-01-25  Sebastian Perta  <sebastian.perta@renesas.com>
+
+	* config/rl78/rl78.c: if operand 2 is const avoid addition with 0
+	and use incw and decw where possible
+	* testsuite/gcc.target/rl78/test_addsi3_internal.c: new file
+
 2018-01-25  Jakub Jelinek  <jakub@redhat.com>
 
 	PR middle-end/83977




Index: config/rl78/rl78.c
===================================================================
--- config/rl78/rl78.c	(revision 257055)
+++ config/rl78/rl78.c	(working copy)
@@ -80,6 +80,9 @@ 
   "sp", "ap", "psw", "es", "cs"
 };
 
+/* used by rl78_addsi3_internal for formatting insns output */
+static char fmt_buffer[1024];
+
 /* Structure for G13 MDUC registers.  */
 struct mduc_reg_type
 {
@@ -4788,6 +4791,8 @@ 
 const char *
 rl78_addsi3_internal (rtx * operands, unsigned int alternative)
 {
+  const char *addH2 = "addw ax, %H2\n\t";
+
   /* If we are adding in a constant symbolic address when -mes0
      is active then we know that the address must be <64K and
      that it is invalid to access anything above 64K relative to
@@ -4799,16 +4804,38 @@ 
       && ! TREE_SIDE_EFFECTS (SYMBOL_REF_DECL (operands[2])))
     return "movw ax, %h1\n\taddw ax, %h2\n\tmovw %h0, ax";
 
+  if(CONST_INT_P(operands[2]))
+  {
+    if((INTVAL(operands[2]) & 0xFFFF0000) == 0)
+    {
+        addH2 = "";
+    }
+    else if((INTVAL(operands[2]) & 0xFFFF0000) == 0x00010000)
+    {
+        addH2 = "incw ax\n\t";
+    }
+    else if((INTVAL(operands[2]) & 0xFFFF0000) == 0xFFFF0000)
+    {
+        addH2 = "decw ax\n\t";
+    }
+  }
+
   switch (alternative)
     {
     case 0:
     case 1:
-      return "movw ax, %h1\n\taddw ax, %h2\n\tmovw %h0, ax\n\tmovw ax,
%H1\n\tsknc\n\tincw ax\n\taddw ax, %H2\n\tmovw %H0, ax";
+	  snprintf(fmt_buffer, sizeof(fmt_buffer),
+               "movw ax, %%h1\n\taddw ax, %%h2\n\tmovw %%h0, ax\n\tmovw ax,
%%H1\n\tsknc\n\tincw ax\n\t%smovw %%H0,ax", addH2);
+	  break;
     case 2:
-      return "movw ax, %h1\n\taddw ax,%h2\n\tmovw bc, ax\n\tmovw ax,
%H1\n\tsknc\n\tincw ax\n\taddw ax, %H2\n\tmovw %H0, ax\n\tmovw ax,
bc\n\tmovw %h0, ax";
+	  snprintf(fmt_buffer, sizeof(fmt_buffer),
+               "movw ax, %%h1\n\taddw ax, %%h2\n\tmovw bc, ax\n\tmovw ax,
%%H1\n\tsknc\n\tincw ax\n\t%smovw %%H0, ax\n\tmovw ax, bc\n\tmovw %%h0, ax",
addH2);
+ 	  break;
     default:
       gcc_unreachable ();
     }
+
+  return fmt_buffer;
 }
 
 rtx
Index: testsuite/gcc.target/rl78/test_addsi3_internal.c
===================================================================
--- testsuite/gcc.target/rl78/test_addsi3_internal.c	(nonexistent)
+++ testsuite/gcc.target/rl78/test_addsi3_internal.c	(working copy)
@@ -0,0 +1,27 @@ 
+/* { dg-do compile } */
+/* { dg-options "-Os" } */
+long l, v;
+
+void test1()
+{
+	l++;
+}
+
+void test2()
+{
+	l--;
+}
+
+void test3()
+{
+	l += 10;
+}
+
+long test4()
+{
+	return l + v;
+}
+
+/* { dg-final { scan-assembler-not "addw ax, #0" } } */
+/* { dg-final { scan-assembler-not "addw ax, #-1" } } */
+/* { dg-final { scan-assembler "decw ax" } } */