[rs6000] AIX test fixes 2

Message ID 1532115753.5007.8.camel@us.ibm.com
State New
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  • [rs6000] AIX test fixes 2
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Commit Message

Carl Love July 20, 2018, 7:42 p.m.
GCC maintainers:

The following patch fixes errors on AIX for the "vector double" tests
in altivec-1-runnable.c file.  The type "vector double" requires the
use of the GCC command line option -mvsx. The vector double tests
in altivec-1-runnable.c should be in altivec-2-runnable.c.  It looks
like my Linux testing of the original patch worked because I configured
GCC by default with -mcpu=power8.  AIX is not using that as the default
processor thus causing the compile of altivec-1-runnable.c to fail.

The vec_or tests in builtins-1.c were moved to another file by a
previous patch.  The vec_or test generated the xxlor instruction.  The
count of the xxlor instruction varies depending on the target as it is
used as a move instruction.  No other tests generate the xxlor
instruction. Hence, the count check was removed.

The patch has been tested on 

    powerpc64le-unknown-linux-gnu (Power 8 LE) 
    powerpc64-unknown-linux-gnu (Power 8 BE)
    AIX (Power 8)

With no regressions.

Please let me know if the patch looks OK for trunk.

                         Carl Love

--------------------------------------------------------------------

gcc/testsuite/ChangeLog:

2018-07-20  Carl Love  <cel@us.ibm.com>

	* gcc.target/powerpc/altivec-1-runnable.c: Move vector double tests to
	file altivec-2-runnable.c.
	* gcc.target/powerpc/altivec-2-runnable.c: Add vector double tests.
	* gcc.target/powerpc/buitlins-1.c: Remove check for xxlor.  Add linux and AIX
	targets for divdi3 and udivdi3 instructions.
---
 .../gcc.target/powerpc/altivec-1-runnable.c        | 50 ----------------------
 .../gcc.target/powerpc/altivec-2-runnable.c        | 49 ++++++++++++++++++++-
 gcc/testsuite/gcc.target/powerpc/builtins-1.c      |  9 ++--
 3 files changed, 52 insertions(+), 56 deletions(-)

-- 
2.7.4

Comments

Segher Boessenkool July 21, 2018, 5:15 p.m. | #1
Hi Carl,

On Fri, Jul 20, 2018 at 12:42:33PM -0700, Carl Love wrote:
> The following patch fixes errors on AIX for the "vector double" tests

> in altivec-1-runnable.c file.  The type "vector double" requires the

> use of the GCC command line option -mvsx. The vector double tests

> in altivec-1-runnable.c should be in altivec-2-runnable.c.  It looks

> like my Linux testing of the original patch worked because I configured

> GCC by default with -mcpu=power8.  AIX is not using that as the default

> processor thus causing the compile of altivec-1-runnable.c to fail.


This also fails on powerpc64-linux on a Power7.

> The vec_or tests in builtins-1.c were moved to another file by a

> previous patch.  The vec_or test generated the xxlor instruction.  The

> count of the xxlor instruction varies depending on the target as it is

> used as a move instruction.  No other tests generate the xxlor

> instruction. Hence, the count check was removed.


Okay, good idea.

> --- a/gcc/testsuite/gcc.target/powerpc/builtins-1.c

> +++ b/gcc/testsuite/gcc.target/powerpc/builtins-1.c

> @@ -287,7 +287,6 @@ int main ()

>     vec_mergeh          xxmrglw, vmrglh

>     vec_mul             mulld | mullw, mulhwu

>     vec_nor             xxlnor

> -   vec_or              xxlor


So there is no vec_or test anymore?  Is there more incorrect / out of date
in this comment?

> @@ -334,8 +331,10 @@ int main ()

>  /* { dg-final { scan-assembler-times "divd" 8  { target lp64 } } } */

>  /* { dg-final { scan-assembler-times "divdu" 2  { target lp64 } } } */

>  /* { dg-final { scan-assembler-times "mulld" 4  { target lp64 } } } */

> -/* { dg-final { scan-assembler-times {\mbl __divdi3\M} 2  { target { ilp32 } } } } */

> -/* { dg-final { scan-assembler-times {\mbl __udivdi3\M} 2  { target {ilp32 } } } } */

> +/* { dg-final { scan-assembler-times {\mbl .__divdi3\M} 2   { target { ilp32 &&  powerpc*-*-aix* } } } } */

> +/* { dg-final { scan-assembler-times {\mbl .__udivdi3\M} 2  { target { ilp32 &&  powerpc*-*-aix* } } } } */

> +/* { dg-final { scan-assembler-times {\mbl __divdi3\M} 2  { target { ilp32 && powerpc*-*-linux* } } } } */

> +/* { dg-final { scan-assembler-times {\mbl __udivdi3\M} 2 { target { ilp32 && powerpc*-*-linux* } } } } */


Those "." are the dot in a regexp, i.e. they match any character.

You could do something like

/* { dg-final { scan-assembler-times {\mbl \.?__divdi3\M} 2   { target { ilp32 } } } } */
/* { dg-final { scan-assembler-times {\mbl \.?__udivdi3\M} 2  { target { ilp32 } } } } */

to handle both ABIs with and without dots.

But, current patch is okay for trunk as well.  Thanks!


Segher

Patch

diff --git a/gcc/testsuite/gcc.target/powerpc/altivec-1-runnable.c b/gcc/testsuite/gcc.target/powerpc/altivec-1-runnable.c
index bb913d2..da8ebbc 100644
--- a/gcc/testsuite/gcc.target/powerpc/altivec-1-runnable.c
+++ b/gcc/testsuite/gcc.target/powerpc/altivec-1-runnable.c
@@ -31,16 +31,9 @@  int main ()
   vector signed int vec_si_result, vec_si_expected;
   vector signed char vec_sc_arg;
   vector signed char vec_sc_result, vec_sc_expected;
-  vector float vec_float_arg;
-  vector double vec_double_result, vec_double_expected;
   vector pixel vec_pixel_arg;
   vector unsigned int vec_ui_result, vec_ui_expected;
 
-  union conv {
-	  double d;
-	  unsigned long long l;
-  } conv_exp, conv_val;
-
   vec_bs_arg = (vector bool short){ 0, 101, 202, 303,
 				    404, 505, 606, 707 };
   vec_bi_expected = (vector bool int){ 0, 101, 202, 303 };
@@ -209,49 +202,6 @@  int main ()
        abort();
 #endif
   }
-  
-
-  vec_float_arg = (vector float){ 0.0, 1.5, 2.5, 3.5 };
-
-  vec_double_expected = (vector double){ 0.0, 1.5 };
-
-  vec_double_result = vec_unpackh (vec_float_arg);
-
-  for (i = 0; i < 2; i++) {
-    if (vec_double_expected[i] != vec_double_result[i])
-      {
-#if DEBUG
-	 printf("ERROR: vec_unpackh(), vec_double_expected[%d] = %f does not match vec_double_result[%d] = %f\n",
-		i, vec_double_expected[i], i, vec_double_result[i]);
-	 conv_val.d = vec_double_result[i];
-	 conv_exp.d = vec_double_expected[i];
-	 printf("     vec_unpackh(), vec_double_expected[%d] = 0x%llx does not match vec_double_result[%d] = 0x%llx\n",
-		i, conv_exp.l, i,conv_val.l);
-#else
-	 abort();
-#endif
-    }
-  }
-
-  vec_double_expected = (vector double){ 2.5, 3.5 };
-
-  vec_double_result = vec_unpackl (vec_float_arg);
-
-  for (i = 0; i < 2; i++) {
-    if (vec_double_expected[i] != vec_double_result[i])
-      {
-#if DEBUG
-         printf("ERROR: vec_unpackl() vec_double_expected[%d] = %f does not match vec_double_result[%d] = %f\n",
-		i, vec_double_expected[i], i, vec_double_result[i]);
-	 conv_val.d = vec_double_result[i];
-	 conv_exp.d = vec_double_expected[i];
-	 printf("     vec_unpackh(), vec_double_expected[%d] = 0x%llx does not match vec_double_result[%d] = 0x%llx\n",
-		i, conv_exp.l, i,conv_val.l);
-#else
-         abort();
-#endif
-      }
-  }
 
   return 0;
 }
diff --git a/gcc/testsuite/gcc.target/powerpc/altivec-2-runnable.c b/gcc/testsuite/gcc.target/powerpc/altivec-2-runnable.c
index 9d8aad4..041edcb 100644
--- a/gcc/testsuite/gcc.target/powerpc/altivec-2-runnable.c
+++ b/gcc/testsuite/gcc.target/powerpc/altivec-2-runnable.c
@@ -23,8 +23,15 @@  int main ()
 
   vector signed int vec_si_arg;
   vector signed long long int vec_slli_result, vec_slli_expected;
+  vector float vec_float_arg;
+  vector double vec_double_result, vec_double_expected;
 
-  /*  use of ‘long long’ in AltiVec types requires -mvsx */
+  union conv {
+	  double d;
+	  unsigned long long l;
+  } conv_exp, conv_val;
+
+  /* Use of 'double' and ‘long long’ in AltiVec types requires -mvsx */
   /* __builtin_altivec_vupkhsw and __builtin_altivec_vupklsw
      requires the -mpower8-vector option */
 
@@ -88,7 +95,47 @@  int main ()
 #endif
   }
 
+  vec_float_arg = (vector float){ 0.0, 1.5, 2.5, 3.5 };
+
+  vec_double_expected = (vector double){ 0.0, 1.5 };
+
+  vec_double_result = vec_unpackh (vec_float_arg);
+
+  for (i = 0; i < 2; i++) {
+    if (vec_double_expected[i] != vec_double_result[i])
+      {
+#if DEBUG
+	 printf("ERROR: vec_unpackh(), vec_double_expected[%d] = %f does not match vec_double_result[%d] = %f\n",
+		i, vec_double_expected[i], i, vec_double_result[i]);
+	 conv_val.d = vec_double_result[i];
+	 conv_exp.d = vec_double_expected[i];
+	 printf("     vec_unpackh(), vec_double_expected[%d] = 0x%llx does not match vec_double_result[%d] = 0x%llx\n",
+		i, conv_exp.l, i,conv_val.l);
+#else
+	 abort();
+#endif
+    }
+  }
+
+  vec_double_expected = (vector double){ 2.5, 3.5 };
 
+  vec_double_result = vec_unpackl (vec_float_arg);
+
+  for (i = 0; i < 2; i++) {
+    if (vec_double_expected[i] != vec_double_result[i])
+      {
+#if DEBUG
+         printf("ERROR: vec_unpackl() vec_double_expected[%d] = %f does not match vec_double_result[%d] = %f\n",
+		i, vec_double_expected[i], i, vec_double_result[i]);
+	 conv_val.d = vec_double_result[i];
+	 conv_exp.d = vec_double_expected[i];
+	 printf("     vec_unpackh(), vec_double_expected[%d] = 0x%llx does not match vec_double_result[%d] = 0x%llx\n",
+		i, conv_exp.l, i,conv_val.l);
+#else
+         abort();
+#endif
+      }
+  }
 
   return 0;
 }
diff --git a/gcc/testsuite/gcc.target/powerpc/builtins-1.c b/gcc/testsuite/gcc.target/powerpc/builtins-1.c
index 0b40828..f148b27 100644
--- a/gcc/testsuite/gcc.target/powerpc/builtins-1.c
+++ b/gcc/testsuite/gcc.target/powerpc/builtins-1.c
@@ -287,7 +287,6 @@  int main ()
    vec_mergeh          xxmrglw, vmrglh
    vec_mul             mulld | mullw, mulhwu
    vec_nor             xxlnor
-   vec_or              xxlor
    vec_packsu          vpkudus
    vec_                perm vperm
    vec_                round xvrdpi
@@ -324,8 +323,6 @@  int main ()
 /* { dg-final { scan-assembler-times "xxmrglw" 8 } } */
 /* { dg-final { scan-assembler-times "vmrglh" 8 } } */
 /* { dg-final { scan-assembler-times "xxlnor" 6 } } */
-/* { dg-final { scan-assembler-times "xxlor" 11 { target { ilp32 } } } } */
-/* { dg-final { scan-assembler-times "xxlor" 7  { target { lp64 } } } } */
 /* { dg-final { scan-assembler-times {\mvpkudus\M} 1 } } */
 /* { dg-final { scan-assembler-times "vperm" 4 } } */
 /* { dg-final { scan-assembler-times "xvrdpi" 2 } } */
@@ -334,8 +331,10 @@  int main ()
 /* { dg-final { scan-assembler-times "divd" 8  { target lp64 } } } */
 /* { dg-final { scan-assembler-times "divdu" 2  { target lp64 } } } */
 /* { dg-final { scan-assembler-times "mulld" 4  { target lp64 } } } */
-/* { dg-final { scan-assembler-times {\mbl __divdi3\M} 2  { target { ilp32 } } } } */
-/* { dg-final { scan-assembler-times {\mbl __udivdi3\M} 2  { target {ilp32 } } } } */
+/* { dg-final { scan-assembler-times {\mbl .__divdi3\M} 2   { target { ilp32 &&  powerpc*-*-aix* } } } } */
+/* { dg-final { scan-assembler-times {\mbl .__udivdi3\M} 2  { target { ilp32 &&  powerpc*-*-aix* } } } } */
+/* { dg-final { scan-assembler-times {\mbl __divdi3\M} 2  { target { ilp32 && powerpc*-*-linux* } } } } */
+/* { dg-final { scan-assembler-times {\mbl __udivdi3\M} 2 { target { ilp32 && powerpc*-*-linux* } } } } */
 /* { dg-final { scan-assembler-times "mullw" 12  { target ilp32 } } } */
 /* { dg-final { scan-assembler-times "mulhwu" 4  { target ilp32 } } } */
 /* { dg-final { scan-assembler-times "xxmrgld" 0 } } */