[3/6] rs6000: Improve truncifsf2

Message ID da94a264b92a1d86d59a438f1f535457055f8a95.1531778766.git.segher@kernel.crashing.org
State New
Headers show
Series
  • rs6000: Test all rs6000 floating point conversions
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Commit Message

Segher Boessenkool July 16, 2018, 10:52 p.m.
The current implementation leaves an unnecessary register move.  It is
easier to just expand things in the expander already.  This patch does
that.


2018-07-16  Segher Boessenkool  <segher@kernel.crashing.org>

	* config/rs6000/rs6000.md (trunc<mode>sf2): Expand truncates of
	double-double modes to SFmode directly directly.
	(trunc<mode>sf2_fprs): Delete.

---
 gcc/config/rs6000/rs6000.md | 23 +++++------------------
 1 file changed, 5 insertions(+), 18 deletions(-)

-- 
1.8.3.1

Patch

diff --git a/gcc/config/rs6000/rs6000.md b/gcc/config/rs6000/rs6000.md
index 44d32d9..94a0f7d 100644
--- a/gcc/config/rs6000/rs6000.md
+++ b/gcc/config/rs6000/rs6000.md
@@ -7702,28 +7702,15 @@  (define_expand "trunc<mode>sf2"
 {
   if (FLOAT128_IEEE_P (<MODE>mode))
     rs6000_expand_float128_convert (operands[0], operands[1], false);
-  else if (<MODE>mode == TFmode)
-    emit_insn (gen_trunctfsf2_fprs (operands[0], operands[1]));
-  else if (<MODE>mode == IFmode)
-    emit_insn (gen_truncifsf2_fprs (operands[0], operands[1]));
   else
-    gcc_unreachable ();
+    {
+      rtx tmp = gen_reg_rtx (DFmode);
+      emit_insn (gen_trunc<mode>df2 (tmp, operands[1]));
+      emit_insn (gen_truncdfsf2 (operands[0], tmp));
+    }
   DONE;
 })
 
-(define_insn_and_split "trunc<mode>sf2_fprs"
-  [(set (match_operand:SF 0 "gpc_reg_operand" "=f")
-	(float_truncate:SF (match_operand:IBM128 1 "gpc_reg_operand" "d")))
-   (clobber (match_scratch:DF 2 "=d"))]
-  "TARGET_HARD_FLOAT && TARGET_LONG_DOUBLE_128 && FLOAT128_IBM_P (<MODE>mode)"
-  "#"
-  "&& reload_completed"
-  [(set (match_dup 2)
-	(float_truncate:DF (match_dup 1)))
-   (set (match_dup 0)
-	(float_truncate:SF (match_dup 2)))]
-  "")
-
 (define_expand "floatsi<mode>2"
   [(parallel [(set (match_operand:FLOAT128 0 "gpc_reg_operand")
 		   (float:FLOAT128 (match_operand:SI 1 "gpc_reg_operand")))