[19/19] x86/Intel: debug registers are named DRn

Message ID 8ef99a87-e8ad-9f85-507e-653d9567c3a8@suse.com
State New
Headers show
Series
  • x86: further disassembler fixes and folding
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Commit Message

Jan Beulich July 13, 2020, 9:44 a.m.
%db<n> is an AT&T invention; the Intel documentation and MASM have only
ever specified DRn (in line with CRn and TRn). (In principle gas also
shouldn't accept the names in Intel mode, but at least for now I've kept
things as they are. Perhaps as a first step this should just be warned
about.)

gas/
2020-07-XX  Jan Beulich  <jbeulich@suse.com>

	* testsuite/gas/i386/intel.s: Use dr<N> instead of db<N>.
	* testsuite/gas/i386/intel-intel.d: Disambiguate name.
	* testsuite/gas/i386/intel.d,
	testsuite/gas/i386/opcode-intel.d: Adjust expectations.

opcodes/
2020-07-XX  Jan Beulich  <jbeulich@suse.com>

	* i386-dis.c (OP_D): Print dr<N> instead of db<N> in Intel mode.

Patch

--- a/gas/testsuite/gas/i386/intel-intel.d
+++ b/gas/testsuite/gas/i386/intel-intel.d
@@ -260,9 +260,9 @@  Disassembly of section .text:
 [ 	]*[a-f0-9]+:	0f 09 +	wbinvd *
 [ 	]*[a-f0-9]+:	0f 0b +	ud2 *
 [ 	]*[a-f0-9]+:	0f 20 d0 +	mov    eax,cr2
-[ 	]*[a-f0-9]+:	0f 21 d0 +	mov    eax,db2
+[ 	]*[a-f0-9]+:	0f 21 d0 +	mov    eax,dr2
 [ 	]*[a-f0-9]+:	0f 22 d0 +	mov    cr2,eax
-[ 	]*[a-f0-9]+:	0f 23 d0 +	mov    db2,eax
+[ 	]*[a-f0-9]+:	0f 23 d0 +	mov    dr2,eax
 [ 	]*[a-f0-9]+:	0f 24 d0 +	mov    eax,tr2
 [ 	]*[a-f0-9]+:	0f 26 d0 +	mov    tr2,eax
 [ 	]*[a-f0-9]+:	0f 30 +	wrmsr *
--- a/gas/testsuite/gas/i386/intel.d
+++ b/gas/testsuite/gas/i386/intel.d
@@ -1,6 +1,6 @@ 
 #as: -J
 #objdump: -dw
-#name: i386 intel
+#name: i386 intel (AT&T disassembly)
 #warning_output: intel.e
 
 .*: +file format .*
--- a/gas/testsuite/gas/i386/intel.s
+++ b/gas/testsuite/gas/i386/intel.s
@@ -252,9 +252,9 @@  foo:
  wbinvd
  ud2a
  mov    eax, cr2
- mov    eax, db2
+ mov    eax, dr2
  mov    cr2, eax
- mov    db2, eax
+ mov    dr2, eax
  mov    eax, tr2
  mov    tr2, eax
  wrmsr
--- a/gas/testsuite/gas/i386/opcode-intel.d
+++ b/gas/testsuite/gas/i386/opcode-intel.d
@@ -257,9 +257,9 @@  Disassembly of section .text:
  *[0-9a-f]+:	0f 09[ 	]+wbinvd[ 	]*
  *[0-9a-f]+:	0f 0b[ 	]+ud2[ 	]*
  *[0-9a-f]+:	0f 20 d0[ 	]+mov[ 	]+eax,cr2
- *[0-9a-f]+:	0f 21 d0[ 	]+mov[ 	]+eax,db2
+ *[0-9a-f]+:	0f 21 d0[ 	]+mov[ 	]+eax,dr2
  *[0-9a-f]+:	0f 22 d0[ 	]+mov[ 	]+cr2,eax
- *[0-9a-f]+:	0f 23 d0[ 	]+mov[ 	]+db2,eax
+ *[0-9a-f]+:	0f 23 d0[ 	]+mov[ 	]+dr2,eax
  *[0-9a-f]+:	0f 24 d0[ 	]+mov[ 	]+eax,tr2
  *[0-9a-f]+:	0f 26 d0[ 	]+mov[ 	]+tr2,eax
  *[0-9a-f]+:	0f 30[ 	]+wrmsr[ 	]*
--- a/opcodes/i386-dis.c
+++ b/opcodes/i386-dis.c
@@ -12787,7 +12787,7 @@  OP_D (int dummy ATTRIBUTE_UNUSED, int si
   else
     add = 0;
   if (intel_syntax)
-    sprintf (scratchbuf, "db%d", modrm.reg + add);
+    sprintf (scratchbuf, "dr%d", modrm.reg + add);
   else
     sprintf (scratchbuf, "%%db%d", modrm.reg + add);
   oappend (scratchbuf);