[v3,4/7] amd64_analyze_prologue: invert a condition for readability

Message ID 20200624012857.31849-5-vcollod@nvidia.com
State New
Headers show
Series
  • Improve intel IBT support
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Commit Message

Aktemur, Tankut Baris via Gdb-patches June 24, 2020, 1:28 a.m.
You can use git diff --ignore-space-at-eol -b -w --ignore-blank-lines
to make the patch clearer.

2020-06-23  Victor Collod  <vcollod@nvidia.com>

	* amd64-tdep.c (amd64_analyze_prologue): Invert a condition for readability.
---
 gdb/amd64-tdep.c | 57 ++++++++++++++++++++++++------------------------
 1 file changed, 28 insertions(+), 29 deletions(-)

-- 
2.20.1

Patch

diff --git a/gdb/amd64-tdep.c b/gdb/amd64-tdep.c
index c1a9b553e20..17b02706e54 100644
--- a/gdb/amd64-tdep.c
+++ b/gdb/amd64-tdep.c
@@ -2407,44 +2407,43 @@  amd64_analyze_prologue (struct gdbarch *gdbarch,
       read_code (pc, buf, 1);
     }
 
-  if (buf[0] == 0x55)           /* pushq %rbp */
-    {
-      /* Take into account that we've executed the `pushq %rbp' that
-         starts this instruction sequence.  */
-      cache->saved_regs[AMD64_RBP_REGNUM] = 0;
-      cache->sp_offset += 8;
+  /* Stop right now if there's no `pushq %rbp'.  */
+  if (buf[0] != 0x55)
+    return pc;
 
-      /* If we went past the allowed bound, stop.  */
-      if (pc + 1 >= current_pc)
-        return current_pc;
+  /* Take into account that we've executed the `pushq %rbp' that
+     starts this instruction sequence.  */
+  cache->saved_regs[AMD64_RBP_REGNUM] = 0;
+  cache->sp_offset += 8;
+
+  /* If we went past the allowed bound, stop.  */
+  if (pc + 1 >= current_pc)
+    return current_pc;
+
+  read_code (pc + 1, buf, 3);
 
-      read_code (pc + 1, buf, 3);
+  /* Check for `movq %rsp, %rbp'.  */
+  if (memcmp (buf, mov_rsp_rbp_1, 3) == 0
+      || memcmp (buf, mov_rsp_rbp_2, 3) == 0)
+    {
+      /* OK, we actually have a frame.  */
+      cache->frameless_p = 0;
+      return pc + 4;
+    }
 
-      /* Check for `movq %rsp, %rbp'.  */
-      if (memcmp (buf, mov_rsp_rbp_1, 3) == 0
-	  || memcmp (buf, mov_rsp_rbp_2, 3) == 0)
+  /* For X32, also check for `movq %esp, %ebp'.  */
+  if (gdbarch_ptr_bit (gdbarch) == 32)
+    {
+      if (memcmp (buf, mov_esp_ebp_1, 2) == 0
+	  || memcmp (buf, mov_esp_ebp_2, 2) == 0)
 	{
 	  /* OK, we actually have a frame.  */
 	  cache->frameless_p = 0;
-	  return pc + 4;
-	}
-
-      /* For X32, also check for `movq %esp, %ebp'.  */
-      if (gdbarch_ptr_bit (gdbarch) == 32)
-	{
-	  if (memcmp (buf, mov_esp_ebp_1, 2) == 0
-	      || memcmp (buf, mov_esp_ebp_2, 2) == 0)
-	    {
-	      /* OK, we actually have a frame.  */
-	      cache->frameless_p = 0;
-	      return pc + 3;
-	    }
+	  return pc + 3;
 	}
-
-      return pc + 1;
     }
 
-  return pc;
+  return pc + 1;
 }
 
 /* Work around false termination of prologue - GCC PR debug/48827.