Message ID | 20200624012857.31849-7-vcollod@nvidia.com |
---|---|
State | New |
Headers | show |
Series |
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Related | show |
On 2020-06-23 9:28 p.m., Victor Collod via Gdb-patches wrote: > The width of the instruction didn't match the size of its operands. > > 2020-06-23 Victor Collod <vcollod@nvidia.com> > > * amd64-tdep.c (amd64_analyze_prologue): Fix incorrect comment. > --- > gdb/amd64-tdep.c | 2 +- > 1 file changed, 1 insertion(+), 1 deletion(-) > > diff --git a/gdb/amd64-tdep.c b/gdb/amd64-tdep.c > index 5c3ad505784..901733cf443 100644 > --- a/gdb/amd64-tdep.c > +++ b/gdb/amd64-tdep.c > @@ -2434,7 +2434,7 @@ amd64_analyze_prologue (struct gdbarch *gdbarch, > return pc; > } > > - /* For X32, also check for `movq %esp, %ebp'. */ > + /* For X32, also check for `movl %esp, %ebp'. */ > if (gdbarch_ptr_bit (gdbarch) == 32) > { > if (memcmp (buf, mov_esp_ebp_1, 2) == 0 > -- > 2.20.1 > Thanks, I pushed this fix right away since it's obvious. Simon
diff --git a/gdb/amd64-tdep.c b/gdb/amd64-tdep.c index 5c3ad505784..901733cf443 100644 --- a/gdb/amd64-tdep.c +++ b/gdb/amd64-tdep.c @@ -2434,7 +2434,7 @@ amd64_analyze_prologue (struct gdbarch *gdbarch, return pc; } - /* For X32, also check for `movq %esp, %ebp'. */ + /* For X32, also check for `movl %esp, %ebp'. */ if (gdbarch_ptr_bit (gdbarch) == 32) { if (memcmp (buf, mov_esp_ebp_1, 2) == 0