arm: Fix the failing mve scalar shift execution tests.

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State New
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Series
  • arm: Fix the failing mve scalar shift execution tests.
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Commit Message

Srinath Parvathaneni June 18, 2020, 1:28 p.m.
Hello,

In GCC testsuite the MVE scalar shift execution tests (mve_scalar_shifts[1-4].c) are failings
because of executing them on target hardware which doesn't support MVE instructions. This patch
restricts those tests to execute only on target hardware that support MVE instructions.

Regression tested on arm-none-eabi and found no regressions.

Ok for master? Ok for GCC-10 branch?

Thanks,
Srinath.

2020-06-18  Srinath Parvathaneni  <srinath.parvathaneni@arm.com>

gcc/
	* doc/sourcebuild.texi (arm_v8_1m_mve_fp_ok): Add item.
	(arm_mve_hw): Likewise.

gcc/testsuite/
	* gcc.target/arm/mve/mve.exp (check_effective_target_arm_mve_hw): Check
	availability of hardware supporting MVE instructions.
	* lib/target-supports.exp (check_effective_target_arm_mve_hw): Define.


###############     Attachment also inlined for ease of reply    ###############
diff --git a/gcc/doc/sourcebuild.texi b/gcc/doc/sourcebuild.texi
index e5554c4666eb217844598352ced5a9597652f07c..a12af822443ad41afba816ed640d80d182859239 100644
--- a/gcc/doc/sourcebuild.texi
+++ b/gcc/doc/sourcebuild.texi
@@ -1925,6 +1925,15 @@ ARM target supports options to generate instructions from ARMv8.1-M with
 the M-Profile Vector Extension (MVE). Some multilibs may be incompatible
 with these options.
 
+@item arm_v8_1m_mve_fp_ok
+ARM target supports options to generate instructions from ARMv8.1-M with
+the Half-precision floating-point instructions (HP), Floating-point Extension
+(FP) along with M-Profile Vector Extension (MVE). Some multilibs may be
+incompatible with these options.
+
+@item arm_mve_hw
+Test system supports executing MVE instructions.
+
 @item arm_v8m_main_cde
 ARM target supports options to generate instructions from ARMv8-M with
 the Custom Datapath Extension (CDE). Some multilibs may be incompatible
diff --git a/gcc/testsuite/gcc.target/arm/mve/mve.exp b/gcc/testsuite/gcc.target/arm/mve/mve.exp
index e84cb068940e2cb4ed7bbdd51b14d52cec3e323f..aaa3b78b2a9400070d0ca33cb0e98bd0fad7d408 100644
--- a/gcc/testsuite/gcc.target/arm/mve/mve.exp
+++ b/gcc/testsuite/gcc.target/arm/mve/mve.exp
@@ -24,6 +24,11 @@ if ![istarget arm*-*-*] then {
 # Load support procs.
 load_lib gcc-dg.exp
 
+# Exit immediately if the target does not support MVE instructions.
+if ![check_effective_target_arm_mve_hw] then {
+    return
+}
+
 # If a testcase doesn't have special options, use these.
 global DEFAULT_CFLAGS
 if ![info exists DEFAULT_CFLAGS] then {
diff --git a/gcc/testsuite/lib/target-supports.exp b/gcc/testsuite/lib/target-supports.exp
index 862a0735b49582f7f35a9a4009f5752cf8f7e3ba..ab0ee32fc911622b4716c272df4e656698b81a70 100644
--- a/gcc/testsuite/lib/target-supports.exp
+++ b/gcc/testsuite/lib/target-supports.exp
@@ -4671,6 +4671,24 @@ proc check_effective_target_arm_cmse_ok {} {
     } "-mcmse"];
 }
 
+# Return 1 if the target supports executing MVE instructions, 0
+# otherwise.
+
+proc check_effective_target_arm_mve_hw {} {
+    return [check_runtime arm_mve_hw_available {
+	int
+	main (void)
+	{
+	  long long a = 16;
+	  int b = 3;
+	  asm ("sqrshrl %Q1, %R1, #64, %2"
+	       : "=l" (a)
+	       : "0" (a), "r" (b));
+	  return (a != 2);
+	}
+    } ""]
+}
+
 # Return 1 if this is an ARM target where ARMv8-M Security Extensions with
 # clearing instructions (clrm, vscclrm, vstr/vldr with FPCXT) is available.

Comments

luoxhu via Gcc-patches June 18, 2020, 1:38 p.m. | #1
Hi,


On Thu, 18 Jun 2020 at 15:30, Srinath Parvathaneni
<srinath.parvathaneni@arm.com> wrote:
>

> Hello,

>

> In GCC testsuite the MVE scalar shift execution tests (mve_scalar_shifts[1-4].c) are failings

> because of executing them on target hardware which doesn't support MVE instructions. This patch

> restricts those tests to execute only on target hardware that support MVE instructions.

>

> Regression tested on arm-none-eabi and found no regressions.

>

> Ok for master? Ok for GCC-10 branch?

>

> Thanks,

> Srinath.

>

> 2020-06-18  Srinath Parvathaneni  <srinath.parvathaneni@arm.com>

>

> gcc/

>         * doc/sourcebuild.texi (arm_v8_1m_mve_fp_ok): Add item.

>         (arm_mve_hw): Likewise.

>

> gcc/testsuite/

>         * gcc.target/arm/mve/mve.exp (check_effective_target_arm_mve_hw): Check

>         availability of hardware supporting MVE instructions.

>         * lib/target-supports.exp (check_effective_target_arm_mve_hw): Define.

>

>

> ###############     Attachment also inlined for ease of reply    ###############

>

>

> diff --git a/gcc/doc/sourcebuild.texi b/gcc/doc/sourcebuild.texi

> index e5554c4666eb217844598352ced5a9597652f07c..a12af822443ad41afba816ed640d80d182859239 100644

> --- a/gcc/doc/sourcebuild.texi

> +++ b/gcc/doc/sourcebuild.texi

> @@ -1925,6 +1925,15 @@ ARM target supports options to generate instructions from ARMv8.1-M with

>  the M-Profile Vector Extension (MVE). Some multilibs may be incompatible

>  with these options.

>

> +@item arm_v8_1m_mve_fp_ok

> +ARM target supports options to generate instructions from ARMv8.1-M with

> +the Half-precision floating-point instructions (HP), Floating-point Extension

> +(FP) along with M-Profile Vector Extension (MVE). Some multilibs may be

> +incompatible with these options.

> +

> +@item arm_mve_hw

> +Test system supports executing MVE instructions.

> +

>  @item arm_v8m_main_cde

>  ARM target supports options to generate instructions from ARMv8-M with

>  the Custom Datapath Extension (CDE). Some multilibs may be incompatible

> diff --git a/gcc/testsuite/gcc.target/arm/mve/mve.exp b/gcc/testsuite/gcc.target/arm/mve/mve.exp

> index e84cb068940e2cb4ed7bbdd51b14d52cec3e323f..aaa3b78b2a9400070d0ca33cb0e98bd0fad7d408 100644

> --- a/gcc/testsuite/gcc.target/arm/mve/mve.exp

> +++ b/gcc/testsuite/gcc.target/arm/mve/mve.exp

> @@ -24,6 +24,11 @@ if ![istarget arm*-*-*] then {

>  # Load support procs.

>  load_lib gcc-dg.exp

>

> +# Exit immediately if the target does not support MVE instructions.

> +if ![check_effective_target_arm_mve_hw] then {

> +    return

> +}


So you are going to skip all tests, not only the ones with "dg-do run", right?

Don't you want to add this effective target test to the offending tests only?

Thanks,

Christophe

> +

>  # If a testcase doesn't have special options, use these.

>  global DEFAULT_CFLAGS

>  if ![info exists DEFAULT_CFLAGS] then {

> diff --git a/gcc/testsuite/lib/target-supports.exp b/gcc/testsuite/lib/target-supports.exp

> index 862a0735b49582f7f35a9a4009f5752cf8f7e3ba..ab0ee32fc911622b4716c272df4e656698b81a70 100644

> --- a/gcc/testsuite/lib/target-supports.exp

> +++ b/gcc/testsuite/lib/target-supports.exp

> @@ -4671,6 +4671,24 @@ proc check_effective_target_arm_cmse_ok {} {

>      } "-mcmse"];

>  }

>

> +# Return 1 if the target supports executing MVE instructions, 0

> +# otherwise.

> +

> +proc check_effective_target_arm_mve_hw {} {

> +    return [check_runtime arm_mve_hw_available {

> +       int

> +       main (void)

> +       {

> +         long long a = 16;

> +         int b = 3;

> +         asm ("sqrshrl %Q1, %R1, #64, %2"

> +              : "=l" (a)

> +              : "0" (a), "r" (b));

> +         return (a != 2);

> +       }

> +    } ""]

> +}

> +

>  # Return 1 if this is an ARM target where ARMv8-M Security Extensions with

>  # clearing instructions (clrm, vscclrm, vstr/vldr with FPCXT) is available.

>

>
Srinath Parvathaneni June 18, 2020, 2:12 p.m. | #2
Hi,

> -----Original Message-----

> From: Christophe Lyon <christophe.lyon@linaro.org>

> Sent: 18 June 2020 14:38

> To: Srinath Parvathaneni <Srinath.Parvathaneni@arm.com>

> Cc: gcc Patches <gcc-patches@gcc.gnu.org>

> Subject: Re: [PATCH][GCC] arm: Fix the failing mve scalar shift execution tests.

> 

> Hi,

> 

> 

> On Thu, 18 Jun 2020 at 15:30, Srinath Parvathaneni

> <srinath.parvathaneni@arm.com> wrote:

> >

> > Hello,

> >

> > In GCC testsuite the MVE scalar shift execution tests

> > (mve_scalar_shifts[1-4].c) are failings because of executing them on

> > target hardware which doesn't support MVE instructions. This patch

> restricts those tests to execute only on target hardware that support MVE

> instructions.

> >

> > Regression tested on arm-none-eabi and found no regressions.

> >

> > Ok for master? Ok for GCC-10 branch?

> >

> > Thanks,

> > Srinath.

> >

> > 2020-06-18  Srinath Parvathaneni  <srinath.parvathaneni@arm.com>

> >

> > gcc/

> >         * doc/sourcebuild.texi (arm_v8_1m_mve_fp_ok): Add item.

> >         (arm_mve_hw): Likewise.

> >

> > gcc/testsuite/

> >         * gcc.target/arm/mve/mve.exp (check_effective_target_arm_mve_hw):

> Check

> >         availability of hardware supporting MVE instructions.

> >         * lib/target-supports.exp (check_effective_target_arm_mve_hw):

> Define.

> >

> >

> > ###############     Attachment also inlined for ease of reply

> ###############

> >

> >

> > diff --git a/gcc/doc/sourcebuild.texi b/gcc/doc/sourcebuild.texi index

> >

> e5554c4666eb217844598352ced5a9597652f07c..a12af822443ad41afba816ed

> 640d

> > 80d182859239 100644

> > --- a/gcc/doc/sourcebuild.texi

> > +++ b/gcc/doc/sourcebuild.texi

> > @@ -1925,6 +1925,15 @@ ARM target supports options to generate

> > instructions from ARMv8.1-M with  the M-Profile Vector Extension

> > (MVE). Some multilibs may be incompatible  with these options.

> >

> > +@item arm_v8_1m_mve_fp_ok

> > +ARM target supports options to generate instructions from ARMv8.1-M

> > +with the Half-precision floating-point instructions (HP),

> > +Floating-point Extension

> > +(FP) along with M-Profile Vector Extension (MVE). Some multilibs may

> > +be incompatible with these options.

> > +

> > +@item arm_mve_hw

> > +Test system supports executing MVE instructions.

> > +

> >  @item arm_v8m_main_cde

> >  ARM target supports options to generate instructions from ARMv8-M

> > with  the Custom Datapath Extension (CDE). Some multilibs may be

> > incompatible diff --git a/gcc/testsuite/gcc.target/arm/mve/mve.exp

> > b/gcc/testsuite/gcc.target/arm/mve/mve.exp

> > index

> >

> e84cb068940e2cb4ed7bbdd51b14d52cec3e323f..aaa3b78b2a9400070d0ca33

> cb0e9

> > 8bd0fad7d408 100644

> > --- a/gcc/testsuite/gcc.target/arm/mve/mve.exp

> > +++ b/gcc/testsuite/gcc.target/arm/mve/mve.exp

> > @@ -24,6 +24,11 @@ if ![istarget arm*-*-*] then {  # Load support

> > procs.

> >  load_lib gcc-dg.exp

> >

> > +# Exit immediately if the target does not support MVE instructions.

> > +if ![check_effective_target_arm_mve_hw] then {

> > +    return

> > +}

> 

> So you are going to skip all tests, not only the ones with "dg-do run", right?


No, that was a mistake, I wanted to skip only the tests with "dg-do run".
> Don't you want to add this effective target test to the offending tests only?


Done it now and attached updated cover letter and patch in this e-mail.
Thanks for pointing this out.
> 

> Thanks,

> 

> Christophe

> 

> > +

> >  # If a testcase doesn't have special options, use these.

> >  global DEFAULT_CFLAGS

> >  if ![info exists DEFAULT_CFLAGS] then { diff --git

> > a/gcc/testsuite/lib/target-supports.exp

> > b/gcc/testsuite/lib/target-supports.exp

> > index

> >

> 862a0735b49582f7f35a9a4009f5752cf8f7e3ba..ab0ee32fc911622b4716c272d

> f4e

> > 656698b81a70 100644

> > --- a/gcc/testsuite/lib/target-supports.exp

> > +++ b/gcc/testsuite/lib/target-supports.exp

> > @@ -4671,6 +4671,24 @@ proc check_effective_target_arm_cmse_ok {} {

> >      } "-mcmse"];

> >  }

> >

> > +# Return 1 if the target supports executing MVE instructions, 0 #

> > +otherwise.

> > +

> > +proc check_effective_target_arm_mve_hw {} {

> > +    return [check_runtime arm_mve_hw_available {

> > +       int

> > +       main (void)

> > +       {

> > +         long long a = 16;

> > +         int b = 3;

> > +         asm ("sqrshrl %Q1, %R1, #64, %2"

> > +              : "=l" (a)

> > +              : "0" (a), "r" (b));

> > +         return (a != 2);

> > +       }

> > +    } ""]

> > +}

> > +

> >  # Return 1 if this is an ARM target where ARMv8-M Security Extensions

> > with  # clearing instructions (clrm, vscclrm, vstr/vldr with FPCXT) is available.

> >

> >
Hello,

In GCC testsuite the MVE scalar shift execution tests (mve_scalar_shifts[1-4].c) are failings
because of executing them on target hardware which doesn't support MVE instructions. This patch
restricts those tests to execute only on target hardware that support MVE instructions.

Regression tested on arm-none-eabi and found no regressions.

Ok for master? Ok for GCC-10 branch?

Thanks,
Srinath.

2020-06-18  Srinath Parvathaneni  <srinath.parvathaneni@arm.com>

gcc/
	* doc/sourcebuild.texi (arm_v8_1m_mve_fp_ok): Add item.
	(arm_mve_hw): Likewise.

gcc/testsuite/
	* gcc.target/arm/mve/intrinsics/mve_scalar_shifts1.c: Modify.
	* gcc.target/arm/mve/intrinsics/mve_scalar_shifts2.c: Likewise.
	* gcc.target/arm/mve/intrinsics/mve_scalar_shifts3.c: Likewise.
	* gcc.target/arm/mve/intrinsics/mve_scalar_shifts4.c: Likewise.
	* lib/target-supports.exp (check_effective_target_arm_mve_hw): Define.
Kyrylo Tkachov June 22, 2020, 4:08 p.m. | #3
> -----Original Message-----

> From: Srinath Parvathaneni <Srinath.Parvathaneni@arm.com>

> Sent: 18 June 2020 14:29

> To: gcc-patches@gcc.gnu.org

> Cc: Kyrylo Tkachov <Kyrylo.Tkachov@arm.com>

> Subject: [PATCH][GCC] arm: Fix the failing mve scalar shift execution tests.

> 

> Hello,

> 

> In GCC testsuite the MVE scalar shift execution tests (mve_scalar_shifts[1-4].c)

> are failings

> because of executing them on target hardware which doesn't support MVE

> instructions. This patch

> restricts those tests to execute only on target hardware that support MVE

> instructions.

> 

> Regression tested on arm-none-eabi and found no regressions.

> 

> Ok for master? Ok for GCC-10 branch?

> 


Ok.
Thanks,
Kyrill

> Thanks,

> Srinath.

> 

> 2020-06-18  Srinath Parvathaneni  <srinath.parvathaneni@arm.com>

> 

> gcc/

> 	* doc/sourcebuild.texi (arm_v8_1m_mve_fp_ok): Add item.

> 	(arm_mve_hw): Likewise.

> 

> gcc/testsuite/

> 	* gcc.target/arm/mve/mve.exp

> (check_effective_target_arm_mve_hw): Check

> 	availability of hardware supporting MVE instructions.

> 	* lib/target-supports.exp (check_effective_target_arm_mve_hw):

> Define.

> 

> 

> ###############     Attachment also inlined for ease of reply

> ###############

> 

> 

> diff --git a/gcc/doc/sourcebuild.texi b/gcc/doc/sourcebuild.texi

> index

> e5554c4666eb217844598352ced5a9597652f07c..a12af822443ad41afba816ed

> 640d80d182859239 100644

> --- a/gcc/doc/sourcebuild.texi

> +++ b/gcc/doc/sourcebuild.texi

> @@ -1925,6 +1925,15 @@ ARM target supports options to generate

> instructions from ARMv8.1-M with

>  the M-Profile Vector Extension (MVE). Some multilibs may be incompatible

>  with these options.

> 

> +@item arm_v8_1m_mve_fp_ok

> +ARM target supports options to generate instructions from ARMv8.1-M with

> +the Half-precision floating-point instructions (HP), Floating-point Extension

> +(FP) along with M-Profile Vector Extension (MVE). Some multilibs may be

> +incompatible with these options.

> +

> +@item arm_mve_hw

> +Test system supports executing MVE instructions.

> +

>  @item arm_v8m_main_cde

>  ARM target supports options to generate instructions from ARMv8-M with

>  the Custom Datapath Extension (CDE). Some multilibs may be incompatible

> diff --git a/gcc/testsuite/gcc.target/arm/mve/mve.exp

> b/gcc/testsuite/gcc.target/arm/mve/mve.exp

> index

> e84cb068940e2cb4ed7bbdd51b14d52cec3e323f..aaa3b78b2a9400070d0ca33

> cb0e98bd0fad7d408 100644

> --- a/gcc/testsuite/gcc.target/arm/mve/mve.exp

> +++ b/gcc/testsuite/gcc.target/arm/mve/mve.exp

> @@ -24,6 +24,11 @@ if ![istarget arm*-*-*] then {

>  # Load support procs.

>  load_lib gcc-dg.exp

> 

> +# Exit immediately if the target does not support MVE instructions.

> +if ![check_effective_target_arm_mve_hw] then {

> +    return

> +}

> +

>  # If a testcase doesn't have special options, use these.

>  global DEFAULT_CFLAGS

>  if ![info exists DEFAULT_CFLAGS] then {

> diff --git a/gcc/testsuite/lib/target-supports.exp b/gcc/testsuite/lib/target-

> supports.exp

> index

> 862a0735b49582f7f35a9a4009f5752cf8f7e3ba..ab0ee32fc911622b4716c272d

> f4e656698b81a70 100644

> --- a/gcc/testsuite/lib/target-supports.exp

> +++ b/gcc/testsuite/lib/target-supports.exp

> @@ -4671,6 +4671,24 @@ proc check_effective_target_arm_cmse_ok {} {

>      } "-mcmse"];

>  }

> 

> +# Return 1 if the target supports executing MVE instructions, 0

> +# otherwise.

> +

> +proc check_effective_target_arm_mve_hw {} {

> +    return [check_runtime arm_mve_hw_available {

> +	int

> +	main (void)

> +	{

> +	  long long a = 16;

> +	  int b = 3;

> +	  asm ("sqrshrl %Q1, %R1, #64, %2"

> +	       : "=l" (a)

> +	       : "0" (a), "r" (b));

> +	  return (a != 2);

> +	}

> +    } ""]

> +}

> +

>  # Return 1 if this is an ARM target where ARMv8-M Security Extensions with

>  # clearing instructions (clrm, vscclrm, vstr/vldr with FPCXT) is available.

>

Patch

diff --git a/gcc/doc/sourcebuild.texi b/gcc/doc/sourcebuild.texi
index e5554c4666eb217844598352ced5a9597652f07c..a12af822443ad41afba816ed640d80d182859239 100644
--- a/gcc/doc/sourcebuild.texi
+++ b/gcc/doc/sourcebuild.texi
@@ -1925,6 +1925,15 @@  ARM target supports options to generate instructions from ARMv8.1-M with
 the M-Profile Vector Extension (MVE). Some multilibs may be incompatible
 with these options.
 
+@item arm_v8_1m_mve_fp_ok
+ARM target supports options to generate instructions from ARMv8.1-M with
+the Half-precision floating-point instructions (HP), Floating-point Extension
+(FP) along with M-Profile Vector Extension (MVE). Some multilibs may be
+incompatible with these options.
+
+@item arm_mve_hw
+Test system supports executing MVE instructions.
+
 @item arm_v8m_main_cde
 ARM target supports options to generate instructions from ARMv8-M with
 the Custom Datapath Extension (CDE). Some multilibs may be incompatible
diff --git a/gcc/testsuite/gcc.target/arm/mve/mve.exp b/gcc/testsuite/gcc.target/arm/mve/mve.exp
index e84cb068940e2cb4ed7bbdd51b14d52cec3e323f..aaa3b78b2a9400070d0ca33cb0e98bd0fad7d408 100644
--- a/gcc/testsuite/gcc.target/arm/mve/mve.exp
+++ b/gcc/testsuite/gcc.target/arm/mve/mve.exp
@@ -24,6 +24,11 @@  if ![istarget arm*-*-*] then {
 # Load support procs.
 load_lib gcc-dg.exp
 
+# Exit immediately if the target does not support MVE instructions.
+if ![check_effective_target_arm_mve_hw] then {
+    return
+}
+
 # If a testcase doesn't have special options, use these.
 global DEFAULT_CFLAGS
 if ![info exists DEFAULT_CFLAGS] then {
diff --git a/gcc/testsuite/lib/target-supports.exp b/gcc/testsuite/lib/target-supports.exp
index 862a0735b49582f7f35a9a4009f5752cf8f7e3ba..ab0ee32fc911622b4716c272df4e656698b81a70 100644
--- a/gcc/testsuite/lib/target-supports.exp
+++ b/gcc/testsuite/lib/target-supports.exp
@@ -4671,6 +4671,24 @@  proc check_effective_target_arm_cmse_ok {} {
     } "-mcmse"];
 }
 
+# Return 1 if the target supports executing MVE instructions, 0
+# otherwise.
+
+proc check_effective_target_arm_mve_hw {} {
+    return [check_runtime arm_mve_hw_available {
+	int
+	main (void)
+	{
+	  long long a = 16;
+	  int b = 3;
+	  asm ("sqrshrl %Q1, %R1, #64, %2"
+	       : "=l" (a)
+	       : "0" (a), "r" (b));
+	  return (a != 2);
+	}
+    } ""]
+}
+
 # Return 1 if this is an ARM target where ARMv8-M Security Extensions with
 # clearing instructions (clrm, vscclrm, vstr/vldr with FPCXT) is available.