Power10 VSX scalar min-max-compare quad precision operations

Message ID 20200511113645.GJ27573@bubble.grove.modra.org
State New
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Series
  • Power10 VSX scalar min-max-compare quad precision operations
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Commit Message

opcodes/
	* ppc-opc (powerpc_opcodes): Add xscmpeqqp, xscmpgeqp, xscmpgtqp,
	xsmaxcqp, xsmincqp.
gas/
	* testsuite/gas/ppc/scalarquad.d,
	* testsuite/gas/ppc/scalarquad.s: New test.
	* testsuite/gas/ppc/ppc.exp: Run it.


-- 
Alan Modra
Australia Development Lab, IBM

Patch

diff --git a/gas/testsuite/gas/ppc/ppc.exp b/gas/testsuite/gas/ppc/ppc.exp
index a895edb72c..48c4ce62f3 100644
--- a/gas/testsuite/gas/ppc/ppc.exp
+++ b/gas/testsuite/gas/ppc/ppc.exp
@@ -145,3 +145,4 @@  run_dump_test "set_bool"
 run_dump_test "stringop"
 run_dump_test "xvtlsbb"
 run_dump_test "rightmost"
+run_dump_test "scalarquad"
diff --git a/gas/testsuite/gas/ppc/scalarquad.d b/gas/testsuite/gas/ppc/scalarquad.d
new file mode 100644
index 0000000000..e33057a16c
--- /dev/null
+++ b/gas/testsuite/gas/ppc/scalarquad.d
@@ -0,0 +1,15 @@ 
+#as: -mpower10
+#objdump: -dr -Mpower10
+#name: scalar min/max/compare quad precision
+
+.*
+
+
+Disassembly of section \.text:
+
+0+0 <_start>:
+.*:	(fc 01 10 88|88 10 01 fc) 	xscmpeqqp v0,v1,v2
+.*:	(fc 64 29 88|88 29 64 fc) 	xscmpgeqp v3,v4,v5
+.*:	(fc c7 41 c8|c8 41 c7 fc) 	xscmpgtqp v6,v7,v8
+.*:	(fd 2a 5d 48|48 5d 2a fd) 	xsmaxcqp v9,v10,v11
+.*:	(fd 8d 75 c8|c8 75 8d fd) 	xsmincqp v12,v13,v14
diff --git a/gas/testsuite/gas/ppc/scalarquad.s b/gas/testsuite/gas/ppc/scalarquad.s
new file mode 100644
index 0000000000..dc42b822b4
--- /dev/null
+++ b/gas/testsuite/gas/ppc/scalarquad.s
@@ -0,0 +1,7 @@ 
+	.text
+_start:
+	xscmpeqqp 0,1,2
+	xscmpgeqp 3,4,5
+	xscmpgtqp 6,7,8
+	xsmaxcqp 9,10,11
+	xsmincqp 12,13,14
diff --git a/opcodes/ppc-opc.c b/opcodes/ppc-opc.c
index 9c0dd7b876..ed0a668ad6 100644
--- a/opcodes/ppc-opc.c
+++ b/opcodes/ppc-opc.c
@@ -8251,6 +8251,8 @@  const struct powerpc_opcode powerpc_opcodes[] = {
 {"dquaiq",	ZRC(63,67,0), Z2_MASK|Q_MASK, POWER6,	PPCVLE,		{TE, FRTp, FRBp, RMC}},
 {"dquaiq.",	ZRC(63,67,1), Z2_MASK|Q_MASK, POWER6,	PPCVLE,		{TE, FRTp, FRBp, RMC}},
 
+{"xscmpeqqp",	X(63,68),	X_MASK,	     POWER10,	PPCVLE,		{VD, VA, VB}},
+
 {"mtfsb0",	XRC(63,70,0),	XRARB_MASK,  COM,	PPCVLE,		{BTF}},
 {"mtfsb0.",	XRC(63,70,1),	XRARB_MASK,  COM,	PPCVLE,		{BTF}},
 
@@ -8291,11 +8293,16 @@  const struct powerpc_opcode powerpc_opcodes[] = {
 {"xscmpexpqp",	X(63,164),	XBF_MASK,    PPCVSX3,	PPCVLE,		{BF, VA, VB}},
 
 {"dtstdcq",	Z(63,194),	Z_MASK,	     POWER6,	PPCVLE,		{BF, FRAp, DCM}},
+
+{"xscmpgeqp",	X(63,196),	X_MASK,	     POWER10,	PPCVLE,		{VD, VA, VB}},
+
 {"dtstdgq",	Z(63,226),	Z_MASK,	     POWER6,	PPCVLE,		{BF, FRAp, DGM}},
 
 {"drintnq",	ZRC(63,227,0), Z2_MASK|Q_MASK, POWER6,	PPCVLE,		{R, FRTp, FRBp, RMC}},
 {"drintnq.",	ZRC(63,227,1), Z2_MASK|Q_MASK, POWER6,	PPCVLE,		{R, FRTp, FRBp, RMC}},
 
+{"xscmpgtqp",	X(63,228),	X_MASK,	     POWER10,	PPCVLE,		{VD, VA, VB}},
+
 {"dctqpq",	XRC(63,258,0), X_MASK|Q_MASK, POWER6,	PPCVLE,		{FRTp, FRB}},
 {"dctqpq.",	XRC(63,258,1), X_MASK|Q_MASK, POWER6,	PPCVLE,		{FRTp, FRB}},
 
@@ -8364,6 +8371,8 @@  const struct powerpc_opcode powerpc_opcodes[] = {
 {"dtstsfq",	X(63,674),	X_MASK,	     POWER6,	PPCVLE,		{BF, FRA, FRBp}},
 {"dtstsfiq",	X(63,675),	X_MASK|1<<22,POWER9,	PPCVLE,		{BF, UIM6, FRBp}},
 
+{"xsmaxcqp",	X(63,676),	X_MASK,	     POWER10,	PPCVLE,		{VD, VA, VB}},
+
 {"xststdcqp",	X(63,708),	X_MASK,	     PPCVSX3,	PPCVLE,		{BF, VB, DCMX}},
 
 {"mtfsf",	XFL(63,711,0),	XFL_MASK, POWER6|PPCA2|PPC476, PPCVLE,	{FLM, FRB, XFL_L, W}},
@@ -8371,6 +8380,8 @@  const struct powerpc_opcode powerpc_opcodes[] = {
 {"mtfsf.",	XFL(63,711,1),	XFL_MASK, POWER6|PPCA2|PPC476, PPCVLE,	{FLM, FRB, XFL_L, W}},
 {"mtfsf.",	XFL(63,711,1),	XFL_MASK,    COM, POWER6|PPCA2|PPC476|PPCEFS|PPCVLE, {FLM, FRB}},
 
+{"xsmincqp",	X(63,740),	X_MASK,	     POWER10,	PPCVLE,		{VD, VA, VB}},
+
 {"drdpq",	XRC(63,770,0), X_MASK|Q_MASK, POWER6,	PPCVLE,		{FRTp, FRBp}},
 {"drdpq.",	XRC(63,770,1), X_MASK|Q_MASK, POWER6,	PPCVLE,		{FRTp, FRBp}},