[ARM] : Add MVE ACLE intrinsics vbicq_n_* polymorphic variant support.

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  • [ARM] : Add MVE ACLE intrinsics vbicq_n_* polymorphic variant support.
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Commit Message

Srinath Parvathaneni March 31, 2020, 9:19 a.m.
Hello,

For the following MVE ACLE intrinsics, polymorphic variant support is missing on the trunk.

vbicq_n_s16, vbicq_n_s32, vbicq_n_u16 and vbicq_n_u32.

This patch add the polymorphic variant support for above intrinsics.

Please refer to M-profile Vector Extension (MVE) intrinsics [1]  for more details.
[1] https://developer.arm.com/architectures/instruction-sets/simd-isas/helium/mve-intrinsics

Regression tested on arm-none-eabi and found no regressions.

Ok for trunk?

Thanks,
Srinath.

gcc/ChangeLog:

2020-03-30  Srinath Parvathaneni  <srinath.parvathaneni@arm.com>

        * config/arm/arm_mve.h (vbicq): Define MVE intrinsic polymorphic
	variant.
	(__arm_vbicq): Likewise.

2020-03-30  Srinath Parvathaneni  <srinath.parvathaneni@arm.com>

	* gcc.target/arm/mve/intrinsics/vbicq_n_s16.c: Modify.
	* gcc.target/arm/mve/intrinsics/vbicq_n_s32.c: Likewise.
	* gcc.target/arm/mve/intrinsics/vbicq_n_u16.c: Likewise.
	* gcc.target/arm/mve/intrinsics/vbicq_n_u32.c: Likewise.


###############     Attachment also inlined for ease of reply    ###############
diff --git a/gcc/config/arm/arm_mve.h b/gcc/config/arm/arm_mve.h
index 14b6ec857bffd85b67c781f554faffde1b2abc6b..d14ca24068e0bc5e75fa1917718a09a2ec3d9cbe 100644
--- a/gcc/config/arm/arm_mve.h
+++ b/gcc/config/arm/arm_mve.h
@@ -20704,6 +20704,10 @@ extern void *__ARM_undef;
 #define __arm_vbicq(p0,p1) ({ __typeof(p0) __p0 = (p0); \
   __typeof(p1) __p1 = (p1); \
   _Generic( (int (*)[__ARM_mve_typeid(__p0)][__ARM_mve_typeid(__p1)])0, \
+  int (*)[__ARM_mve_type_int16x8_t][__ARM_mve_type_int32_t]: __arm_vbicq_n_s16 (__ARM_mve_coerce(__p0, int16x8_t), __ARM_mve_coerce1(__p1, int)), \
+  int (*)[__ARM_mve_type_int32x4_t][__ARM_mve_type_int32_t]: __arm_vbicq_n_s32 (__ARM_mve_coerce(__p0, int32x4_t), __ARM_mve_coerce1(__p1, int)), \
+  int (*)[__ARM_mve_type_uint16x8_t][__ARM_mve_type_int32_t]: __arm_vbicq_n_u16 (__ARM_mve_coerce(__p0, uint16x8_t), __ARM_mve_coerce1(__p1, int)), \
+  int (*)[__ARM_mve_type_uint32x4_t][__ARM_mve_type_int32_t]: __arm_vbicq_n_u32 (__ARM_mve_coerce(__p0, uint32x4_t), __ARM_mve_coerce1(__p1, int)), \
   int (*)[__ARM_mve_type_int8x16_t][__ARM_mve_type_int8x16_t]: __arm_vbicq_s8 (__ARM_mve_coerce(__p0, int8x16_t), __ARM_mve_coerce(__p1, int8x16_t)), \
   int (*)[__ARM_mve_type_int16x8_t][__ARM_mve_type_int16x8_t]: __arm_vbicq_s16 (__ARM_mve_coerce(__p0, int16x8_t), __ARM_mve_coerce(__p1, int16x8_t)), \
   int (*)[__ARM_mve_type_int32x4_t][__ARM_mve_type_int32x4_t]: __arm_vbicq_s32 (__ARM_mve_coerce(__p0, int32x4_t), __ARM_mve_coerce(__p1, int32x4_t)), \
@@ -24095,6 +24099,10 @@ extern void *__ARM_undef;
 #define __arm_vbicq(p0,p1) ({ __typeof(p0) __p0 = (p0); \
   __typeof(p1) __p1 = (p1); \
   _Generic( (int (*)[__ARM_mve_typeid(__p0)][__ARM_mve_typeid(__p1)])0, \
+  int (*)[__ARM_mve_type_int16x8_t][__ARM_mve_type_int32_t]: __arm_vbicq_n_s16 (__ARM_mve_coerce(__p0, int16x8_t), __ARM_mve_coerce1(__p1, int)), \
+  int (*)[__ARM_mve_type_int32x4_t][__ARM_mve_type_int32_t]: __arm_vbicq_n_s32 (__ARM_mve_coerce(__p0, int32x4_t), __ARM_mve_coerce1(__p1, int)), \
+  int (*)[__ARM_mve_type_uint16x8_t][__ARM_mve_type_int32_t]: __arm_vbicq_n_u16 (__ARM_mve_coerce(__p0, uint16x8_t), __ARM_mve_coerce1(__p1, int)), \
+  int (*)[__ARM_mve_type_uint32x4_t][__ARM_mve_type_int32_t]: __arm_vbicq_n_u32 (__ARM_mve_coerce(__p0, uint32x4_t), __ARM_mve_coerce1(__p1, int)), \
   int (*)[__ARM_mve_type_int8x16_t][__ARM_mve_type_int8x16_t]: __arm_vbicq_s8 (__ARM_mve_coerce(__p0, int8x16_t), __ARM_mve_coerce(__p1, int8x16_t)), \
   int (*)[__ARM_mve_type_int16x8_t][__ARM_mve_type_int16x8_t]: __arm_vbicq_s16 (__ARM_mve_coerce(__p0, int16x8_t), __ARM_mve_coerce(__p1, int16x8_t)), \
   int (*)[__ARM_mve_type_int32x4_t][__ARM_mve_type_int32x4_t]: __arm_vbicq_s32 (__ARM_mve_coerce(__p0, int32x4_t), __ARM_mve_coerce(__p1, int32x4_t)), \
diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vbicq_n_s16.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vbicq_n_s16.c
index 96b9699d6b166954f0d5900abc47c64e18416d0c..ecc48503fc2d2b16c9135c412df22f748874750c 100644
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vbicq_n_s16.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vbicq_n_s16.c
@@ -10,4 +10,10 @@ foo (int16x8_t a)
   return vbicq_n_s16 (a, 1);
 }
 
-/* { dg-final { scan-assembler "vbic.i16"  }  } */
+int16x8_t
+foo1 (int16x8_t a)
+{
+  return vbicq (a, 1);
+}
+
+/* { dg-final { scan-assembler-times "vbic.i16" 2 }  } */
diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vbicq_n_s32.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vbicq_n_s32.c
index b262c835134b932968013b9abedb54c7ab901ae0..013cdf15cfd974ab82379d95e68b5a1bdf8936ca 100644
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vbicq_n_s32.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vbicq_n_s32.c
@@ -10,4 +10,10 @@ foo (int32x4_t a)
   return vbicq_n_s32 (a, 1);
 }
 
-/* { dg-final { scan-assembler "vbic.i32"  }  } */
+int32x4_t
+foo1 (int32x4_t a)
+{
+  return vbicq (a, 1);
+}
+
+/* { dg-final { scan-assembler-times "vbic.i32" 2 }  } */
diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vbicq_n_u16.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vbicq_n_u16.c
index 3691bc64e50d37f31bd5dff21e23091a58bf98de..b24db154ad874dc016590adb5e99be4e97044a42 100644
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vbicq_n_u16.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vbicq_n_u16.c
@@ -10,4 +10,10 @@ foo (uint16x8_t a)
   return vbicq_n_u16 (a, 1);
 }
 
-/* { dg-final { scan-assembler "vbic.i16"  }  } */
+uint16x8_t
+foo1 (uint16x8_t a)
+{
+  return vbicq (a, 1);
+}
+
+/* { dg-final { scan-assembler-times "vbic.i16" 2 }  } */
diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vbicq_n_u32.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vbicq_n_u32.c
index fc976b9aa2ed7827ee3bd380bb58858cbb12c2f1..1261fbb523cfb596c272f114dceb8e8024dbc297 100644
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vbicq_n_u32.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vbicq_n_u32.c
@@ -10,4 +10,10 @@ foo (uint32x4_t a)
   return vbicq_n_u32 (a, 1);
 }
 
-/* { dg-final { scan-assembler "vbic.i32"  }  } */
+uint32x4_t
+foo1 (uint32x4_t a)
+{
+  return vbicq (a, 1);
+}
+
+/* { dg-final { scan-assembler-times "vbic.i32" 2 }  } */

Comments

Kyrylo Tkachov March 31, 2020, 10:09 a.m. | #1
Hi Srinath,

> -----Original Message-----

> From: Srinath Parvathaneni <Srinath.Parvathaneni@arm.com>

> Sent: 31 March 2020 10:19

> To: gcc-patches@gcc.gnu.org

> Cc: Richard Earnshaw <Richard.Earnshaw@arm.com>; Kyrylo Tkachov

> <Kyrylo.Tkachov@arm.com>

> Subject: [GCC][ARM][PATCH]: Add MVE ACLE intrinsics vbicq_n_*

> polymorphic variant support.

> 

> Hello,

> 

> For the following MVE ACLE intrinsics, polymorphic variant support is missing

> on the trunk.

> 

> vbicq_n_s16, vbicq_n_s32, vbicq_n_u16 and vbicq_n_u32.

> 

> This patch add the polymorphic variant support for above intrinsics.

> 

> Please refer to M-profile Vector Extension (MVE) intrinsics [1]  for more

> details.

> [1] https://developer.arm.com/architectures/instruction-sets/simd-

> isas/helium/mve-intrinsics

> 

> Regression tested on arm-none-eabi and found no regressions.

> 

> Ok for trunk?


Thanks, I've pushed this patch to master.
Kyrill

> 

> Thanks,

> Srinath.

> 

> gcc/ChangeLog:

> 

> 2020-03-30  Srinath Parvathaneni  <srinath.parvathaneni@arm.com>

> 

>         * config/arm/arm_mve.h (vbicq): Define MVE intrinsic polymorphic

> 	variant.

> 	(__arm_vbicq): Likewise.

> 

> 2020-03-30  Srinath Parvathaneni  <srinath.parvathaneni@arm.com>

> 

> 	* gcc.target/arm/mve/intrinsics/vbicq_n_s16.c: Modify.

> 	* gcc.target/arm/mve/intrinsics/vbicq_n_s32.c: Likewise.

> 	* gcc.target/arm/mve/intrinsics/vbicq_n_u16.c: Likewise.

> 	* gcc.target/arm/mve/intrinsics/vbicq_n_u32.c: Likewise.

> 

> 

> ###############     Attachment also inlined for ease of reply

> ###############

> 

> 

> diff --git a/gcc/config/arm/arm_mve.h b/gcc/config/arm/arm_mve.h index

> 14b6ec857bffd85b67c781f554faffde1b2abc6b..d14ca24068e0bc5e75fa19177

> 18a09a2ec3d9cbe 100644

> --- a/gcc/config/arm/arm_mve.h

> +++ b/gcc/config/arm/arm_mve.h

> @@ -20704,6 +20704,10 @@ extern void *__ARM_undef;  #define

> __arm_vbicq(p0,p1) ({ __typeof(p0) __p0 = (p0); \

>    __typeof(p1) __p1 = (p1); \

>    _Generic( (int (*)[__ARM_mve_typeid(__p0)][__ARM_mve_typeid(__p1)])0,

> \

> +  int (*)[__ARM_mve_type_int16x8_t][__ARM_mve_type_int32_t]:

> + __arm_vbicq_n_s16 (__ARM_mve_coerce(__p0, int16x8_t),

> + __ARM_mve_coerce1(__p1, int)), \  int

> + (*)[__ARM_mve_type_int32x4_t][__ARM_mve_type_int32_t]:

> + __arm_vbicq_n_s32 (__ARM_mve_coerce(__p0, int32x4_t),

> + __ARM_mve_coerce1(__p1, int)), \  int

> + (*)[__ARM_mve_type_uint16x8_t][__ARM_mve_type_int32_t]:

> + __arm_vbicq_n_u16 (__ARM_mve_coerce(__p0, uint16x8_t),

> + __ARM_mve_coerce1(__p1, int)), \  int

> + (*)[__ARM_mve_type_uint32x4_t][__ARM_mve_type_int32_t]:

> + __arm_vbicq_n_u32 (__ARM_mve_coerce(__p0, uint32x4_t),

> + __ARM_mve_coerce1(__p1, int)), \

>    int (*)[__ARM_mve_type_int8x16_t][__ARM_mve_type_int8x16_t]:

> __arm_vbicq_s8 (__ARM_mve_coerce(__p0, int8x16_t),

> __ARM_mve_coerce(__p1, int8x16_t)), \

>    int (*)[__ARM_mve_type_int16x8_t][__ARM_mve_type_int16x8_t]:

> __arm_vbicq_s16 (__ARM_mve_coerce(__p0, int16x8_t),

> __ARM_mve_coerce(__p1, int16x8_t)), \

>    int (*)[__ARM_mve_type_int32x4_t][__ARM_mve_type_int32x4_t]:

> __arm_vbicq_s32 (__ARM_mve_coerce(__p0, int32x4_t),

> __ARM_mve_coerce(__p1, int32x4_t)), \ @@ -24095,6 +24099,10 @@

> extern void *__ARM_undef;  #define __arm_vbicq(p0,p1) ({ __typeof(p0)

> __p0 = (p0); \

>    __typeof(p1) __p1 = (p1); \

>    _Generic( (int (*)[__ARM_mve_typeid(__p0)][__ARM_mve_typeid(__p1)])0,

> \

> +  int (*)[__ARM_mve_type_int16x8_t][__ARM_mve_type_int32_t]:

> + __arm_vbicq_n_s16 (__ARM_mve_coerce(__p0, int16x8_t),

> + __ARM_mve_coerce1(__p1, int)), \  int

> + (*)[__ARM_mve_type_int32x4_t][__ARM_mve_type_int32_t]:

> + __arm_vbicq_n_s32 (__ARM_mve_coerce(__p0, int32x4_t),

> + __ARM_mve_coerce1(__p1, int)), \  int

> + (*)[__ARM_mve_type_uint16x8_t][__ARM_mve_type_int32_t]:

> + __arm_vbicq_n_u16 (__ARM_mve_coerce(__p0, uint16x8_t),

> + __ARM_mve_coerce1(__p1, int)), \  int

> + (*)[__ARM_mve_type_uint32x4_t][__ARM_mve_type_int32_t]:

> + __arm_vbicq_n_u32 (__ARM_mve_coerce(__p0, uint32x4_t),

> + __ARM_mve_coerce1(__p1, int)), \

>    int (*)[__ARM_mve_type_int8x16_t][__ARM_mve_type_int8x16_t]:

> __arm_vbicq_s8 (__ARM_mve_coerce(__p0, int8x16_t),

> __ARM_mve_coerce(__p1, int8x16_t)), \

>    int (*)[__ARM_mve_type_int16x8_t][__ARM_mve_type_int16x8_t]:

> __arm_vbicq_s16 (__ARM_mve_coerce(__p0, int16x8_t),

> __ARM_mve_coerce(__p1, int16x8_t)), \

>    int (*)[__ARM_mve_type_int32x4_t][__ARM_mve_type_int32x4_t]:

> __arm_vbicq_s32 (__ARM_mve_coerce(__p0, int32x4_t),

> __ARM_mve_coerce(__p1, int32x4_t)), \ diff --git

> a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vbicq_n_s16.c

> b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vbicq_n_s16.c

> index

> 96b9699d6b166954f0d5900abc47c64e18416d0c..ecc48503fc2d2b16c9135c41

> 2df22f748874750c 100644

> --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vbicq_n_s16.c

> +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vbicq_n_s16.c

> @@ -10,4 +10,10 @@ foo (int16x8_t a)

>    return vbicq_n_s16 (a, 1);

>  }

> 

> -/* { dg-final { scan-assembler "vbic.i16"  }  } */

> +int16x8_t

> +foo1 (int16x8_t a)

> +{

> +  return vbicq (a, 1);

> +}

> +

> +/* { dg-final { scan-assembler-times "vbic.i16" 2 }  } */

> diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vbicq_n_s32.c

> b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vbicq_n_s32.c

> index

> b262c835134b932968013b9abedb54c7ab901ae0..013cdf15cfd974ab82379d9

> 5e68b5a1bdf8936ca 100644

> --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vbicq_n_s32.c

> +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vbicq_n_s32.c

> @@ -10,4 +10,10 @@ foo (int32x4_t a)

>    return vbicq_n_s32 (a, 1);

>  }

> 

> -/* { dg-final { scan-assembler "vbic.i32"  }  } */

> +int32x4_t

> +foo1 (int32x4_t a)

> +{

> +  return vbicq (a, 1);

> +}

> +

> +/* { dg-final { scan-assembler-times "vbic.i32" 2 }  } */

> diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vbicq_n_u16.c

> b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vbicq_n_u16.c

> index

> 3691bc64e50d37f31bd5dff21e23091a58bf98de..b24db154ad874dc016590ad

> b5e99be4e97044a42 100644

> --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vbicq_n_u16.c

> +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vbicq_n_u16.c

> @@ -10,4 +10,10 @@ foo (uint16x8_t a)

>    return vbicq_n_u16 (a, 1);

>  }

> 

> -/* { dg-final { scan-assembler "vbic.i16"  }  } */

> +uint16x8_t

> +foo1 (uint16x8_t a)

> +{

> +  return vbicq (a, 1);

> +}

> +

> +/* { dg-final { scan-assembler-times "vbic.i16" 2 }  } */

> diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vbicq_n_u32.c

> b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vbicq_n_u32.c

> index

> fc976b9aa2ed7827ee3bd380bb58858cbb12c2f1..1261fbb523cfb596c272f114

> dceb8e8024dbc297 100644

> --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vbicq_n_u32.c

> +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vbicq_n_u32.c

> @@ -10,4 +10,10 @@ foo (uint32x4_t a)

>    return vbicq_n_u32 (a, 1);

>  }

> 

> -/* { dg-final { scan-assembler "vbic.i32"  }  } */

> +uint32x4_t

> +foo1 (uint32x4_t a)

> +{

> +  return vbicq (a, 1);

> +}

> +

> +/* { dg-final { scan-assembler-times "vbic.i32" 2 }  } */

Patch

diff --git a/gcc/config/arm/arm_mve.h b/gcc/config/arm/arm_mve.h
index 14b6ec857bffd85b67c781f554faffde1b2abc6b..d14ca24068e0bc5e75fa1917718a09a2ec3d9cbe 100644
--- a/gcc/config/arm/arm_mve.h
+++ b/gcc/config/arm/arm_mve.h
@@ -20704,6 +20704,10 @@  extern void *__ARM_undef;
 #define __arm_vbicq(p0,p1) ({ __typeof(p0) __p0 = (p0); \
   __typeof(p1) __p1 = (p1); \
   _Generic( (int (*)[__ARM_mve_typeid(__p0)][__ARM_mve_typeid(__p1)])0, \
+  int (*)[__ARM_mve_type_int16x8_t][__ARM_mve_type_int32_t]: __arm_vbicq_n_s16 (__ARM_mve_coerce(__p0, int16x8_t), __ARM_mve_coerce1(__p1, int)), \
+  int (*)[__ARM_mve_type_int32x4_t][__ARM_mve_type_int32_t]: __arm_vbicq_n_s32 (__ARM_mve_coerce(__p0, int32x4_t), __ARM_mve_coerce1(__p1, int)), \
+  int (*)[__ARM_mve_type_uint16x8_t][__ARM_mve_type_int32_t]: __arm_vbicq_n_u16 (__ARM_mve_coerce(__p0, uint16x8_t), __ARM_mve_coerce1(__p1, int)), \
+  int (*)[__ARM_mve_type_uint32x4_t][__ARM_mve_type_int32_t]: __arm_vbicq_n_u32 (__ARM_mve_coerce(__p0, uint32x4_t), __ARM_mve_coerce1(__p1, int)), \
   int (*)[__ARM_mve_type_int8x16_t][__ARM_mve_type_int8x16_t]: __arm_vbicq_s8 (__ARM_mve_coerce(__p0, int8x16_t), __ARM_mve_coerce(__p1, int8x16_t)), \
   int (*)[__ARM_mve_type_int16x8_t][__ARM_mve_type_int16x8_t]: __arm_vbicq_s16 (__ARM_mve_coerce(__p0, int16x8_t), __ARM_mve_coerce(__p1, int16x8_t)), \
   int (*)[__ARM_mve_type_int32x4_t][__ARM_mve_type_int32x4_t]: __arm_vbicq_s32 (__ARM_mve_coerce(__p0, int32x4_t), __ARM_mve_coerce(__p1, int32x4_t)), \
@@ -24095,6 +24099,10 @@  extern void *__ARM_undef;
 #define __arm_vbicq(p0,p1) ({ __typeof(p0) __p0 = (p0); \
   __typeof(p1) __p1 = (p1); \
   _Generic( (int (*)[__ARM_mve_typeid(__p0)][__ARM_mve_typeid(__p1)])0, \
+  int (*)[__ARM_mve_type_int16x8_t][__ARM_mve_type_int32_t]: __arm_vbicq_n_s16 (__ARM_mve_coerce(__p0, int16x8_t), __ARM_mve_coerce1(__p1, int)), \
+  int (*)[__ARM_mve_type_int32x4_t][__ARM_mve_type_int32_t]: __arm_vbicq_n_s32 (__ARM_mve_coerce(__p0, int32x4_t), __ARM_mve_coerce1(__p1, int)), \
+  int (*)[__ARM_mve_type_uint16x8_t][__ARM_mve_type_int32_t]: __arm_vbicq_n_u16 (__ARM_mve_coerce(__p0, uint16x8_t), __ARM_mve_coerce1(__p1, int)), \
+  int (*)[__ARM_mve_type_uint32x4_t][__ARM_mve_type_int32_t]: __arm_vbicq_n_u32 (__ARM_mve_coerce(__p0, uint32x4_t), __ARM_mve_coerce1(__p1, int)), \
   int (*)[__ARM_mve_type_int8x16_t][__ARM_mve_type_int8x16_t]: __arm_vbicq_s8 (__ARM_mve_coerce(__p0, int8x16_t), __ARM_mve_coerce(__p1, int8x16_t)), \
   int (*)[__ARM_mve_type_int16x8_t][__ARM_mve_type_int16x8_t]: __arm_vbicq_s16 (__ARM_mve_coerce(__p0, int16x8_t), __ARM_mve_coerce(__p1, int16x8_t)), \
   int (*)[__ARM_mve_type_int32x4_t][__ARM_mve_type_int32x4_t]: __arm_vbicq_s32 (__ARM_mve_coerce(__p0, int32x4_t), __ARM_mve_coerce(__p1, int32x4_t)), \
diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vbicq_n_s16.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vbicq_n_s16.c
index 96b9699d6b166954f0d5900abc47c64e18416d0c..ecc48503fc2d2b16c9135c412df22f748874750c 100644
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vbicq_n_s16.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vbicq_n_s16.c
@@ -10,4 +10,10 @@  foo (int16x8_t a)
   return vbicq_n_s16 (a, 1);
 }
 
-/* { dg-final { scan-assembler "vbic.i16"  }  } */
+int16x8_t
+foo1 (int16x8_t a)
+{
+  return vbicq (a, 1);
+}
+
+/* { dg-final { scan-assembler-times "vbic.i16" 2 }  } */
diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vbicq_n_s32.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vbicq_n_s32.c
index b262c835134b932968013b9abedb54c7ab901ae0..013cdf15cfd974ab82379d95e68b5a1bdf8936ca 100644
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vbicq_n_s32.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vbicq_n_s32.c
@@ -10,4 +10,10 @@  foo (int32x4_t a)
   return vbicq_n_s32 (a, 1);
 }
 
-/* { dg-final { scan-assembler "vbic.i32"  }  } */
+int32x4_t
+foo1 (int32x4_t a)
+{
+  return vbicq (a, 1);
+}
+
+/* { dg-final { scan-assembler-times "vbic.i32" 2 }  } */
diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vbicq_n_u16.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vbicq_n_u16.c
index 3691bc64e50d37f31bd5dff21e23091a58bf98de..b24db154ad874dc016590adb5e99be4e97044a42 100644
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vbicq_n_u16.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vbicq_n_u16.c
@@ -10,4 +10,10 @@  foo (uint16x8_t a)
   return vbicq_n_u16 (a, 1);
 }
 
-/* { dg-final { scan-assembler "vbic.i16"  }  } */
+uint16x8_t
+foo1 (uint16x8_t a)
+{
+  return vbicq (a, 1);
+}
+
+/* { dg-final { scan-assembler-times "vbic.i16" 2 }  } */
diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vbicq_n_u32.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vbicq_n_u32.c
index fc976b9aa2ed7827ee3bd380bb58858cbb12c2f1..1261fbb523cfb596c272f114dceb8e8024dbc297 100644
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vbicq_n_u32.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vbicq_n_u32.c
@@ -10,4 +10,10 @@  foo (uint32x4_t a)
   return vbicq_n_u32 (a, 1);
 }
 
-/* { dg-final { scan-assembler "vbic.i32"  }  } */
+uint32x4_t
+foo1 (uint32x4_t a)
+{
+  return vbicq (a, 1);
+}
+
+/* { dg-final { scan-assembler-times "vbic.i32" 2 }  } */