[v5,2/5] x86: move certain MOVSX/MOVZX tests

Message ID 74b85fa8-3b1a-d673-d26e-7baaadc69ee6@suse.com
State Superseded
Headers show
Series
  • x86: operand size handling improvements
Related show

Commit Message

Jan Beulich Feb. 11, 2020, 10:25 a.m.
Some encodings are about to gain a warning - move them from test cases
not expecting any diagnostics to the new, dedicated ones, to allow
better focus on the actual changes in the subsequent patch.

The new tests added have some wrong expectations right now, which will
be corrected by the next patch. The test is being added here to make
more visible which cases actually were wrong (and hence get changed),
besides demonstrating that in the vast majority of cases the subsequent
change doesn't alter generated code.

gas/
2020-02-XX  Jan Beulich  <jbeulich@suse.com>

	* testsuite/gas/i386/i386.s, testsuite/gas/i386/iamcu-1.s,
	testsuite/gas/i386/ilp32/x86-64.s: Move ambiguous operand size
	tests ...
	* testsuite/gas/i386/noreg16.s, testsuite/gas/i386/noreg32.s,
	testsuite/gas/i386/noreg64.s, testsuite/gas/i386/x86_64.s: ...
	here.
	* testsuite/gas/i386/i386.d, testsuite/gas/i386/i386-intel.d
	testsuite/gas/i386/iamcu-1.d, testsuite/gas/i386/ilp32/x86-64.d,
	testsuite/gas/i386/k1om.d, testsuite/gas/i386/l1om.d,
	testsuite/gas/i386/noreg16.d, testsuite/gas/i386/noreg32.d,
	testsuite/gas/i386/noreg64.d, testsuite/gas/i386/x86_64-intel.d,
	testsuite/gas/i386/x86_64.d: Adjust expectations.	
	* testsuite/gas/i386/movx16.s, testsuite/gas/i386/movx16.l,
	testsuite/gas/i386/movx32.s, testsuite/gas/i386/movx32.l,
	testsuite/gas/i386/movx64.s, testsuite/gas/i386/movx64.l: New.
	* testsuite/gas/i386/i386.exp: Run new tests.
---
v5: Re-base.
v4: Make tests also work on COFF/PE targets. Re-base.
v3: Re-base.
v2: Add new MOVSXD cases to x86_64.s testcase. Re-base over NOP addition
    to testcases modified here.

Comments

H.J. Lu Feb. 11, 2020, 11:42 a.m. | #1
On Tue, Feb 11, 2020 at 2:25 AM Jan Beulich <jbeulich@suse.com> wrote:
>

> Some encodings are about to gain a warning - move them from test cases

> not expecting any diagnostics to the new, dedicated ones, to allow

> better focus on the actual changes in the subsequent patch.

>

> The new tests added have some wrong expectations right now, which will

> be corrected by the next patch. The test is being added here to make

> more visible which cases actually were wrong (and hence get changed),

> besides demonstrating that in the vast majority of cases the subsequent

> change doesn't alter generated code.

>

> gas/

> 2020-02-XX  Jan Beulich  <jbeulich@suse.com>

>

>         * testsuite/gas/i386/i386.s, testsuite/gas/i386/iamcu-1.s,

>         testsuite/gas/i386/ilp32/x86-64.s: Move ambiguous operand size

>         tests ...

>         * testsuite/gas/i386/noreg16.s, testsuite/gas/i386/noreg32.s,

>         testsuite/gas/i386/noreg64.s, testsuite/gas/i386/x86_64.s: ...

>         here.

>         * testsuite/gas/i386/i386.d, testsuite/gas/i386/i386-intel.d

>         testsuite/gas/i386/iamcu-1.d, testsuite/gas/i386/ilp32/x86-64.d,

>         testsuite/gas/i386/k1om.d, testsuite/gas/i386/l1om.d,

>         testsuite/gas/i386/noreg16.d, testsuite/gas/i386/noreg32.d,

>         testsuite/gas/i386/noreg64.d, testsuite/gas/i386/x86_64-intel.d,

>         testsuite/gas/i386/x86_64.d: Adjust expectations.

>         * testsuite/gas/i386/movx16.s, testsuite/gas/i386/movx16.l,

>         testsuite/gas/i386/movx32.s, testsuite/gas/i386/movx32.l,

>         testsuite/gas/i386/movx64.s, testsuite/gas/i386/movx64.l: New.

>         * testsuite/gas/i386/i386.exp: Run new tests.


Please make a separate patch to address MOVSX/MOVZX.  MOVSX and MOVZX
should take no suffixes.  AT&T syntax is supported if there is no
ambiguity.  AT&T
syntax also supports movsXY and movzXY.   We should also improve
MOVSX/MOVZX documentation.

-- 
H.J.
Jan Beulich Feb. 11, 2020, 11:55 a.m. | #2
On 11.02.2020 12:42, H.J. Lu wrote:
> On Tue, Feb 11, 2020 at 2:25 AM Jan Beulich <jbeulich@suse.com> wrote:

>>

>> Some encodings are about to gain a warning - move them from test cases

>> not expecting any diagnostics to the new, dedicated ones, to allow

>> better focus on the actual changes in the subsequent patch.

>>

>> The new tests added have some wrong expectations right now, which will

>> be corrected by the next patch. The test is being added here to make

>> more visible which cases actually were wrong (and hence get changed),

>> besides demonstrating that in the vast majority of cases the subsequent

>> change doesn't alter generated code.

>>

>> gas/

>> 2020-02-XX  Jan Beulich  <jbeulich@suse.com>

>>

>>         * testsuite/gas/i386/i386.s, testsuite/gas/i386/iamcu-1.s,

>>         testsuite/gas/i386/ilp32/x86-64.s: Move ambiguous operand size

>>         tests ...

>>         * testsuite/gas/i386/noreg16.s, testsuite/gas/i386/noreg32.s,

>>         testsuite/gas/i386/noreg64.s, testsuite/gas/i386/x86_64.s: ...

>>         here.

>>         * testsuite/gas/i386/i386.d, testsuite/gas/i386/i386-intel.d

>>         testsuite/gas/i386/iamcu-1.d, testsuite/gas/i386/ilp32/x86-64.d,

>>         testsuite/gas/i386/k1om.d, testsuite/gas/i386/l1om.d,

>>         testsuite/gas/i386/noreg16.d, testsuite/gas/i386/noreg32.d,

>>         testsuite/gas/i386/noreg64.d, testsuite/gas/i386/x86_64-intel.d,

>>         testsuite/gas/i386/x86_64.d: Adjust expectations.

>>         * testsuite/gas/i386/movx16.s, testsuite/gas/i386/movx16.l,

>>         testsuite/gas/i386/movx32.s, testsuite/gas/i386/movx32.l,

>>         testsuite/gas/i386/movx64.s, testsuite/gas/i386/movx64.l: New.

>>         * testsuite/gas/i386/i386.exp: Run new tests.

> 

> Please make a separate patch to address MOVSX/MOVZX.


I don't understand what you mean here. This patch simply documents the
status quo, to make it (much) easier to see what the next patch
actually adjusts. It doesn't "address" anything. If, for the purpose
of committing, you'd like to see both patches folded - fine by me. But
only then, not any earlier.

>  MOVSX and MOVZX

> should take no suffixes.  AT&T syntax is supported if there is no

> ambiguity.  AT&T

> syntax also supports movsXY and movzXY.


Please could you clarify what specifically you'd like to see changed,
at the very least by pointing out one case each where you think I'm
moving in the wrong direction (presumably in the next patch really)?
I'm afraid your response isn't such that I can derive from it what
exactly you want.

>   We should also improve MOVSX/MOVZX documentation.


Probably, but not here and now.

Jan
H.J. Lu Feb. 11, 2020, 12:19 p.m. | #3
On Tue, Feb 11, 2020 at 3:55 AM Jan Beulich <jbeulich@suse.com> wrote:
>

> On 11.02.2020 12:42, H.J. Lu wrote:

> > On Tue, Feb 11, 2020 at 2:25 AM Jan Beulich <jbeulich@suse.com> wrote:

> >>

> >> Some encodings are about to gain a warning - move them from test cases

> >> not expecting any diagnostics to the new, dedicated ones, to allow

> >> better focus on the actual changes in the subsequent patch.

> >>

> >> The new tests added have some wrong expectations right now, which will

> >> be corrected by the next patch. The test is being added here to make

> >> more visible which cases actually were wrong (and hence get changed),

> >> besides demonstrating that in the vast majority of cases the subsequent

> >> change doesn't alter generated code.

> >>

> >> gas/

> >> 2020-02-XX  Jan Beulich  <jbeulich@suse.com>

> >>

> >>         * testsuite/gas/i386/i386.s, testsuite/gas/i386/iamcu-1.s,

> >>         testsuite/gas/i386/ilp32/x86-64.s: Move ambiguous operand size

> >>         tests ...

> >>         * testsuite/gas/i386/noreg16.s, testsuite/gas/i386/noreg32.s,

> >>         testsuite/gas/i386/noreg64.s, testsuite/gas/i386/x86_64.s: ...

> >>         here.

> >>         * testsuite/gas/i386/i386.d, testsuite/gas/i386/i386-intel.d

> >>         testsuite/gas/i386/iamcu-1.d, testsuite/gas/i386/ilp32/x86-64.d,

> >>         testsuite/gas/i386/k1om.d, testsuite/gas/i386/l1om.d,

> >>         testsuite/gas/i386/noreg16.d, testsuite/gas/i386/noreg32.d,

> >>         testsuite/gas/i386/noreg64.d, testsuite/gas/i386/x86_64-intel.d,

> >>         testsuite/gas/i386/x86_64.d: Adjust expectations.

> >>         * testsuite/gas/i386/movx16.s, testsuite/gas/i386/movx16.l,

> >>         testsuite/gas/i386/movx32.s, testsuite/gas/i386/movx32.l,

> >>         testsuite/gas/i386/movx64.s, testsuite/gas/i386/movx64.l: New.

> >>         * testsuite/gas/i386/i386.exp: Run new tests.

> >

> > Please make a separate patch to address MOVSX/MOVZX.

>

> I don't understand what you mean here. This patch simply documents the

> status quo, to make it (much) easier to see what the next patch

> actually adjusts. It doesn't "address" anything. If, for the purpose

> of committing, you'd like to see both patches folded - fine by me. But

> only then, not any earlier.

>

> >  MOVSX and MOVZX

> > should take no suffixes.  AT&T syntax is supported if there is no

> > ambiguity.  AT&T

> > syntax also supports movsXY and movzXY.

>

> Please could you clarify what specifically you'd like to see changed,

> at the very least by pointing out one case each where you think I'm

> moving in the wrong direction (presumably in the next patch really)?

> I'm afraid your response isn't such that I can derive from it what

> exactly you want.


We support

movsx %ax, %ecx
movzx %ax, %ecx
movswl %ax, %ecx
movzwl %ax, %ecx

We disallow

movsxw %ax, %ecx
movzxw %ax, %ecx

> >   We should also improve MOVSX/MOVZX documentation.

>

> Probably, but not here and now.

>

> Jan




-- 
H.J.
Jan Beulich Feb. 11, 2020, 12:58 p.m. | #4
On 11.02.2020 13:19, H.J. Lu wrote:
> On Tue, Feb 11, 2020 at 3:55 AM Jan Beulich <jbeulich@suse.com> wrote:

>>

>> On 11.02.2020 12:42, H.J. Lu wrote:

>>> On Tue, Feb 11, 2020 at 2:25 AM Jan Beulich <jbeulich@suse.com> wrote:

>>>>

>>>> Some encodings are about to gain a warning - move them from test cases

>>>> not expecting any diagnostics to the new, dedicated ones, to allow

>>>> better focus on the actual changes in the subsequent patch.

>>>>

>>>> The new tests added have some wrong expectations right now, which will

>>>> be corrected by the next patch. The test is being added here to make

>>>> more visible which cases actually were wrong (and hence get changed),

>>>> besides demonstrating that in the vast majority of cases the subsequent

>>>> change doesn't alter generated code.

>>>>

>>>> gas/

>>>> 2020-02-XX  Jan Beulich  <jbeulich@suse.com>

>>>>

>>>>         * testsuite/gas/i386/i386.s, testsuite/gas/i386/iamcu-1.s,

>>>>         testsuite/gas/i386/ilp32/x86-64.s: Move ambiguous operand size

>>>>         tests ...

>>>>         * testsuite/gas/i386/noreg16.s, testsuite/gas/i386/noreg32.s,

>>>>         testsuite/gas/i386/noreg64.s, testsuite/gas/i386/x86_64.s: ...

>>>>         here.

>>>>         * testsuite/gas/i386/i386.d, testsuite/gas/i386/i386-intel.d

>>>>         testsuite/gas/i386/iamcu-1.d, testsuite/gas/i386/ilp32/x86-64.d,

>>>>         testsuite/gas/i386/k1om.d, testsuite/gas/i386/l1om.d,

>>>>         testsuite/gas/i386/noreg16.d, testsuite/gas/i386/noreg32.d,

>>>>         testsuite/gas/i386/noreg64.d, testsuite/gas/i386/x86_64-intel.d,

>>>>         testsuite/gas/i386/x86_64.d: Adjust expectations.

>>>>         * testsuite/gas/i386/movx16.s, testsuite/gas/i386/movx16.l,

>>>>         testsuite/gas/i386/movx32.s, testsuite/gas/i386/movx32.l,

>>>>         testsuite/gas/i386/movx64.s, testsuite/gas/i386/movx64.l: New.

>>>>         * testsuite/gas/i386/i386.exp: Run new tests.

>>>

>>> Please make a separate patch to address MOVSX/MOVZX.

>>

>> I don't understand what you mean here. This patch simply documents the

>> status quo, to make it (much) easier to see what the next patch

>> actually adjusts. It doesn't "address" anything. If, for the purpose

>> of committing, you'd like to see both patches folded - fine by me. But

>> only then, not any earlier.

>>

>>>  MOVSX and MOVZX

>>> should take no suffixes.  AT&T syntax is supported if there is no

>>> ambiguity.  AT&T

>>> syntax also supports movsXY and movzXY.

>>

>> Please could you clarify what specifically you'd like to see changed,

>> at the very least by pointing out one case each where you think I'm

>> moving in the wrong direction (presumably in the next patch really)?

>> I'm afraid your response isn't such that I can derive from it what

>> exactly you want.

> 

> We support

> 

> movsx %ax, %ecx

> movzx %ax, %ecx

> movswl %ax, %ecx

> movzwl %ax, %ecx

> 

> We disallow

> 

> movsxw %ax, %ecx

> movzxw %ax, %ecx


We don't (as this patch demonstrates, along with pre-existing tests,
unless you mean once again to have an inconsistency between insns
with all register operands and similar ones with e memory source),
and if you want it to be this way, then please do so yourself, but
please also only on top of my changes, so I won't need to re-base
_yet_ another time.

Just to repeat my request from an earlier version: Please take the
time to check what this patch does (documenting _just_ current
behavior), and what the next patch changes behavior-wise. And
please comment on that following patch in case you think it makes
a change that it shouldn't make, i.e. in particular one which
isn't in line with other similar behavior.

Jan
H.J. Lu Feb. 11, 2020, 1:01 p.m. | #5
On Tue, Feb 11, 2020 at 4:58 AM Jan Beulich <jbeulich@suse.com> wrote:
>

> On 11.02.2020 13:19, H.J. Lu wrote:

> > On Tue, Feb 11, 2020 at 3:55 AM Jan Beulich <jbeulich@suse.com> wrote:

> >>

> >> On 11.02.2020 12:42, H.J. Lu wrote:

> >>> On Tue, Feb 11, 2020 at 2:25 AM Jan Beulich <jbeulich@suse.com> wrote:

> >>>>

> >>>> Some encodings are about to gain a warning - move them from test cases

> >>>> not expecting any diagnostics to the new, dedicated ones, to allow

> >>>> better focus on the actual changes in the subsequent patch.

> >>>>

> >>>> The new tests added have some wrong expectations right now, which will

> >>>> be corrected by the next patch. The test is being added here to make

> >>>> more visible which cases actually were wrong (and hence get changed),

> >>>> besides demonstrating that in the vast majority of cases the subsequent

> >>>> change doesn't alter generated code.

> >>>>

> >>>> gas/

> >>>> 2020-02-XX  Jan Beulich  <jbeulich@suse.com>

> >>>>

> >>>>         * testsuite/gas/i386/i386.s, testsuite/gas/i386/iamcu-1.s,

> >>>>         testsuite/gas/i386/ilp32/x86-64.s: Move ambiguous operand size

> >>>>         tests ...

> >>>>         * testsuite/gas/i386/noreg16.s, testsuite/gas/i386/noreg32.s,

> >>>>         testsuite/gas/i386/noreg64.s, testsuite/gas/i386/x86_64.s: ...

> >>>>         here.

> >>>>         * testsuite/gas/i386/i386.d, testsuite/gas/i386/i386-intel.d

> >>>>         testsuite/gas/i386/iamcu-1.d, testsuite/gas/i386/ilp32/x86-64.d,

> >>>>         testsuite/gas/i386/k1om.d, testsuite/gas/i386/l1om.d,

> >>>>         testsuite/gas/i386/noreg16.d, testsuite/gas/i386/noreg32.d,

> >>>>         testsuite/gas/i386/noreg64.d, testsuite/gas/i386/x86_64-intel.d,

> >>>>         testsuite/gas/i386/x86_64.d: Adjust expectations.

> >>>>         * testsuite/gas/i386/movx16.s, testsuite/gas/i386/movx16.l,

> >>>>         testsuite/gas/i386/movx32.s, testsuite/gas/i386/movx32.l,

> >>>>         testsuite/gas/i386/movx64.s, testsuite/gas/i386/movx64.l: New.

> >>>>         * testsuite/gas/i386/i386.exp: Run new tests.

> >>>

> >>> Please make a separate patch to address MOVSX/MOVZX.

> >>

> >> I don't understand what you mean here. This patch simply documents the

> >> status quo, to make it (much) easier to see what the next patch

> >> actually adjusts. It doesn't "address" anything. If, for the purpose

> >> of committing, you'd like to see both patches folded - fine by me. But

> >> only then, not any earlier.

> >>

> >>>  MOVSX and MOVZX

> >>> should take no suffixes.  AT&T syntax is supported if there is no

> >>> ambiguity.  AT&T

> >>> syntax also supports movsXY and movzXY.

> >>

> >> Please could you clarify what specifically you'd like to see changed,

> >> at the very least by pointing out one case each where you think I'm

> >> moving in the wrong direction (presumably in the next patch really)?

> >> I'm afraid your response isn't such that I can derive from it what

> >> exactly you want.

> >

> > We support

> >

> > movsx %ax, %ecx

> > movzx %ax, %ecx

> > movswl %ax, %ecx

> > movzwl %ax, %ecx

> >

> > We disallow

> >

> > movsxw %ax, %ecx

> > movzxw %ax, %ecx

>

> We don't (as this patch demonstrates, along with pre-existing tests,

> unless you mean once again to have an inconsistency between insns

> with all register operands and similar ones with e memory source),

> and if you want it to be this way, then please do so yourself, but


I will do it.

> please also only on top of my changes, so I won't need to re-base


Which changes of yours are you referring to?

> _yet_ another time.

>

> Just to repeat my request from an earlier version: Please take the

> time to check what this patch does (documenting _just_ current

> behavior), and what the next patch changes behavior-wise. And

> please comment on that following patch in case you think it makes

> a change that it shouldn't make, i.e. in particular one which

> isn't in line with other similar behavior.

>

> Jan




-- 
H.J.
Jan Beulich Feb. 11, 2020, 1:04 p.m. | #6
On 11.02.2020 14:01, H.J. Lu wrote:
> On Tue, Feb 11, 2020 at 4:58 AM Jan Beulich <jbeulich@suse.com> wrote:

>>

>> On 11.02.2020 13:19, H.J. Lu wrote:

>>> On Tue, Feb 11, 2020 at 3:55 AM Jan Beulich <jbeulich@suse.com> wrote:

>>>>

>>>> On 11.02.2020 12:42, H.J. Lu wrote:

>>>>> On Tue, Feb 11, 2020 at 2:25 AM Jan Beulich <jbeulich@suse.com> wrote:

>>>>>>

>>>>>> Some encodings are about to gain a warning - move them from test cases

>>>>>> not expecting any diagnostics to the new, dedicated ones, to allow

>>>>>> better focus on the actual changes in the subsequent patch.

>>>>>>

>>>>>> The new tests added have some wrong expectations right now, which will

>>>>>> be corrected by the next patch. The test is being added here to make

>>>>>> more visible which cases actually were wrong (and hence get changed),

>>>>>> besides demonstrating that in the vast majority of cases the subsequent

>>>>>> change doesn't alter generated code.

>>>>>>

>>>>>> gas/

>>>>>> 2020-02-XX  Jan Beulich  <jbeulich@suse.com>

>>>>>>

>>>>>>         * testsuite/gas/i386/i386.s, testsuite/gas/i386/iamcu-1.s,

>>>>>>         testsuite/gas/i386/ilp32/x86-64.s: Move ambiguous operand size

>>>>>>         tests ...

>>>>>>         * testsuite/gas/i386/noreg16.s, testsuite/gas/i386/noreg32.s,

>>>>>>         testsuite/gas/i386/noreg64.s, testsuite/gas/i386/x86_64.s: ...

>>>>>>         here.

>>>>>>         * testsuite/gas/i386/i386.d, testsuite/gas/i386/i386-intel.d

>>>>>>         testsuite/gas/i386/iamcu-1.d, testsuite/gas/i386/ilp32/x86-64.d,

>>>>>>         testsuite/gas/i386/k1om.d, testsuite/gas/i386/l1om.d,

>>>>>>         testsuite/gas/i386/noreg16.d, testsuite/gas/i386/noreg32.d,

>>>>>>         testsuite/gas/i386/noreg64.d, testsuite/gas/i386/x86_64-intel.d,

>>>>>>         testsuite/gas/i386/x86_64.d: Adjust expectations.

>>>>>>         * testsuite/gas/i386/movx16.s, testsuite/gas/i386/movx16.l,

>>>>>>         testsuite/gas/i386/movx32.s, testsuite/gas/i386/movx32.l,

>>>>>>         testsuite/gas/i386/movx64.s, testsuite/gas/i386/movx64.l: New.

>>>>>>         * testsuite/gas/i386/i386.exp: Run new tests.

>>>>>

>>>>> Please make a separate patch to address MOVSX/MOVZX.

>>>>

>>>> I don't understand what you mean here. This patch simply documents the

>>>> status quo, to make it (much) easier to see what the next patch

>>>> actually adjusts. It doesn't "address" anything. If, for the purpose

>>>> of committing, you'd like to see both patches folded - fine by me. But

>>>> only then, not any earlier.

>>>>

>>>>>  MOVSX and MOVZX

>>>>> should take no suffixes.  AT&T syntax is supported if there is no

>>>>> ambiguity.  AT&T

>>>>> syntax also supports movsXY and movzXY.

>>>>

>>>> Please could you clarify what specifically you'd like to see changed,

>>>> at the very least by pointing out one case each where you think I'm

>>>> moving in the wrong direction (presumably in the next patch really)?

>>>> I'm afraid your response isn't such that I can derive from it what

>>>> exactly you want.

>>>

>>> We support

>>>

>>> movsx %ax, %ecx

>>> movzx %ax, %ecx

>>> movswl %ax, %ecx

>>> movzwl %ax, %ecx

>>>

>>> We disallow

>>>

>>> movsxw %ax, %ecx

>>> movzxw %ax, %ecx

>>

>> We don't (as this patch demonstrates, along with pre-existing tests,

>> unless you mean once again to have an inconsistency between insns

>> with all register operands and similar ones with e memory source),

>> and if you want it to be this way, then please do so yourself, but

> 

> I will do it.

> 

>> please also only on top of my changes, so I won't need to re-base

> 

> Which changes of yours are you referring to?


This patch and the subsequent one.

Jan

>> _yet_ another time.

>>

>> Just to repeat my request from an earlier version: Please take the

>> time to check what this patch does (documenting _just_ current

>> behavior), and what the next patch changes behavior-wise. And

>> please comment on that following patch in case you think it makes

>> a change that it shouldn't make, i.e. in particular one which

>> isn't in line with other similar behavior.

>>

>> Jan

> 

> 

>
H.J. Lu Feb. 11, 2020, 1:07 p.m. | #7
On Tue, Feb 11, 2020 at 5:04 AM Jan Beulich <jbeulich@suse.com> wrote:
>

> On 11.02.2020 14:01, H.J. Lu wrote:

> > On Tue, Feb 11, 2020 at 4:58 AM Jan Beulich <jbeulich@suse.com> wrote:

> >>

> >> On 11.02.2020 13:19, H.J. Lu wrote:

> >>> On Tue, Feb 11, 2020 at 3:55 AM Jan Beulich <jbeulich@suse.com> wrote:

> >>>>

> >>>> On 11.02.2020 12:42, H.J. Lu wrote:

> >>>>> On Tue, Feb 11, 2020 at 2:25 AM Jan Beulich <jbeulich@suse.com> wrote:

> >>>>>>

> >>>>>> Some encodings are about to gain a warning - move them from test cases

> >>>>>> not expecting any diagnostics to the new, dedicated ones, to allow

> >>>>>> better focus on the actual changes in the subsequent patch.

> >>>>>>

> >>>>>> The new tests added have some wrong expectations right now, which will

> >>>>>> be corrected by the next patch. The test is being added here to make

> >>>>>> more visible which cases actually were wrong (and hence get changed),

> >>>>>> besides demonstrating that in the vast majority of cases the subsequent

> >>>>>> change doesn't alter generated code.

> >>>>>>

> >>>>>> gas/

> >>>>>> 2020-02-XX  Jan Beulich  <jbeulich@suse.com>

> >>>>>>

> >>>>>>         * testsuite/gas/i386/i386.s, testsuite/gas/i386/iamcu-1.s,

> >>>>>>         testsuite/gas/i386/ilp32/x86-64.s: Move ambiguous operand size

> >>>>>>         tests ...

> >>>>>>         * testsuite/gas/i386/noreg16.s, testsuite/gas/i386/noreg32.s,

> >>>>>>         testsuite/gas/i386/noreg64.s, testsuite/gas/i386/x86_64.s: ...

> >>>>>>         here.

> >>>>>>         * testsuite/gas/i386/i386.d, testsuite/gas/i386/i386-intel.d

> >>>>>>         testsuite/gas/i386/iamcu-1.d, testsuite/gas/i386/ilp32/x86-64.d,

> >>>>>>         testsuite/gas/i386/k1om.d, testsuite/gas/i386/l1om.d,

> >>>>>>         testsuite/gas/i386/noreg16.d, testsuite/gas/i386/noreg32.d,

> >>>>>>         testsuite/gas/i386/noreg64.d, testsuite/gas/i386/x86_64-intel.d,

> >>>>>>         testsuite/gas/i386/x86_64.d: Adjust expectations.

> >>>>>>         * testsuite/gas/i386/movx16.s, testsuite/gas/i386/movx16.l,

> >>>>>>         testsuite/gas/i386/movx32.s, testsuite/gas/i386/movx32.l,

> >>>>>>         testsuite/gas/i386/movx64.s, testsuite/gas/i386/movx64.l: New.

> >>>>>>         * testsuite/gas/i386/i386.exp: Run new tests.

> >>>>>

> >>>>> Please make a separate patch to address MOVSX/MOVZX.

> >>>>

> >>>> I don't understand what you mean here. This patch simply documents the

> >>>> status quo, to make it (much) easier to see what the next patch

> >>>> actually adjusts. It doesn't "address" anything. If, for the purpose

> >>>> of committing, you'd like to see both patches folded - fine by me. But

> >>>> only then, not any earlier.

> >>>>

> >>>>>  MOVSX and MOVZX

> >>>>> should take no suffixes.  AT&T syntax is supported if there is no

> >>>>> ambiguity.  AT&T

> >>>>> syntax also supports movsXY and movzXY.

> >>>>

> >>>> Please could you clarify what specifically you'd like to see changed,

> >>>> at the very least by pointing out one case each where you think I'm

> >>>> moving in the wrong direction (presumably in the next patch really)?

> >>>> I'm afraid your response isn't such that I can derive from it what

> >>>> exactly you want.

> >>>

> >>> We support

> >>>

> >>> movsx %ax, %ecx

> >>> movzx %ax, %ecx

> >>> movswl %ax, %ecx

> >>> movzwl %ax, %ecx

> >>>

> >>> We disallow

> >>>

> >>> movsxw %ax, %ecx

> >>> movzxw %ax, %ecx

> >>

> >> We don't (as this patch demonstrates, along with pre-existing tests,

> >> unless you mean once again to have an inconsistency between insns

> >> with all register operands and similar ones with e memory source),

> >> and if you want it to be this way, then please do so yourself, but

> >

> > I will do it.

> >

> >> please also only on top of my changes, so I won't need to re-base

> >

> > Which changes of yours are you referring to?

>

> This patch and the subsequent one.

>


Both changes won't be necessary after my changes.


-- 
H.J.
Jan Beulich Feb. 11, 2020, 4:45 p.m. | #8
On 11.02.2020 14:07, H.J. Lu wrote:
> On Tue, Feb 11, 2020 at 5:04 AM Jan Beulich <jbeulich@suse.com> wrote:

>>

>> On 11.02.2020 14:01, H.J. Lu wrote:

>>> On Tue, Feb 11, 2020 at 4:58 AM Jan Beulich <jbeulich@suse.com> wrote:

>>>>

>>>> On 11.02.2020 13:19, H.J. Lu wrote:

>>>>> On Tue, Feb 11, 2020 at 3:55 AM Jan Beulich <jbeulich@suse.com> wrote:

>>>>>>

>>>>>> On 11.02.2020 12:42, H.J. Lu wrote:

>>>>>>> On Tue, Feb 11, 2020 at 2:25 AM Jan Beulich <jbeulich@suse.com> wrote:

>>>>>>>>

>>>>>>>> Some encodings are about to gain a warning - move them from test cases

>>>>>>>> not expecting any diagnostics to the new, dedicated ones, to allow

>>>>>>>> better focus on the actual changes in the subsequent patch.

>>>>>>>>

>>>>>>>> The new tests added have some wrong expectations right now, which will

>>>>>>>> be corrected by the next patch. The test is being added here to make

>>>>>>>> more visible which cases actually were wrong (and hence get changed),

>>>>>>>> besides demonstrating that in the vast majority of cases the subsequent

>>>>>>>> change doesn't alter generated code.

>>>>>>>>

>>>>>>>> gas/

>>>>>>>> 2020-02-XX  Jan Beulich  <jbeulich@suse.com>

>>>>>>>>

>>>>>>>>         * testsuite/gas/i386/i386.s, testsuite/gas/i386/iamcu-1.s,

>>>>>>>>         testsuite/gas/i386/ilp32/x86-64.s: Move ambiguous operand size

>>>>>>>>         tests ...

>>>>>>>>         * testsuite/gas/i386/noreg16.s, testsuite/gas/i386/noreg32.s,

>>>>>>>>         testsuite/gas/i386/noreg64.s, testsuite/gas/i386/x86_64.s: ...

>>>>>>>>         here.

>>>>>>>>         * testsuite/gas/i386/i386.d, testsuite/gas/i386/i386-intel.d

>>>>>>>>         testsuite/gas/i386/iamcu-1.d, testsuite/gas/i386/ilp32/x86-64.d,

>>>>>>>>         testsuite/gas/i386/k1om.d, testsuite/gas/i386/l1om.d,

>>>>>>>>         testsuite/gas/i386/noreg16.d, testsuite/gas/i386/noreg32.d,

>>>>>>>>         testsuite/gas/i386/noreg64.d, testsuite/gas/i386/x86_64-intel.d,

>>>>>>>>         testsuite/gas/i386/x86_64.d: Adjust expectations.

>>>>>>>>         * testsuite/gas/i386/movx16.s, testsuite/gas/i386/movx16.l,

>>>>>>>>         testsuite/gas/i386/movx32.s, testsuite/gas/i386/movx32.l,

>>>>>>>>         testsuite/gas/i386/movx64.s, testsuite/gas/i386/movx64.l: New.

>>>>>>>>         * testsuite/gas/i386/i386.exp: Run new tests.

>>>>>>>

>>>>>>> Please make a separate patch to address MOVSX/MOVZX.

>>>>>>

>>>>>> I don't understand what you mean here. This patch simply documents the

>>>>>> status quo, to make it (much) easier to see what the next patch

>>>>>> actually adjusts. It doesn't "address" anything. If, for the purpose

>>>>>> of committing, you'd like to see both patches folded - fine by me. But

>>>>>> only then, not any earlier.

>>>>>>

>>>>>>>  MOVSX and MOVZX

>>>>>>> should take no suffixes.  AT&T syntax is supported if there is no

>>>>>>> ambiguity.  AT&T

>>>>>>> syntax also supports movsXY and movzXY.

>>>>>>

>>>>>> Please could you clarify what specifically you'd like to see changed,

>>>>>> at the very least by pointing out one case each where you think I'm

>>>>>> moving in the wrong direction (presumably in the next patch really)?

>>>>>> I'm afraid your response isn't such that I can derive from it what

>>>>>> exactly you want.

>>>>>

>>>>> We support

>>>>>

>>>>> movsx %ax, %ecx

>>>>> movzx %ax, %ecx

>>>>> movswl %ax, %ecx

>>>>> movzwl %ax, %ecx

>>>>>

>>>>> We disallow

>>>>>

>>>>> movsxw %ax, %ecx

>>>>> movzxw %ax, %ecx

>>>>

>>>> We don't (as this patch demonstrates, along with pre-existing tests,

>>>> unless you mean once again to have an inconsistency between insns

>>>> with all register operands and similar ones with e memory source),

>>>> and if you want it to be this way, then please do so yourself, but

>>>

>>> I will do it.

>>>

>>>> please also only on top of my changes, so I won't need to re-base

>>>

>>> Which changes of yours are you referring to?

>>

>> This patch and the subsequent one.

>>

> 

> Both changes won't be necessary after my changes.


I'm confused. What you want to deal with is - afaict - orthogonal to
what the next patch in the series here does.

Jan
H.J. Lu Feb. 11, 2020, 5:04 p.m. | #9
On Tue, Feb 11, 2020 at 8:45 AM Jan Beulich <jbeulich@suse.com> wrote:
>

> On 11.02.2020 14:07, H.J. Lu wrote:

> > On Tue, Feb 11, 2020 at 5:04 AM Jan Beulich <jbeulich@suse.com> wrote:

> >>

> >> On 11.02.2020 14:01, H.J. Lu wrote:

> >>> On Tue, Feb 11, 2020 at 4:58 AM Jan Beulich <jbeulich@suse.com> wrote:

> >>>>

> >>>> On 11.02.2020 13:19, H.J. Lu wrote:

> >>>>> On Tue, Feb 11, 2020 at 3:55 AM Jan Beulich <jbeulich@suse.com> wrote:

> >>>>>>

> >>>>>> On 11.02.2020 12:42, H.J. Lu wrote:

> >>>>>>> On Tue, Feb 11, 2020 at 2:25 AM Jan Beulich <jbeulich@suse.com> wrote:

> >>>>>>>>

> >>>>>>>> Some encodings are about to gain a warning - move them from test cases

> >>>>>>>> not expecting any diagnostics to the new, dedicated ones, to allow

> >>>>>>>> better focus on the actual changes in the subsequent patch.

> >>>>>>>>

> >>>>>>>> The new tests added have some wrong expectations right now, which will

> >>>>>>>> be corrected by the next patch. The test is being added here to make

> >>>>>>>> more visible which cases actually were wrong (and hence get changed),

> >>>>>>>> besides demonstrating that in the vast majority of cases the subsequent

> >>>>>>>> change doesn't alter generated code.

> >>>>>>>>

> >>>>>>>> gas/

> >>>>>>>> 2020-02-XX  Jan Beulich  <jbeulich@suse.com>

> >>>>>>>>

> >>>>>>>>         * testsuite/gas/i386/i386.s, testsuite/gas/i386/iamcu-1.s,

> >>>>>>>>         testsuite/gas/i386/ilp32/x86-64.s: Move ambiguous operand size

> >>>>>>>>         tests ...

> >>>>>>>>         * testsuite/gas/i386/noreg16.s, testsuite/gas/i386/noreg32.s,

> >>>>>>>>         testsuite/gas/i386/noreg64.s, testsuite/gas/i386/x86_64.s: ...

> >>>>>>>>         here.

> >>>>>>>>         * testsuite/gas/i386/i386.d, testsuite/gas/i386/i386-intel.d

> >>>>>>>>         testsuite/gas/i386/iamcu-1.d, testsuite/gas/i386/ilp32/x86-64.d,

> >>>>>>>>         testsuite/gas/i386/k1om.d, testsuite/gas/i386/l1om.d,

> >>>>>>>>         testsuite/gas/i386/noreg16.d, testsuite/gas/i386/noreg32.d,

> >>>>>>>>         testsuite/gas/i386/noreg64.d, testsuite/gas/i386/x86_64-intel.d,

> >>>>>>>>         testsuite/gas/i386/x86_64.d: Adjust expectations.

> >>>>>>>>         * testsuite/gas/i386/movx16.s, testsuite/gas/i386/movx16.l,

> >>>>>>>>         testsuite/gas/i386/movx32.s, testsuite/gas/i386/movx32.l,

> >>>>>>>>         testsuite/gas/i386/movx64.s, testsuite/gas/i386/movx64.l: New.

> >>>>>>>>         * testsuite/gas/i386/i386.exp: Run new tests.

> >>>>>>>

> >>>>>>> Please make a separate patch to address MOVSX/MOVZX.

> >>>>>>

> >>>>>> I don't understand what you mean here. This patch simply documents the

> >>>>>> status quo, to make it (much) easier to see what the next patch

> >>>>>> actually adjusts. It doesn't "address" anything. If, for the purpose

> >>>>>> of committing, you'd like to see both patches folded - fine by me. But

> >>>>>> only then, not any earlier.

> >>>>>>

> >>>>>>>  MOVSX and MOVZX

> >>>>>>> should take no suffixes.  AT&T syntax is supported if there is no

> >>>>>>> ambiguity.  AT&T

> >>>>>>> syntax also supports movsXY and movzXY.

> >>>>>>

> >>>>>> Please could you clarify what specifically you'd like to see changed,

> >>>>>> at the very least by pointing out one case each where you think I'm

> >>>>>> moving in the wrong direction (presumably in the next patch really)?

> >>>>>> I'm afraid your response isn't such that I can derive from it what

> >>>>>> exactly you want.

> >>>>>

> >>>>> We support

> >>>>>

> >>>>> movsx %ax, %ecx

> >>>>> movzx %ax, %ecx

> >>>>> movswl %ax, %ecx

> >>>>> movzwl %ax, %ecx

> >>>>>

> >>>>> We disallow

> >>>>>

> >>>>> movsxw %ax, %ecx

> >>>>> movzxw %ax, %ecx

> >>>>

> >>>> We don't (as this patch demonstrates, along with pre-existing tests,

> >>>> unless you mean once again to have an inconsistency between insns

> >>>> with all register operands and similar ones with e memory source),

> >>>> and if you want it to be this way, then please do so yourself, but

> >>>

> >>> I will do it.

> >>>

> >>>> please also only on top of my changes, so I won't need to re-base

> >>>

> >>> Which changes of yours are you referring to?

> >>

> >> This patch and the subsequent one.

> >>

> >

> > Both changes won't be necessary after my changes.

>

> I'm confused. What you want to deal with is - afaict - orthogonal to

> what the next patch in the series here does.

>


You will see what I mean when I post my patch for review.

-- 
H.J.
H.J. Lu Feb. 11, 2020, 8:11 p.m. | #10
On Tue, Feb 11, 2020 at 9:04 AM H.J. Lu <hjl.tools@gmail.com> wrote:
>

> On Tue, Feb 11, 2020 at 8:45 AM Jan Beulich <jbeulich@suse.com> wrote:

> >

> > On 11.02.2020 14:07, H.J. Lu wrote:

> > > On Tue, Feb 11, 2020 at 5:04 AM Jan Beulich <jbeulich@suse.com> wrote:

> > >>

> > >> On 11.02.2020 14:01, H.J. Lu wrote:

> > >>> On Tue, Feb 11, 2020 at 4:58 AM Jan Beulich <jbeulich@suse.com> wrote:

> > >>>>

> > >>>> On 11.02.2020 13:19, H.J. Lu wrote:

> > >>>>> On Tue, Feb 11, 2020 at 3:55 AM Jan Beulich <jbeulich@suse.com> wrote:

> > >>>>>>

> > >>>>>> On 11.02.2020 12:42, H.J. Lu wrote:

> > >>>>>>> On Tue, Feb 11, 2020 at 2:25 AM Jan Beulich <jbeulich@suse.com> wrote:

> > >>>>>>>>

> > >>>>>>>> Some encodings are about to gain a warning - move them from test cases

> > >>>>>>>> not expecting any diagnostics to the new, dedicated ones, to allow

> > >>>>>>>> better focus on the actual changes in the subsequent patch.

> > >>>>>>>>

> > >>>>>>>> The new tests added have some wrong expectations right now, which will

> > >>>>>>>> be corrected by the next patch. The test is being added here to make

> > >>>>>>>> more visible which cases actually were wrong (and hence get changed),

> > >>>>>>>> besides demonstrating that in the vast majority of cases the subsequent

> > >>>>>>>> change doesn't alter generated code.

> > >>>>>>>>

> > >>>>>>>> gas/

> > >>>>>>>> 2020-02-XX  Jan Beulich  <jbeulich@suse.com>

> > >>>>>>>>

> > >>>>>>>>         * testsuite/gas/i386/i386.s, testsuite/gas/i386/iamcu-1.s,

> > >>>>>>>>         testsuite/gas/i386/ilp32/x86-64.s: Move ambiguous operand size

> > >>>>>>>>         tests ...

> > >>>>>>>>         * testsuite/gas/i386/noreg16.s, testsuite/gas/i386/noreg32.s,

> > >>>>>>>>         testsuite/gas/i386/noreg64.s, testsuite/gas/i386/x86_64.s: ...

> > >>>>>>>>         here.

> > >>>>>>>>         * testsuite/gas/i386/i386.d, testsuite/gas/i386/i386-intel.d

> > >>>>>>>>         testsuite/gas/i386/iamcu-1.d, testsuite/gas/i386/ilp32/x86-64.d,

> > >>>>>>>>         testsuite/gas/i386/k1om.d, testsuite/gas/i386/l1om.d,

> > >>>>>>>>         testsuite/gas/i386/noreg16.d, testsuite/gas/i386/noreg32.d,

> > >>>>>>>>         testsuite/gas/i386/noreg64.d, testsuite/gas/i386/x86_64-intel.d,

> > >>>>>>>>         testsuite/gas/i386/x86_64.d: Adjust expectations.

> > >>>>>>>>         * testsuite/gas/i386/movx16.s, testsuite/gas/i386/movx16.l,

> > >>>>>>>>         testsuite/gas/i386/movx32.s, testsuite/gas/i386/movx32.l,

> > >>>>>>>>         testsuite/gas/i386/movx64.s, testsuite/gas/i386/movx64.l: New.

> > >>>>>>>>         * testsuite/gas/i386/i386.exp: Run new tests.

> > >>>>>>>

> > >>>>>>> Please make a separate patch to address MOVSX/MOVZX.

> > >>>>>>

> > >>>>>> I don't understand what you mean here. This patch simply documents the

> > >>>>>> status quo, to make it (much) easier to see what the next patch

> > >>>>>> actually adjusts. It doesn't "address" anything. If, for the purpose

> > >>>>>> of committing, you'd like to see both patches folded - fine by me. But

> > >>>>>> only then, not any earlier.

> > >>>>>>

> > >>>>>>>  MOVSX and MOVZX

> > >>>>>>> should take no suffixes.  AT&T syntax is supported if there is no

> > >>>>>>> ambiguity.  AT&T

> > >>>>>>> syntax also supports movsXY and movzXY.

> > >>>>>>

> > >>>>>> Please could you clarify what specifically you'd like to see changed,

> > >>>>>> at the very least by pointing out one case each where you think I'm

> > >>>>>> moving in the wrong direction (presumably in the next patch really)?

> > >>>>>> I'm afraid your response isn't such that I can derive from it what

> > >>>>>> exactly you want.

> > >>>>>

> > >>>>> We support

> > >>>>>

> > >>>>> movsx %ax, %ecx

> > >>>>> movzx %ax, %ecx

> > >>>>> movswl %ax, %ecx

> > >>>>> movzwl %ax, %ecx

> > >>>>>

> > >>>>> We disallow

> > >>>>>

> > >>>>> movsxw %ax, %ecx

> > >>>>> movzxw %ax, %ecx

> > >>>>

> > >>>> We don't (as this patch demonstrates, along with pre-existing tests,

> > >>>> unless you mean once again to have an inconsistency between insns

> > >>>> with all register operands and similar ones with e memory source),

> > >>>> and if you want it to be this way, then please do so yourself, but

> > >>>

> > >>> I will do it.

> > >>>

> > >>>> please also only on top of my changes, so I won't need to re-base

> > >>>

> > >>> Which changes of yours are you referring to?

> > >>

> > >> This patch and the subsequent one.

> > >>

> > >

> > > Both changes won't be necessary after my changes.

> >

> > I'm confused. What you want to deal with is - afaict - orthogonal to

> > what the next patch in the series here does.

> >

>

> You will see what I mean when I post my patch for review.

>


AT&T syntax requires suffix to specify memory operand size.  Since
movsx and movzx can have different memory operand sizes with the same
destination register, this patch removes movsx and movzx with memory
operand from AT&T syntax.  Since AT&T syntax uses different mnemonics
for movsx and movzx, this change should have little impact on assembly
sources.  Tested with Linux kernel 5.5.3 for x86-64 and glibc 2.31 for
i686 and x86-64.

-- 
H.J.
H.J. Lu Feb. 11, 2020, 11:34 p.m. | #11
On Tue, Feb 11, 2020 at 12:11 PM H.J. Lu <hjl.tools@gmail.com> wrote:
>

> On Tue, Feb 11, 2020 at 9:04 AM H.J. Lu <hjl.tools@gmail.com> wrote:

> >

> > On Tue, Feb 11, 2020 at 8:45 AM Jan Beulich <jbeulich@suse.com> wrote:

> > >

> > > On 11.02.2020 14:07, H.J. Lu wrote:

> > > > On Tue, Feb 11, 2020 at 5:04 AM Jan Beulich <jbeulich@suse.com> wrote:

> > > >>

> > > >> On 11.02.2020 14:01, H.J. Lu wrote:

> > > >>> On Tue, Feb 11, 2020 at 4:58 AM Jan Beulich <jbeulich@suse.com> wrote:

> > > >>>>

> > > >>>> On 11.02.2020 13:19, H.J. Lu wrote:

> > > >>>>> On Tue, Feb 11, 2020 at 3:55 AM Jan Beulich <jbeulich@suse.com> wrote:

> > > >>>>>>

> > > >>>>>> On 11.02.2020 12:42, H.J. Lu wrote:

> > > >>>>>>> On Tue, Feb 11, 2020 at 2:25 AM Jan Beulich <jbeulich@suse.com> wrote:

> > > >>>>>>>>

> > > >>>>>>>> Some encodings are about to gain a warning - move them from test cases

> > > >>>>>>>> not expecting any diagnostics to the new, dedicated ones, to allow

> > > >>>>>>>> better focus on the actual changes in the subsequent patch.

> > > >>>>>>>>

> > > >>>>>>>> The new tests added have some wrong expectations right now, which will

> > > >>>>>>>> be corrected by the next patch. The test is being added here to make

> > > >>>>>>>> more visible which cases actually were wrong (and hence get changed),

> > > >>>>>>>> besides demonstrating that in the vast majority of cases the subsequent

> > > >>>>>>>> change doesn't alter generated code.

> > > >>>>>>>>

> > > >>>>>>>> gas/

> > > >>>>>>>> 2020-02-XX  Jan Beulich  <jbeulich@suse.com>

> > > >>>>>>>>

> > > >>>>>>>>         * testsuite/gas/i386/i386.s, testsuite/gas/i386/iamcu-1.s,

> > > >>>>>>>>         testsuite/gas/i386/ilp32/x86-64.s: Move ambiguous operand size

> > > >>>>>>>>         tests ...

> > > >>>>>>>>         * testsuite/gas/i386/noreg16.s, testsuite/gas/i386/noreg32.s,

> > > >>>>>>>>         testsuite/gas/i386/noreg64.s, testsuite/gas/i386/x86_64.s: ...

> > > >>>>>>>>         here.

> > > >>>>>>>>         * testsuite/gas/i386/i386.d, testsuite/gas/i386/i386-intel.d

> > > >>>>>>>>         testsuite/gas/i386/iamcu-1.d, testsuite/gas/i386/ilp32/x86-64.d,

> > > >>>>>>>>         testsuite/gas/i386/k1om.d, testsuite/gas/i386/l1om.d,

> > > >>>>>>>>         testsuite/gas/i386/noreg16.d, testsuite/gas/i386/noreg32.d,

> > > >>>>>>>>         testsuite/gas/i386/noreg64.d, testsuite/gas/i386/x86_64-intel.d,

> > > >>>>>>>>         testsuite/gas/i386/x86_64.d: Adjust expectations.

> > > >>>>>>>>         * testsuite/gas/i386/movx16.s, testsuite/gas/i386/movx16.l,

> > > >>>>>>>>         testsuite/gas/i386/movx32.s, testsuite/gas/i386/movx32.l,

> > > >>>>>>>>         testsuite/gas/i386/movx64.s, testsuite/gas/i386/movx64.l: New.

> > > >>>>>>>>         * testsuite/gas/i386/i386.exp: Run new tests.

> > > >>>>>>>

> > > >>>>>>> Please make a separate patch to address MOVSX/MOVZX.

> > > >>>>>>

> > > >>>>>> I don't understand what you mean here. This patch simply documents the

> > > >>>>>> status quo, to make it (much) easier to see what the next patch

> > > >>>>>> actually adjusts. It doesn't "address" anything. If, for the purpose

> > > >>>>>> of committing, you'd like to see both patches folded - fine by me. But

> > > >>>>>> only then, not any earlier.

> > > >>>>>>

> > > >>>>>>>  MOVSX and MOVZX

> > > >>>>>>> should take no suffixes.  AT&T syntax is supported if there is no

> > > >>>>>>> ambiguity.  AT&T

> > > >>>>>>> syntax also supports movsXY and movzXY.

> > > >>>>>>

> > > >>>>>> Please could you clarify what specifically you'd like to see changed,

> > > >>>>>> at the very least by pointing out one case each where you think I'm

> > > >>>>>> moving in the wrong direction (presumably in the next patch really)?

> > > >>>>>> I'm afraid your response isn't such that I can derive from it what

> > > >>>>>> exactly you want.

> > > >>>>>

> > > >>>>> We support

> > > >>>>>

> > > >>>>> movsx %ax, %ecx

> > > >>>>> movzx %ax, %ecx

> > > >>>>> movswl %ax, %ecx

> > > >>>>> movzwl %ax, %ecx

> > > >>>>>

> > > >>>>> We disallow

> > > >>>>>

> > > >>>>> movsxw %ax, %ecx

> > > >>>>> movzxw %ax, %ecx

> > > >>>>

> > > >>>> We don't (as this patch demonstrates, along with pre-existing tests,

> > > >>>> unless you mean once again to have an inconsistency between insns

> > > >>>> with all register operands and similar ones with e memory source),

> > > >>>> and if you want it to be this way, then please do so yourself, but

> > > >>>

> > > >>> I will do it.

> > > >>>

> > > >>>> please also only on top of my changes, so I won't need to re-base

> > > >>>

> > > >>> Which changes of yours are you referring to?

> > > >>

> > > >> This patch and the subsequent one.

> > > >>

> > > >

> > > > Both changes won't be necessary after my changes.

> > >

> > > I'm confused. What you want to deal with is - afaict - orthogonal to

> > > what the next patch in the series here does.

> > >

> >

> > You will see what I mean when I post my patch for review.

> >

>

> AT&T syntax requires suffix to specify memory operand size.  Since

> movsx and movzx can have different memory operand sizes with the same

> destination register, this patch removes movsx and movzx with memory

> operand from AT&T syntax.  Since AT&T syntax uses different mnemonics

> for movsx and movzx, this change should have little impact on assembly

> sources.  Tested with Linux kernel 5.5.3 for x86-64 and glibc 2.31 for

> i686 and x86-64.

>


Updated patch to add more testcases and allow register operand with
mov[sz]x[bwl].


-- 
H.J.
From c92f793b90ded44dda15703d7b1581bd5731d931 Mon Sep 17 00:00:00 2001
From: "H.J. Lu" <hjl.tools@gmail.com>
Date: Tue, 11 Feb 2020 05:39:53 -0800
Subject: [PATCH] x86: Remove movsx/movzx with memory operand from AT&T syntax

AT&T syntax requires suffix to specify memory operand size.  Since
movsx and movzx can have different memory operand sizes with the same
destination register, this patch removes movsx and movzx with memory
operand from AT&T syntax.  Since AT&T syntax uses different mnemonics
for movsx and movzx, this change should have little impact on assembly
sources.  Tested with Linux kernel 5.5.3 for x86-64 and glibc 2.31 for
i686 and x86-64.

gas/

	PR gas/25438
	* doc/c-i386.texi: Document movsx, movsxd and movzx for AT&T
	syntax.
	* testsuite/gas/i386/i386-intel.d: Updated.
	* testsuite/gas/i386/i386.d: Likewise.
	* testsuite/gas/i386/iamcu-1.d: Likewise.
	* testsuite/gas/i386/ilp32/x86-64.d: Likewise.
	* testsuite/gas/i386/k1om.d: Likewise.
	* testsuite/gas/i386/l1om.d: Likewise.
	* testsuite/gas/i386/x86_64-intel.d: Likewise.
	* testsuite/gas/i386/x86_64.d: Likewise.
	* testsuite/gas/i386/i386.exp: Run movszx-inval and
	x86-64-movszx-inval.
	* testsuite/gas/i386/i386.s: Remove movsx/movzx tests with
	memory operand in AT&T syntax.
	* testsuite/gas/i386/iamcu-1.s: Likewise.
	* testsuite/gas/i386/x86_64.s: Likewise.
	* testsuite/gas/i386/ilp32/x86-64.s: Likewise.
	* testsuite/gas/i386/movszx-inval.l: New file.
	* testsuite/gas/i386/movszx-inval.s: Likewise.
	* testsuite/gas/i386/x86-64-movszx-inval.l: Likewise.
	* testsuite/gas/i386/x86-64-movszx-inval.s: Likewise.

opcodes/

	PR gas/25438
	* i386-opc.tbl: Remove movsx and movzx with memory operand from
	AT&T syntax.  Don't allow suffix with movsx and movzx.  Add
	movsxb, movsxw, movsxl, movzxb and movzxw for AT&T syntax.
	* i386-tbl.h: Regenerated.
---
 gas/doc/c-i386.texi                          |  43 +++++++
 gas/testsuite/gas/i386/i386-intel.d          |  10 +-
 gas/testsuite/gas/i386/i386.d                |  10 +-
 gas/testsuite/gas/i386/i386.exp              |   2 +
 gas/testsuite/gas/i386/i386.s                |  10 +-
 gas/testsuite/gas/i386/iamcu-1.d             |  10 +-
 gas/testsuite/gas/i386/iamcu-1.s             |  10 +-
 gas/testsuite/gas/i386/ilp32/x86-64.d        |  23 ++--
 gas/testsuite/gas/i386/ilp32/x86-64.s        |  23 ++--
 gas/testsuite/gas/i386/k1om.d                |  23 ++--
 gas/testsuite/gas/i386/l1om.d                |  23 ++--
 gas/testsuite/gas/i386/movszx-inval.l        |  29 +++++
 gas/testsuite/gas/i386/movszx-inval.s        |  15 +++
 gas/testsuite/gas/i386/x86-64-movszx-inval.l |  41 +++++++
 gas/testsuite/gas/i386/x86-64-movszx-inval.s |  21 ++++
 gas/testsuite/gas/i386/x86_64-intel.d        |  23 ++--
 gas/testsuite/gas/i386/x86_64.d              |  23 ++--
 gas/testsuite/gas/i386/x86_64.s              |  23 ++--
 opcodes/i386-opc.tbl                         |  25 +++--
 opcodes/i386-tbl.h                           | 112 +++++++++++++++----
 20 files changed, 364 insertions(+), 135 deletions(-)
 create mode 100644 gas/testsuite/gas/i386/movszx-inval.l
 create mode 100644 gas/testsuite/gas/i386/movszx-inval.s
 create mode 100644 gas/testsuite/gas/i386/x86-64-movszx-inval.l
 create mode 100644 gas/testsuite/gas/i386/x86-64-movszx-inval.s

diff --git a/gas/doc/c-i386.texi b/gas/doc/c-i386.texi
index f0189ccb44..dd96dd1e57 100644
--- a/gas/doc/c-i386.texi
+++ b/gas/doc/c-i386.texi
@@ -835,6 +835,49 @@ are called @samp{cbtw}, @samp{cwtl}, @samp{cwtd}, @samp{cltd}, @samp{cltq}, and
 @samp{cqto} in AT&T naming.  @code{@value{AS}} accepts either naming for these
 instructions.
 
+@cindex extension instructions, i386
+@cindex i386 extension instructions
+@cindex extension instructions, x86-64
+@cindex x86-64 extension instructions
+The Intel-syntax extension instructions
+
+@itemize @bullet
+@item
+@samp{movsx} --- sign-extend @samp{reg8/mem8} to @samp{reg16}.
+
+@samp{movsx} --- sign-extend @samp{reg8/mem8} to @samp{reg32}.
+
+@samp{movsx} --- sign-extend @samp{reg8/mem8} to @samp{reg64}
+(x86-64 only).
+
+@samp{movsx} --- sign-extend @samp{reg16/mem16} to @samp{reg32}
+
+@samp{movsx} --- sign-extend @samp{reg16/mem16} to @samp{reg64}
+(x86-64 only).
+
+@samp{movsxd} --- sign-extend @samp{reg32/mem32} to @samp{reg64}
+(x86-64 only).
+
+@samp{movzx} --- zero-extend @samp{reg8/mem8} to @samp{reg16}.
+
+@samp{movzx} --- zero-extend @samp{reg8/mem8} to @samp{reg32}.
+
+@samp{movzx} --- zero-extend @samp{reg8/mem8} to @samp{reg64}
+(x86-64 only).
+
+@samp{movzx} --- zero-extend @samp{reg16/mem16} to @samp{reg32}
+
+@samp{movzx} --- zero-extend @samp{reg16/mem16} to @samp{reg64}
+(x86-64 only).
+@end itemize
+
+@noindent
+are called @samp{movsbw/movsxb}, @samp{movsbl/movsxb},
+@samp{movsbq/movsb}, @samp{movswl/movsxw}, @samp{movswq/movsxw},
+@samp{movslq/movsxl}, @samp{movzbw/movzxb}, @samp{movzbl/movzxb},
+@samp{movzbq/movzxb}, @samp{movzwl/movzxw} and @samp{movzwq/movzxw}
+in AT&T syntax.
+
 @cindex jump instructions, i386
 @cindex call instructions, i386
 @cindex jump instructions, x86-64
diff --git a/gas/testsuite/gas/i386/i386-intel.d b/gas/testsuite/gas/i386/i386-intel.d
index 1913e8da19..580f858ec7 100644
--- a/gas/testsuite/gas/i386/i386-intel.d
+++ b/gas/testsuite/gas/i386/i386-intel.d
@@ -14,8 +14,9 @@ Disassembly of section .text:
 [ 	]*[a-f0-9]+:	66 0f be f0          	movsx  si,al
 [ 	]*[a-f0-9]+:	0f be f0             	movsx  esi,al
 [ 	]*[a-f0-9]+:	0f bf f0             	movsx  esi,ax
-[ 	]*[a-f0-9]+:	0f be 10             	movsx  edx,BYTE PTR \[eax\]
-[ 	]*[a-f0-9]+:	66 0f be 10          	movsx  dx,BYTE PTR \[eax\]
+[ 	]*[a-f0-9]+:	66 0f be f0          	movsx  si,al
+[ 	]*[a-f0-9]+:	0f be f0             	movsx  esi,al
+[ 	]*[a-f0-9]+:	0f bf f0             	movsx  esi,ax
 [ 	]*[a-f0-9]+:	66 0f be 10          	movsx  dx,BYTE PTR \[eax\]
 [ 	]*[a-f0-9]+:	0f be 10             	movsx  edx,BYTE PTR \[eax\]
 [ 	]*[a-f0-9]+:	0f bf 10             	movsx  edx,WORD PTR \[eax\]
@@ -25,8 +26,9 @@ Disassembly of section .text:
 [ 	]*[a-f0-9]+:	66 0f b6 f0          	movzx  si,al
 [ 	]*[a-f0-9]+:	0f b6 f0             	movzx  esi,al
 [ 	]*[a-f0-9]+:	0f b7 f0             	movzx  esi,ax
-[ 	]*[a-f0-9]+:	0f b6 10             	movzx  edx,BYTE PTR \[eax\]
-[ 	]*[a-f0-9]+:	66 0f b6 10          	movzx  dx,BYTE PTR \[eax\]
+[ 	]*[a-f0-9]+:	66 0f b6 f0          	movzx  si,al
+[ 	]*[a-f0-9]+:	0f b6 f0             	movzx  esi,al
+[ 	]*[a-f0-9]+:	0f b7 f0             	movzx  esi,ax
 [ 	]*[a-f0-9]+:	66 0f b6 10          	movzx  dx,BYTE PTR \[eax\]
 [ 	]*[a-f0-9]+:	0f b6 10             	movzx  edx,BYTE PTR \[eax\]
 [ 	]*[a-f0-9]+:	0f b7 10             	movzx  edx,WORD PTR \[eax\]
diff --git a/gas/testsuite/gas/i386/i386.d b/gas/testsuite/gas/i386/i386.d
index 1c6c4cc3fd..b94e248373 100644
--- a/gas/testsuite/gas/i386/i386.d
+++ b/gas/testsuite/gas/i386/i386.d
@@ -13,8 +13,9 @@ Disassembly of section .text:
 [ 	]*[a-f0-9]+:	66 0f be f0          	movsbw %al,%si
 [ 	]*[a-f0-9]+:	0f be f0             	movsbl %al,%esi
 [ 	]*[a-f0-9]+:	0f bf f0             	movswl %ax,%esi
-[ 	]*[a-f0-9]+:	0f be 10             	movsbl \(%eax\),%edx
-[ 	]*[a-f0-9]+:	66 0f be 10          	movsbw \(%eax\),%dx
+[ 	]*[a-f0-9]+:	66 0f be f0          	movsbw %al,%si
+[ 	]*[a-f0-9]+:	0f be f0             	movsbl %al,%esi
+[ 	]*[a-f0-9]+:	0f bf f0             	movswl %ax,%esi
 [ 	]*[a-f0-9]+:	66 0f be 10          	movsbw \(%eax\),%dx
 [ 	]*[a-f0-9]+:	0f be 10             	movsbl \(%eax\),%edx
 [ 	]*[a-f0-9]+:	0f bf 10             	movswl \(%eax\),%edx
@@ -24,8 +25,9 @@ Disassembly of section .text:
 [ 	]*[a-f0-9]+:	66 0f b6 f0          	movzbw %al,%si
 [ 	]*[a-f0-9]+:	0f b6 f0             	movzbl %al,%esi
 [ 	]*[a-f0-9]+:	0f b7 f0             	movzwl %ax,%esi
-[ 	]*[a-f0-9]+:	0f b6 10             	movzbl \(%eax\),%edx
-[ 	]*[a-f0-9]+:	66 0f b6 10          	movzbw \(%eax\),%dx
+[ 	]*[a-f0-9]+:	66 0f b6 f0          	movzbw %al,%si
+[ 	]*[a-f0-9]+:	0f b6 f0             	movzbl %al,%esi
+[ 	]*[a-f0-9]+:	0f b7 f0             	movzwl %ax,%esi
 [ 	]*[a-f0-9]+:	66 0f b6 10          	movzbw \(%eax\),%dx
 [ 	]*[a-f0-9]+:	0f b6 10             	movzbl \(%eax\),%edx
 [ 	]*[a-f0-9]+:	0f b7 10             	movzwl \(%eax\),%edx
diff --git a/gas/testsuite/gas/i386/i386.exp b/gas/testsuite/gas/i386/i386.exp
index c4280417c5..40154f39c9 100644
--- a/gas/testsuite/gas/i386/i386.exp
+++ b/gas/testsuite/gas/i386/i386.exp
@@ -491,6 +491,7 @@ if [expr ([istarget "i*86-*-*"] ||  [istarget "x86_64-*-*"]) && [gas_32_check]]
     run_list_test "inval-pseudo" "-al"
     run_dump_test "nop-1"
     run_dump_test "nop-2"
+    run_list_test "movszx-inval" "-al"
     run_dump_test "optimize-1"
     run_dump_test "optimize-1a"
     run_dump_test "optimize-2"
@@ -1052,6 +1053,7 @@ if [expr ([istarget "i*86-*-*"] || [istarget "x86_64-*-*"]) && [gas_64_check]] t
     run_dump_test "x86-64-movd-intel"
     run_dump_test "x86-64-nop-1"
     run_dump_test "x86-64-nop-2"
+    run_list_test "x86-64-movszx-inval" "-al"
     run_dump_test "x86-64-movsxd"
     run_dump_test "x86-64-movsxd-intel"
     run_list_test "x86-64-movsxd-inval" "-al"
diff --git a/gas/testsuite/gas/i386/i386.s b/gas/testsuite/gas/i386/i386.s
index 7da361f5f8..590cf820a4 100644
--- a/gas/testsuite/gas/i386/i386.s
+++ b/gas/testsuite/gas/i386/i386.s
@@ -9,8 +9,9 @@
 	movsx	%al, %si
 	movsx	%al, %esi
 	movsx	%ax, %esi
-	movsx	(%eax), %edx
-	movsx	(%eax), %dx
+	movsxb	%al, %si
+	movsxb	%al, %esi
+	movsxw	%ax, %esi
 	movsxb	(%eax), %dx
 	movsxb	(%eax), %edx
 	movsxw	(%eax), %edx
@@ -21,8 +22,9 @@
 	movzx	%al, %si
 	movzx	%al, %esi
 	movzx	%ax, %esi
-	movzx	(%eax), %edx
-	movzx	(%eax), %dx
+	movzxb	%al, %si
+	movzxb	%al, %esi
+	movzxw	%ax, %esi
 	movzxb	(%eax), %dx
 	movzxb	(%eax), %edx
 	movzxw	(%eax), %edx
diff --git a/gas/testsuite/gas/i386/iamcu-1.d b/gas/testsuite/gas/i386/iamcu-1.d
index 2b1df5de4b..f5b0f0bd4d 100644
--- a/gas/testsuite/gas/i386/iamcu-1.d
+++ b/gas/testsuite/gas/i386/iamcu-1.d
@@ -10,8 +10,9 @@ Disassembly of section .text:
 [ 	]*[a-f0-9]+:	66 0f be f0          	movsbw %al,%si
 [ 	]*[a-f0-9]+:	0f be f0             	movsbl %al,%esi
 [ 	]*[a-f0-9]+:	0f bf f0             	movswl %ax,%esi
-[ 	]*[a-f0-9]+:	0f be 10             	movsbl \(%eax\),%edx
-[ 	]*[a-f0-9]+:	66 0f be 10          	movsbw \(%eax\),%dx
+[ 	]*[a-f0-9]+:	66 0f be f0          	movsbw %al,%si
+[ 	]*[a-f0-9]+:	0f be f0             	movsbl %al,%esi
+[ 	]*[a-f0-9]+:	0f bf f0             	movswl %ax,%esi
 [ 	]*[a-f0-9]+:	66 0f be 10          	movsbw \(%eax\),%dx
 [ 	]*[a-f0-9]+:	0f be 10             	movsbl \(%eax\),%edx
 [ 	]*[a-f0-9]+:	0f bf 10             	movswl \(%eax\),%edx
@@ -21,8 +22,9 @@ Disassembly of section .text:
 [ 	]*[a-f0-9]+:	66 0f b6 f0          	movzbw %al,%si
 [ 	]*[a-f0-9]+:	0f b6 f0             	movzbl %al,%esi
 [ 	]*[a-f0-9]+:	0f b7 f0             	movzwl %ax,%esi
-[ 	]*[a-f0-9]+:	0f b6 10             	movzbl \(%eax\),%edx
-[ 	]*[a-f0-9]+:	66 0f b6 10          	movzbw \(%eax\),%dx
+[ 	]*[a-f0-9]+:	66 0f b6 f0          	movzbw %al,%si
+[ 	]*[a-f0-9]+:	0f b6 f0             	movzbl %al,%esi
+[ 	]*[a-f0-9]+:	0f b7 f0             	movzwl %ax,%esi
 [ 	]*[a-f0-9]+:	66 0f b6 10          	movzbw \(%eax\),%dx
 [ 	]*[a-f0-9]+:	0f b6 10             	movzbl \(%eax\),%edx
 [ 	]*[a-f0-9]+:	0f b7 10             	movzwl \(%eax\),%edx
diff --git a/gas/testsuite/gas/i386/iamcu-1.s b/gas/testsuite/gas/i386/iamcu-1.s
index b631dfa17e..df9874ba85 100644
--- a/gas/testsuite/gas/i386/iamcu-1.s
+++ b/gas/testsuite/gas/i386/iamcu-1.s
@@ -4,8 +4,9 @@
 	movsx	%al, %si
 	movsx	%al, %esi
 	movsx	%ax, %esi
-	movsx	(%eax), %edx
-	movsx	(%eax), %dx
+	movsxb	%al, %si
+	movsxb	%al, %esi
+	movsxw	%ax, %esi
 	movsxb	(%eax), %dx
 	movsxb	(%eax), %edx
 	movsxw	(%eax), %edx
@@ -16,8 +17,9 @@
 	movzx	%al, %si
 	movzx	%al, %esi
 	movzx	%ax, %esi
-	movzx	(%eax), %edx
-	movzx	(%eax), %dx
+	movzxb	%al, %si
+	movzxb	%al, %esi
+	movzxw	%ax, %esi
 	movzxb	(%eax), %dx
 	movzxb	(%eax), %edx
 	movzxw	(%eax), %edx
diff --git a/gas/testsuite/gas/i386/ilp32/x86-64.d b/gas/testsuite/gas/i386/ilp32/x86-64.d
index 33722c90f9..745f8c2094 100644
--- a/gas/testsuite/gas/i386/ilp32/x86-64.d
+++ b/gas/testsuite/gas/i386/ilp32/x86-64.d
@@ -162,9 +162,12 @@ Disassembly of section .text:
 [ 	]*[a-f0-9]+:	0f bf f0             	movswl %ax,%esi
 [ 	]*[a-f0-9]+:	48 0f bf f0          	movswq %ax,%rsi
 [ 	]*[a-f0-9]+:	48 63 f0             	movslq %eax,%rsi
-[ 	]*[a-f0-9]+:	0f be 10             	movsbl \(%rax\),%edx
-[ 	]*[a-f0-9]+:	48 0f be 10          	movsbq \(%rax\),%rdx
-[ 	]*[a-f0-9]+:	66 0f be 10          	movsbw \(%rax\),%dx
+[ 	]*[a-f0-9]+:	66 0f be f0          	movsbw %al,%si
+[ 	]*[a-f0-9]+:	0f be f0             	movsbl %al,%esi
+[ 	]*[a-f0-9]+:	48 0f be f0          	movsbq %al,%rsi
+[ 	]*[a-f0-9]+:	0f bf f0             	movswl %ax,%esi
+[ 	]*[a-f0-9]+:	48 0f bf f0          	movswq %ax,%rsi
+[ 	]*[a-f0-9]+:	48 63 f0             	movslq %eax,%rsi
 [ 	]*[a-f0-9]+:	0f be 10             	movsbl \(%rax\),%edx
 [ 	]*[a-f0-9]+:	48 0f be 10          	movsbq \(%rax\),%rdx
 [ 	]*[a-f0-9]+:	66 0f be 10          	movsbw \(%rax\),%dx
@@ -175,9 +178,11 @@ Disassembly of section .text:
 [ 	]*[a-f0-9]+:	48 0f b6 f0          	movzbq %al,%rsi
 [ 	]*[a-f0-9]+:	0f b7 f0             	movzwl %ax,%esi
 [ 	]*[a-f0-9]+:	48 0f b7 f0          	movzwq %ax,%rsi
-[ 	]*[a-f0-9]+:	0f b6 10             	movzbl \(%rax\),%edx
-[ 	]*[a-f0-9]+:	48 0f b6 10          	movzbq \(%rax\),%rdx
-[ 	]*[a-f0-9]+:	66 0f b6 10          	movzbw \(%rax\),%dx
+[ 	]*[a-f0-9]+:	66 0f b6 f0          	movzbw %al,%si
+[ 	]*[a-f0-9]+:	0f b6 f0             	movzbl %al,%esi
+[ 	]*[a-f0-9]+:	48 0f b6 f0          	movzbq %al,%rsi
+[ 	]*[a-f0-9]+:	0f b7 f0             	movzwl %ax,%esi
+[ 	]*[a-f0-9]+:	48 0f b7 f0          	movzwq %ax,%rsi
 [ 	]*[a-f0-9]+:	0f b6 10             	movzbl \(%rax\),%edx
 [ 	]*[a-f0-9]+:	48 0f b6 10          	movzbq \(%rax\),%rdx
 [ 	]*[a-f0-9]+:	66 0f b6 10          	movzbw \(%rax\),%dx
@@ -219,9 +224,6 @@ Disassembly of section .text:
 [ 	]*[a-f0-9]+:	df e0                	fnstsw %ax
 [ 	]*[a-f0-9]+:	9b df e0             	fstsw  %ax
 [ 	]*[a-f0-9]+:	9b df e0             	fstsw  %ax
-[ 	]*[a-f0-9]+:	66 0f be 00          	movsbw \(%rax\),%ax
-[ 	]*[a-f0-9]+:	0f be 00             	movsbl \(%rax\),%eax
-[ 	]*[a-f0-9]+:	48 0f be 00          	movsbq \(%rax\),%rax
 [ 	]*[a-f0-9]+:	66 0f be 10          	movsbw \(%rax\),%dx
 [ 	]*[a-f0-9]+:	0f be 10             	movsbl \(%rax\),%edx
 [ 	]*[a-f0-9]+:	48 0f be 10          	movsbq \(%rax\),%rdx
@@ -229,9 +231,6 @@ Disassembly of section .text:
 [ 	]*[a-f0-9]+:	48 0f bf 10          	movswq \(%rax\),%rdx
 [ 	]*[a-f0-9]+:	48 63 10             	movslq \(%rax\),%rdx
 [ 	]*[a-f0-9]+:	48 63 00             	movslq \(%rax\),%rax
-[ 	]*[a-f0-9]+:	66 0f b6 00          	movzbw \(%rax\),%ax
-[ 	]*[a-f0-9]+:	0f b6 00             	movzbl \(%rax\),%eax
-[ 	]*[a-f0-9]+:	48 0f b6 00          	movzbq \(%rax\),%rax
 [ 	]*[a-f0-9]+:	66 0f b6 10          	movzbw \(%rax\),%dx
 [ 	]*[a-f0-9]+:	0f b6 10             	movzbl \(%rax\),%edx
 [ 	]*[a-f0-9]+:	48 0f b6 10          	movzbq \(%rax\),%rdx
diff --git a/gas/testsuite/gas/i386/ilp32/x86-64.s b/gas/testsuite/gas/i386/ilp32/x86-64.s
index d1f7ae3b49..c7d7ef2e5b 100644
--- a/gas/testsuite/gas/i386/ilp32/x86-64.s
+++ b/gas/testsuite/gas/i386/ilp32/x86-64.s
@@ -194,9 +194,12 @@ cmpxchg16b oword ptr [rax]
 	movsx	%ax, %esi
 	movsx	%ax, %rsi
 	movsx	%eax, %rsi
-	movsx	(%rax), %edx
-	movsx	(%rax), %rdx
-	movsx	(%rax), %dx
+	movsxb	%al, %si
+	movsxb	%al, %esi
+	movsxb	%al, %rsi
+	movsxw	%ax, %esi
+	movsxw	%ax, %rsi
+	movsxl	%eax, %rsi
 	movsbl	(%rax), %edx
 	movsbq	(%rax), %rdx
 	movsbw	(%rax), %dx
@@ -208,9 +211,11 @@ cmpxchg16b oword ptr [rax]
 	movzx	%al, %rsi
 	movzx	%ax, %esi
 	movzx	%ax, %rsi
-	movzx	(%rax), %edx
-	movzx	(%rax), %rdx
-	movzx	(%rax), %dx
+	movzxb	%al, %si
+	movzxb	%al, %esi
+	movzxb	%al, %rsi
+	movzxw	%ax, %esi
+	movzxw	%ax, %rsi
 	movzb	(%rax), %edx
 	movzb	(%rax), %rdx
 	movzb	(%rax), %dx
@@ -262,9 +267,6 @@ cmpxchg16b oword ptr [rax]
 	fstsw	ax
 
 .att_syntax
-movsx (%rax),%ax
-movsx (%rax),%eax
-movsx (%rax),%rax
 movsxb	(%rax), %dx
 movsxb	(%rax), %edx
 movsxb	(%rax), %rdx
@@ -272,9 +274,6 @@ movsxw	(%rax), %edx
 movsxw	(%rax), %rdx
 movsxl	(%rax), %rdx
 movsxd (%rax),%rax
-movzx (%rax),%ax
-movzx (%rax),%eax
-movzx (%rax),%rax
 movzxb	(%rax), %dx
 movzxb	(%rax), %edx
 movzxb	(%rax), %rdx
diff --git a/gas/testsuite/gas/i386/k1om.d b/gas/testsuite/gas/i386/k1om.d
index 7767f5b418..7995803ce1 100644
--- a/gas/testsuite/gas/i386/k1om.d
+++ b/gas/testsuite/gas/i386/k1om.d
@@ -175,9 +175,12 @@ Disassembly of section .text:
 [ 	]*[a-f0-9]+:	0f bf f0             	movswl %ax,%esi
 [ 	]*[a-f0-9]+:	48 0f bf f0          	movswq %ax,%rsi
 [ 	]*[a-f0-9]+:	48 63 f0             	movslq %eax,%rsi
-[ 	]*[a-f0-9]+:	0f be 10             	movsbl \(%rax\),%edx
-[ 	]*[a-f0-9]+:	48 0f be 10          	movsbq \(%rax\),%rdx
-[ 	]*[a-f0-9]+:	66 0f be 10          	movsbw \(%rax\),%dx
+[ 	]*[a-f0-9]+:	66 0f be f0          	movsbw %al,%si
+[ 	]*[a-f0-9]+:	0f be f0             	movsbl %al,%esi
+[ 	]*[a-f0-9]+:	48 0f be f0          	movsbq %al,%rsi
+[ 	]*[a-f0-9]+:	0f bf f0             	movswl %ax,%esi
+[ 	]*[a-f0-9]+:	48 0f bf f0          	movswq %ax,%rsi
+[ 	]*[a-f0-9]+:	48 63 f0             	movslq %eax,%rsi
 [ 	]*[a-f0-9]+:	0f be 10             	movsbl \(%rax\),%edx
 [ 	]*[a-f0-9]+:	48 0f be 10          	movsbq \(%rax\),%rdx
 [ 	]*[a-f0-9]+:	66 0f be 10          	movsbw \(%rax\),%dx
@@ -188,9 +191,11 @@ Disassembly of section .text:
 [ 	]*[a-f0-9]+:	48 0f b6 f0          	movzbq %al,%rsi
 [ 	]*[a-f0-9]+:	0f b7 f0             	movzwl %ax,%esi
 [ 	]*[a-f0-9]+:	48 0f b7 f0          	movzwq %ax,%rsi
-[ 	]*[a-f0-9]+:	0f b6 10             	movzbl \(%rax\),%edx
-[ 	]*[a-f0-9]+:	48 0f b6 10          	movzbq \(%rax\),%rdx
-[ 	]*[a-f0-9]+:	66 0f b6 10          	movzbw \(%rax\),%dx
+[ 	]*[a-f0-9]+:	66 0f b6 f0          	movzbw %al,%si
+[ 	]*[a-f0-9]+:	0f b6 f0             	movzbl %al,%esi
+[ 	]*[a-f0-9]+:	48 0f b6 f0          	movzbq %al,%rsi
+[ 	]*[a-f0-9]+:	0f b7 f0             	movzwl %ax,%esi
+[ 	]*[a-f0-9]+:	48 0f b7 f0          	movzwq %ax,%rsi
 [ 	]*[a-f0-9]+:	0f b6 10             	movzbl \(%rax\),%edx
 [ 	]*[a-f0-9]+:	48 0f b6 10          	movzbq \(%rax\),%rdx
 [ 	]*[a-f0-9]+:	66 0f b6 10          	movzbw \(%rax\),%dx
@@ -232,9 +237,6 @@ Disassembly of section .text:
 [ 	]*[a-f0-9]+:	df e0                	fnstsw %ax
 [ 	]*[a-f0-9]+:	9b df e0             	fstsw  %ax
 [ 	]*[a-f0-9]+:	9b df e0             	fstsw  %ax
-[ 	]*[a-f0-9]+:	66 0f be 00          	movsbw \(%rax\),%ax
-[ 	]*[a-f0-9]+:	0f be 00             	movsbl \(%rax\),%eax
-[ 	]*[a-f0-9]+:	48 0f be 00          	movsbq \(%rax\),%rax
 [ 	]*[a-f0-9]+:	66 0f be 10          	movsbw \(%rax\),%dx
 [ 	]*[a-f0-9]+:	0f be 10             	movsbl \(%rax\),%edx
 [ 	]*[a-f0-9]+:	48 0f be 10          	movsbq \(%rax\),%rdx
@@ -242,9 +244,6 @@ Disassembly of section .text:
 [ 	]*[a-f0-9]+:	48 0f bf 10          	movswq \(%rax\),%rdx
 [ 	]*[a-f0-9]+:	48 63 10             	movslq \(%rax\),%rdx
 [ 	]*[a-f0-9]+:	48 63 00             	movslq \(%rax\),%rax
-[ 	]*[a-f0-9]+:	66 0f b6 00          	movzbw \(%rax\),%ax
-[ 	]*[a-f0-9]+:	0f b6 00             	movzbl \(%rax\),%eax
-[ 	]*[a-f0-9]+:	48 0f b6 00          	movzbq \(%rax\),%rax
 [ 	]*[a-f0-9]+:	66 0f b6 10          	movzbw \(%rax\),%dx
 [ 	]*[a-f0-9]+:	0f b6 10             	movzbl \(%rax\),%edx
 [ 	]*[a-f0-9]+:	48 0f b6 10          	movzbq \(%rax\),%rdx
diff --git a/gas/testsuite/gas/i386/l1om.d b/gas/testsuite/gas/i386/l1om.d
index 858d1827f9..95d9823e8a 100644
--- a/gas/testsuite/gas/i386/l1om.d
+++ b/gas/testsuite/gas/i386/l1om.d
@@ -175,9 +175,12 @@ Disassembly of section .text:
 [ 	]*[a-f0-9]+:	0f bf f0             	movswl %ax,%esi
 [ 	]*[a-f0-9]+:	48 0f bf f0          	movswq %ax,%rsi
 [ 	]*[a-f0-9]+:	48 63 f0             	movslq %eax,%rsi
-[ 	]*[a-f0-9]+:	0f be 10             	movsbl \(%rax\),%edx
-[ 	]*[a-f0-9]+:	48 0f be 10          	movsbq \(%rax\),%rdx
-[ 	]*[a-f0-9]+:	66 0f be 10          	movsbw \(%rax\),%dx
+[ 	]*[a-f0-9]+:	66 0f be f0          	movsbw %al,%si
+[ 	]*[a-f0-9]+:	0f be f0             	movsbl %al,%esi
+[ 	]*[a-f0-9]+:	48 0f be f0          	movsbq %al,%rsi
+[ 	]*[a-f0-9]+:	0f bf f0             	movswl %ax,%esi
+[ 	]*[a-f0-9]+:	48 0f bf f0          	movswq %ax,%rsi
+[ 	]*[a-f0-9]+:	48 63 f0             	movslq %eax,%rsi
 [ 	]*[a-f0-9]+:	0f be 10             	movsbl \(%rax\),%edx
 [ 	]*[a-f0-9]+:	48 0f be 10          	movsbq \(%rax\),%rdx
 [ 	]*[a-f0-9]+:	66 0f be 10          	movsbw \(%rax\),%dx
@@ -188,9 +191,11 @@ Disassembly of section .text:
 [ 	]*[a-f0-9]+:	48 0f b6 f0          	movzbq %al,%rsi
 [ 	]*[a-f0-9]+:	0f b7 f0             	movzwl %ax,%esi
 [ 	]*[a-f0-9]+:	48 0f b7 f0          	movzwq %ax,%rsi
-[ 	]*[a-f0-9]+:	0f b6 10             	movzbl \(%rax\),%edx
-[ 	]*[a-f0-9]+:	48 0f b6 10          	movzbq \(%rax\),%rdx
-[ 	]*[a-f0-9]+:	66 0f b6 10          	movzbw \(%rax\),%dx
+[ 	]*[a-f0-9]+:	66 0f b6 f0          	movzbw %al,%si
+[ 	]*[a-f0-9]+:	0f b6 f0             	movzbl %al,%esi
+[ 	]*[a-f0-9]+:	48 0f b6 f0          	movzbq %al,%rsi
+[ 	]*[a-f0-9]+:	0f b7 f0             	movzwl %ax,%esi
+[ 	]*[a-f0-9]+:	48 0f b7 f0          	movzwq %ax,%rsi
 [ 	]*[a-f0-9]+:	0f b6 10             	movzbl \(%rax\),%edx
 [ 	]*[a-f0-9]+:	48 0f b6 10          	movzbq \(%rax\),%rdx
 [ 	]*[a-f0-9]+:	66 0f b6 10          	movzbw \(%rax\),%dx
@@ -232,9 +237,6 @@ Disassembly of section .text:
 [ 	]*[a-f0-9]+:	df e0                	fnstsw %ax
 [ 	]*[a-f0-9]+:	9b df e0             	fstsw  %ax
 [ 	]*[a-f0-9]+:	9b df e0             	fstsw  %ax
-[ 	]*[a-f0-9]+:	66 0f be 00          	movsbw \(%rax\),%ax
-[ 	]*[a-f0-9]+:	0f be 00             	movsbl \(%rax\),%eax
-[ 	]*[a-f0-9]+:	48 0f be 00          	movsbq \(%rax\),%rax
 [ 	]*[a-f0-9]+:	66 0f be 10          	movsbw \(%rax\),%dx
 [ 	]*[a-f0-9]+:	0f be 10             	movsbl \(%rax\),%edx
 [ 	]*[a-f0-9]+:	48 0f be 10          	movsbq \(%rax\),%rdx
@@ -242,9 +244,6 @@ Disassembly of section .text:
 [ 	]*[a-f0-9]+:	48 0f bf 10          	movswq \(%rax\),%rdx
 [ 	]*[a-f0-9]+:	48 63 10             	movslq \(%rax\),%rdx
 [ 	]*[a-f0-9]+:	48 63 00             	movslq \(%rax\),%rax
-[ 	]*[a-f0-9]+:	66 0f b6 00          	movzbw \(%rax\),%ax
-[ 	]*[a-f0-9]+:	0f b6 00             	movzbl \(%rax\),%eax
-[ 	]*[a-f0-9]+:	48 0f b6 00          	movzbq \(%rax\),%rax
 [ 	]*[a-f0-9]+:	66 0f b6 10          	movzbw \(%rax\),%dx
 [ 	]*[a-f0-9]+:	0f b6 10             	movzbl \(%rax\),%edx
 [ 	]*[a-f0-9]+:	48 0f b6 10          	movzbq \(%rax\),%rdx
diff --git a/gas/testsuite/gas/i386/movszx-inval.l b/gas/testsuite/gas/i386/movszx-inval.l
new file mode 100644
index 0000000000..10c2803729
--- /dev/null
+++ b/gas/testsuite/gas/i386/movszx-inval.l
@@ -0,0 +1,29 @@
+.*: Assembler messages:
+.*:4: Error: .*
+.*:5: Error: .*
+.*:6: Error: .*
+.*:7: Error: .*
+.*:10: Error: .*
+.*:11: Error: .*
+.*:12: Error: .*
+.*:13: Error: .*
+.*:14: Error: .*
+.*:15: Error: .*
+GAS LISTING .*
+
+
+[ 	]*1[ 	]+\# Invalid 32-bit movsx and movzx\.
+[ 	]*2[ 	]+\.text
+[ 	]*3[ 	]+_start:
+[ 	]*4[ 	]+movsx	\(%eax\), %edx
+[ 	]*5[ 	]+movsx	\(%eax\), %dx
+[ 	]*6[ 	]+movzx	\(%eax\), %edx
+[ 	]*7[ 	]+movzx	\(%eax\), %dx
+[ 	]*8[ 	]+
+[ 	]*9[ 	]+\.intel_syntax noprefix
+[ 	]*10[ 	]+movsxb ax, BYTE PTR \[eax\]
+[ 	]*11[ 	]+movsxb eax, BYTE PTR \[eax\]
+[ 	]*12[ 	]+movsxw eax, WORD PTR \[eax\]
+[ 	]*13[ 	]+movzxb ax, BYTE PTR \[eax\]
+[ 	]*14[ 	]+movzxb eax, BYTE PTR \[eax\]
+[ 	]*15[ 	]+movzxw eax, WORD PTR \[eax\]
diff --git a/gas/testsuite/gas/i386/movszx-inval.s b/gas/testsuite/gas/i386/movszx-inval.s
new file mode 100644
index 0000000000..9a81d16e2c
--- /dev/null
+++ b/gas/testsuite/gas/i386/movszx-inval.s
@@ -0,0 +1,15 @@
+# Invalid 32-bit movsx and movzx.
+	.text
+_start:
+	movsx	(%eax), %edx
+	movsx	(%eax), %dx
+	movzx	(%eax), %edx
+	movzx	(%eax), %dx
+
+	.intel_syntax noprefix
+	movsxb ax, BYTE PTR [eax]
+	movsxb eax, BYTE PTR [eax]
+	movsxw eax, WORD PTR [eax]
+	movzxb ax, BYTE PTR [eax]
+	movzxb eax, BYTE PTR [eax]
+	movzxw eax, WORD PTR [eax]
diff --git a/gas/testsuite/gas/i386/x86-64-movszx-inval.l b/gas/testsuite/gas/i386/x86-64-movszx-inval.l
new file mode 100644
index 0000000000..08ff0bd1a4
--- /dev/null
+++ b/gas/testsuite/gas/i386/x86-64-movszx-inval.l
@@ -0,0 +1,41 @@
+.*: Assembler messages:
+.*:4: Error: .*
+.*:5: Error: .*
+.*:6: Error: .*
+.*:7: Error: .*
+.*:8: Error: .*
+.*:9: Error: .*
+.*:12: Error: .*
+.*:13: Error: .*
+.*:14: Error: .*
+.*:15: Error: .*
+.*:16: Error: .*
+.*:17: Error: .*
+.*:18: Error: .*
+.*:19: Error: .*
+.*:20: Error: .*
+.*:21: Error: .*
+GAS LISTING .*
+
+
+[ 	]*1[ 	]+\# Invalid 64-bit movsx and movzx\.
+[ 	]*2[ 	]+\.text
+[ 	]*3[ 	]+_start:
+[ 	]*4[ 	]+movsx	\(%rax\), %rdx
+[ 	]*5[ 	]+movsx	\(%rax\), %edx
+[ 	]*6[ 	]+movsx	\(%rax\), %dx
+[ 	]*7[ 	]+movzx	\(%rax\), %rdx
+[ 	]*8[ 	]+movzx	\(%rax\), %edx
+[ 	]*9[ 	]+movzx	\(%rax\), %dx
+[ 	]*10[ 	]+
+[ 	]*11[ 	]+\.intel_syntax noprefix
+[ 	]*12[ 	]+movsxb ax, BYTE PTR \[rax\]
+[ 	]*13[ 	]+movsxb eax, BYTE PTR \[rax\]
+[ 	]*14[ 	]+movsxb rax, BYTE PTR \[rax\]
+[ 	]*15[ 	]+movsxw eax, WORD PTR \[rax\]
+[ 	]*16[ 	]+movsxw rax, WORD PTR \[rax\]
+[ 	]*17[ 	]+movzxb ax, BYTE PTR \[rax\]
+[ 	]*18[ 	]+movzxb eax, BYTE PTR \[rax\]
+[ 	]*19[ 	]+movzxb rax, BYTE PTR \[rax\]
+[ 	]*20[ 	]+movzxw eax, WORD PTR \[rax\]
+[ 	]*21[ 	]+movzxw rax, WORD PTR \[rax\]
diff --git a/gas/testsuite/gas/i386/x86-64-movszx-inval.s b/gas/testsuite/gas/i386/x86-64-movszx-inval.s
new file mode 100644
index 0000000000..c74f64a1f2
--- /dev/null
+++ b/gas/testsuite/gas/i386/x86-64-movszx-inval.s
@@ -0,0 +1,21 @@
+# Invalid 64-bit movsx and movzx.
+	.text
+_start:
+	movsx	(%rax), %rdx
+	movsx	(%rax), %edx
+	movsx	(%rax), %dx
+	movzx	(%rax), %rdx
+	movzx	(%rax), %edx
+	movzx	(%rax), %dx
+
+	.intel_syntax noprefix
+	movsxb ax, BYTE PTR [rax]
+	movsxb eax, BYTE PTR [rax]
+	movsxb rax, BYTE PTR [rax]
+	movsxw eax, WORD PTR [rax]
+	movsxw rax, WORD PTR [rax]
+	movzxb ax, BYTE PTR [rax]
+	movzxb eax, BYTE PTR [rax]
+	movzxb rax, BYTE PTR [rax]
+	movzxw eax, WORD PTR [rax]
+	movzxw rax, WORD PTR [rax]
diff --git a/gas/testsuite/gas/i386/x86_64-intel.d b/gas/testsuite/gas/i386/x86_64-intel.d
index 8dd8893e79..6e9e3a070f 100644
--- a/gas/testsuite/gas/i386/x86_64-intel.d
+++ b/gas/testsuite/gas/i386/x86_64-intel.d
@@ -173,9 +173,12 @@ Disassembly of section .text:
 [ 	]*[a-f0-9]+:	0f bf f0             	movsx  esi,ax
 [ 	]*[a-f0-9]+:	48 0f bf f0          	movsx  rsi,ax
 [ 	]*[a-f0-9]+:	48 63 f0             	movsxd rsi,eax
-[ 	]*[a-f0-9]+:	0f be 10             	movsx  edx,BYTE PTR \[rax\]
-[ 	]*[a-f0-9]+:	48 0f be 10          	movsx  rdx,BYTE PTR \[rax\]
-[ 	]*[a-f0-9]+:	66 0f be 10          	movsx  dx,BYTE PTR \[rax\]
+[ 	]*[a-f0-9]+:	66 0f be f0          	movsx  si,al
+[ 	]*[a-f0-9]+:	0f be f0             	movsx  esi,al
+[ 	]*[a-f0-9]+:	48 0f be f0          	movsx  rsi,al
+[ 	]*[a-f0-9]+:	0f bf f0             	movsx  esi,ax
+[ 	]*[a-f0-9]+:	48 0f bf f0          	movsx  rsi,ax
+[ 	]*[a-f0-9]+:	48 63 f0             	movsxd rsi,eax
 [ 	]*[a-f0-9]+:	0f be 10             	movsx  edx,BYTE PTR \[rax\]
 [ 	]*[a-f0-9]+:	48 0f be 10          	movsx  rdx,BYTE PTR \[rax\]
 [ 	]*[a-f0-9]+:	66 0f be 10          	movsx  dx,BYTE PTR \[rax\]
@@ -186,9 +189,11 @@ Disassembly of section .text:
 [ 	]*[a-f0-9]+:	48 0f b6 f0          	movzx  rsi,al
 [ 	]*[a-f0-9]+:	0f b7 f0             	movzx  esi,ax
 [ 	]*[a-f0-9]+:	48 0f b7 f0          	movzx  rsi,ax
-[ 	]*[a-f0-9]+:	0f b6 10             	movzx  edx,BYTE PTR \[rax\]
-[ 	]*[a-f0-9]+:	48 0f b6 10          	movzx  rdx,BYTE PTR \[rax\]
-[ 	]*[a-f0-9]+:	66 0f b6 10          	movzx  dx,BYTE PTR \[rax\]
+[ 	]*[a-f0-9]+:	66 0f b6 f0          	movzx  si,al
+[ 	]*[a-f0-9]+:	0f b6 f0             	movzx  esi,al
+[ 	]*[a-f0-9]+:	48 0f b6 f0          	movzx  rsi,al
+[ 	]*[a-f0-9]+:	0f b7 f0             	movzx  esi,ax
+[ 	]*[a-f0-9]+:	48 0f b7 f0          	movzx  rsi,ax
 [ 	]*[a-f0-9]+:	0f b6 10             	movzx  edx,BYTE PTR \[rax\]
 [ 	]*[a-f0-9]+:	48 0f b6 10          	movzx  rdx,BYTE PTR \[rax\]
 [ 	]*[a-f0-9]+:	66 0f b6 10          	movzx  dx,BYTE PTR \[rax\]
@@ -230,9 +235,6 @@ Disassembly of section .text:
 [ 	]*[a-f0-9]+:	df e0                	fnstsw ax
 [ 	]*[a-f0-9]+:	9b df e0             	fstsw  ax
 [ 	]*[a-f0-9]+:	9b df e0             	fstsw  ax
-[ 	]*[a-f0-9]+:	66 0f be 00          	movsx  ax,BYTE PTR \[rax\]
-[ 	]*[a-f0-9]+:	0f be 00             	movsx  eax,BYTE PTR \[rax\]
-[ 	]*[a-f0-9]+:	48 0f be 00          	movsx  rax,BYTE PTR \[rax\]
 [ 	]*[a-f0-9]+:	66 0f be 10          	movsx  dx,BYTE PTR \[rax\]
 [ 	]*[a-f0-9]+:	0f be 10             	movsx  edx,BYTE PTR \[rax\]
 [ 	]*[a-f0-9]+:	48 0f be 10          	movsx  rdx,BYTE PTR \[rax\]
@@ -240,9 +242,6 @@ Disassembly of section .text:
 [ 	]*[a-f0-9]+:	48 0f bf 10          	movsx  rdx,WORD PTR \[rax\]
 [ 	]*[a-f0-9]+:	48 63 10             	movsxd rdx,DWORD PTR \[rax\]
 [ 	]*[a-f0-9]+:	48 63 00             	movsxd rax,DWORD PTR \[rax\]
-[ 	]*[a-f0-9]+:	66 0f b6 00          	movzx  ax,BYTE PTR \[rax\]
-[ 	]*[a-f0-9]+:	0f b6 00             	movzx  eax,BYTE PTR \[rax\]
-[ 	]*[a-f0-9]+:	48 0f b6 00          	movzx  rax,BYTE PTR \[rax\]
 [ 	]*[a-f0-9]+:	66 0f b6 10          	movzx  dx,BYTE PTR \[rax\]
 [ 	]*[a-f0-9]+:	0f b6 10             	movzx  edx,BYTE PTR \[rax\]
 [ 	]*[a-f0-9]+:	48 0f b6 10          	movzx  rdx,BYTE PTR \[rax\]
diff --git a/gas/testsuite/gas/i386/x86_64.d b/gas/testsuite/gas/i386/x86_64.d
index 0bdbc79021..8c980fe3cf 100644
--- a/gas/testsuite/gas/i386/x86_64.d
+++ b/gas/testsuite/gas/i386/x86_64.d
@@ -173,9 +173,12 @@ Disassembly of section .text:
 [ 	]*[a-f0-9]+:	0f bf f0             	movswl %ax,%esi
 [ 	]*[a-f0-9]+:	48 0f bf f0          	movswq %ax,%rsi
 [ 	]*[a-f0-9]+:	48 63 f0             	movslq %eax,%rsi
-[ 	]*[a-f0-9]+:	0f be 10             	movsbl \(%rax\),%edx
-[ 	]*[a-f0-9]+:	48 0f be 10          	movsbq \(%rax\),%rdx
-[ 	]*[a-f0-9]+:	66 0f be 10          	movsbw \(%rax\),%dx
+[ 	]*[a-f0-9]+:	66 0f be f0          	movsbw %al,%si
+[ 	]*[a-f0-9]+:	0f be f0             	movsbl %al,%esi
+[ 	]*[a-f0-9]+:	48 0f be f0          	movsbq %al,%rsi
+[ 	]*[a-f0-9]+:	0f bf f0             	movswl %ax,%esi
+[ 	]*[a-f0-9]+:	48 0f bf f0          	movswq %ax,%rsi
+[ 	]*[a-f0-9]+:	48 63 f0             	movslq %eax,%rsi
 [ 	]*[a-f0-9]+:	0f be 10             	movsbl \(%rax\),%edx
 [ 	]*[a-f0-9]+:	48 0f be 10          	movsbq \(%rax\),%rdx
 [ 	]*[a-f0-9]+:	66 0f be 10          	movsbw \(%rax\),%dx
@@ -186,9 +189,11 @@ Disassembly of section .text:
 [ 	]*[a-f0-9]+:	48 0f b6 f0          	movzbq %al,%rsi
 [ 	]*[a-f0-9]+:	0f b7 f0             	movzwl %ax,%esi
 [ 	]*[a-f0-9]+:	48 0f b7 f0          	movzwq %ax,%rsi
-[ 	]*[a-f0-9]+:	0f b6 10             	movzbl \(%rax\),%edx
-[ 	]*[a-f0-9]+:	48 0f b6 10          	movzbq \(%rax\),%rdx
-[ 	]*[a-f0-9]+:	66 0f b6 10          	movzbw \(%rax\),%dx
+[ 	]*[a-f0-9]+:	66 0f b6 f0          	movzbw %al,%si
+[ 	]*[a-f0-9]+:	0f b6 f0             	movzbl %al,%esi
+[ 	]*[a-f0-9]+:	48 0f b6 f0          	movzbq %al,%rsi
+[ 	]*[a-f0-9]+:	0f b7 f0             	movzwl %ax,%esi
+[ 	]*[a-f0-9]+:	48 0f b7 f0          	movzwq %ax,%rsi
 [ 	]*[a-f0-9]+:	0f b6 10             	movzbl \(%rax\),%edx
 [ 	]*[a-f0-9]+:	48 0f b6 10          	movzbq \(%rax\),%rdx
 [ 	]*[a-f0-9]+:	66 0f b6 10          	movzbw \(%rax\),%dx
@@ -230,9 +235,6 @@ Disassembly of section .text:
 [ 	]*[a-f0-9]+:	df e0                	fnstsw %ax
 [ 	]*[a-f0-9]+:	9b df e0             	fstsw  %ax
 [ 	]*[a-f0-9]+:	9b df e0             	fstsw  %ax
-[ 	]*[a-f0-9]+:	66 0f be 00          	movsbw \(%rax\),%ax
-[ 	]*[a-f0-9]+:	0f be 00             	movsbl \(%rax\),%eax
-[ 	]*[a-f0-9]+:	48 0f be 00          	movsbq \(%rax\),%rax
 [ 	]*[a-f0-9]+:	66 0f be 10          	movsbw \(%rax\),%dx
 [ 	]*[a-f0-9]+:	0f be 10             	movsbl \(%rax\),%edx
 [ 	]*[a-f0-9]+:	48 0f be 10          	movsbq \(%rax\),%rdx
@@ -240,9 +242,6 @@ Disassembly of section .text:
 [ 	]*[a-f0-9]+:	48 0f bf 10          	movswq \(%rax\),%rdx
 [ 	]*[a-f0-9]+:	48 63 10             	movslq \(%rax\),%rdx
 [ 	]*[a-f0-9]+:	48 63 00             	movslq \(%rax\),%rax
-[ 	]*[a-f0-9]+:	66 0f b6 00          	movzbw \(%rax\),%ax
-[ 	]*[a-f0-9]+:	0f b6 00             	movzbl \(%rax\),%eax
-[ 	]*[a-f0-9]+:	48 0f b6 00          	movzbq \(%rax\),%rax
 [ 	]*[a-f0-9]+:	66 0f b6 10          	movzbw \(%rax\),%dx
 [ 	]*[a-f0-9]+:	0f b6 10             	movzbl \(%rax\),%edx
 [ 	]*[a-f0-9]+:	48 0f b6 10          	movzbq \(%rax\),%rdx
diff --git a/gas/testsuite/gas/i386/x86_64.s b/gas/testsuite/gas/i386/x86_64.s
index 377580be34..45c9825869 100644
--- a/gas/testsuite/gas/i386/x86_64.s
+++ b/gas/testsuite/gas/i386/x86_64.s
@@ -208,9 +208,12 @@ cmpxchg16b oword ptr [rax]
 	movsx	%ax, %esi
 	movsx	%ax, %rsi
 	movsx	%eax, %rsi
-	movsx	(%rax), %edx
-	movsx	(%rax), %rdx
-	movsx	(%rax), %dx
+	movsxb	%al, %si
+	movsxb	%al, %esi
+	movsxb	%al, %rsi
+	movsxw	%ax, %esi
+	movsxw	%ax, %rsi
+	movsxl	%eax, %rsi
 	movsbl	(%rax), %edx
 	movsbq	(%rax), %rdx
 	movsbw	(%rax), %dx
@@ -222,9 +225,11 @@ cmpxchg16b oword ptr [rax]
 	movzx	%al, %rsi
 	movzx	%ax, %esi
 	movzx	%ax, %rsi
-	movzx	(%rax), %edx
-	movzx	(%rax), %rdx
-	movzx	(%rax), %dx
+	movzxb	%al, %si
+	movzxb	%al, %esi
+	movzxb	%al, %rsi
+	movzxw	%ax, %esi
+	movzxw	%ax, %rsi
 	movzb	(%rax), %edx
 	movzb	(%rax), %rdx
 	movzb	(%rax), %dx
@@ -276,9 +281,6 @@ cmpxchg16b oword ptr [rax]
 	fstsw	ax
 
 .att_syntax
-movsx (%rax),%ax
-movsx (%rax),%eax
-movsx (%rax),%rax
 movsxb	(%rax), %dx
 movsxb	(%rax), %edx
 movsxb	(%rax), %rdx
@@ -286,9 +288,6 @@ movsxw	(%rax), %edx
 movsxw	(%rax), %rdx
 movsxl	(%rax), %rdx
 movsxd (%rax),%rax
-movzx (%rax),%ax
-movzx (%rax),%eax
-movzx (%rax),%rax
 movzxb	(%rax), %dx
 movzxb	(%rax), %edx
 movzxb	(%rax), %rdx
diff --git a/opcodes/i386-opc.tbl b/opcodes/i386-opc.tbl
index d805e6916a..889d63fc2f 100644
--- a/opcodes/i386-opc.tbl
+++ b/opcodes/i386-opc.tbl
@@ -132,13 +132,16 @@ movswl, 2, 0xfbf, None, 2, Cpu386, Modrm|No_bSuf|No_wSuf|No_lSuf|No_sSuf|No_qSuf
 movsbq, 2, 0xfbe, None, 2, Cpu64, Modrm|No_bSuf|No_wSuf|No_lSuf|No_sSuf|No_qSuf|No_ldSuf|Rex64, { Reg8|Byte|Unspecified|BaseIndex, Reg64 }
 movswq, 2, 0xfbf, None, 2, Cpu64, Modrm|No_bSuf|No_wSuf|No_lSuf|No_sSuf|No_qSuf|No_ldSuf|Rex64, { Reg16|Word|Unspecified|BaseIndex, Reg64 }
 movslq, 2, 0x63, None, 1, Cpu64, Modrm|No_bSuf|No_wSuf|No_lSuf|No_sSuf|No_qSuf|No_ldSuf|Rex64, { Reg32|Dword|Unspecified|BaseIndex, Reg64 }
+movsx, 2, 0xfbe, None, 2, Cpu386, Modrm|No_bSuf|No_wSuf|No_lSuf|No_sSuf|No_qSuf|No_ldSuf|ATTSyntax, { Reg8, Reg16|Reg32|Reg64 }
+movsxb, 2, 0xfbe, None, 2, Cpu386, Modrm|No_bSuf|No_wSuf|No_lSuf|No_sSuf|No_qSuf|No_ldSuf|ATTSyntax, { Reg8|Unspecified|BaseIndex, Reg16|Reg32|Reg64 }
+movsx, 2, 0xfbf, None, 2, Cpu386, Modrm|No_bSuf|No_wSuf|No_lSuf|No_sSuf|No_qSuf|No_ldSuf|ATTSyntax, { Reg16, Reg32|Reg64 }
+movsxw, 2, 0xfbf, None, 2, Cpu386, Modrm|No_bSuf|No_wSuf|No_lSuf|No_sSuf|No_qSuf|No_ldSuf|ATTSyntax, { Reg16|Unspecified|BaseIndex, Reg32|Reg64 }
+movsx, 2, 0x63, None, 1, Cpu64, Modrm|No_bSuf|No_wSuf|No_lSuf|No_sSuf|No_qSuf|No_ldSuf|ATTSyntax, { Reg32, Reg64 }
+movsxl, 2, 0x63, None, 1, Cpu64, Modrm|No_bSuf|No_wSuf|No_lSuf|No_sSuf|No_qSuf|No_ldSuf|ATTSyntax, { Reg32|Unspecified|BaseIndex, Reg64 }
 // Intel Syntax next 3 insns
-movsx, 2, 0xfbe, None, 2, Cpu386, Modrm|No_wSuf|No_lSuf|No_sSuf|No_qSuf|No_ldSuf|ATTSyntax, { Reg8|Unspecified|BaseIndex, Reg16|Reg32|Reg64 }
-movsx, 2, 0xfbf, None, 2, Cpu386, Modrm|No_bSuf|No_lSuf|No_sSuf|No_qSuf|No_ldSuf|ATTSyntax, { Reg16|Unspecified|BaseIndex, Reg32|Reg64 }
-movsx, 2, 0x63, None, 1, Cpu64, Modrm|No_bSuf|No_wSuf|No_sSuf|No_qSuf|No_ldSuf|Rex64|ATTSyntax, { Reg32|Unspecified|BaseIndex, Reg64 }
-movsx, 2, 0xfbe, None, 2, Cpu386, Modrm|No_wSuf|No_lSuf|No_sSuf|No_qSuf|No_ldSuf|IntelSyntax, { Reg8|Byte|BaseIndex, Reg16|Reg32|Reg64 }
-movsx, 2, 0xfbf, None, 2, Cpu386, Modrm|No_bSuf|No_lSuf|No_sSuf|No_qSuf|No_ldSuf|IntelSyntax, { Reg16|Word|BaseIndex, Reg32|Reg64 }
-movsx, 2, 0x63, None, 1, Cpu64, Modrm|No_bSuf|No_wSuf|No_sSuf|No_qSuf|No_ldSuf|Rex64|IntelSyntax, { Reg32|Dword|BaseIndex, Reg64 }
+movsx, 2, 0xfbe, None, 2, Cpu386, Modrm|No_bSuf|No_wSuf|No_lSuf|No_sSuf|No_qSuf|No_ldSuf|IntelSyntax, { Reg8|Byte|BaseIndex, Reg16|Reg32|Reg64 }
+movsx, 2, 0xfbf, None, 2, Cpu386, Modrm|No_bSuf|No_wSuf|No_lSuf|No_sSuf|No_qSuf|No_ldSuf|IntelSyntax, { Reg16|Word|BaseIndex, Reg32|Reg64 }
+movsx, 2, 0x63, None, 1, Cpu64, Modrm|No_bSuf|No_wSuf|No_lSuf|No_sSuf|No_qSuf|No_ldSuf|Rex64|IntelSyntax, { Reg32|Dword|BaseIndex, Reg64 }
 movsxd, 2, 0x63, None, 1, Cpu64, Modrm|No_bSuf|No_wSuf|No_lSuf|No_sSuf|No_qSuf|No_ldSuf, { Reg32|Unspecified|BaseIndex, Reg32|Reg64 }
 movsxd, 2, 0x63, None, 1, Cpu64, Amd64|Modrm|No_bSuf|No_wSuf|No_lSuf|No_sSuf|No_qSuf|No_ldSuf, { Reg32|Unspecified|BaseIndex, Reg16 }
 movsxd, 2, 0x63, None, 1, Cpu64, Intel64|Modrm|No_bSuf|No_wSuf|No_lSuf|No_sSuf|No_qSuf|No_ldSuf, { Reg16|Unspecified|BaseIndex, Reg16 }
@@ -146,12 +149,14 @@ movsxd, 2, 0x63, None, 1, Cpu64, Intel64|Modrm|No_bSuf|No_wSuf|No_lSuf|No_sSuf|N
 // Move with zero extend.
 movzb, 2, 0xfb6, None, 2, Cpu386, Modrm|No_bSuf|No_sSuf|No_ldSuf, { Reg8|Byte|Unspecified|BaseIndex, Reg16|Reg32|Reg64 }
 movzw, 2, 0xfb7, None, 2, Cpu386, Modrm|No_bSuf|No_wSuf|No_sSuf|No_ldSuf, { Reg16|Word|Unspecified|BaseIndex, Reg32|Reg64 }
+movzx, 2, 0xfb6, None, 2, Cpu386, Modrm|No_bSuf|No_wSuf|No_lSuf|No_sSuf|No_qSuf|No_ldSuf|ATTSyntax, { Reg8, Reg16|Reg32|Reg64 }
+movzxb, 2, 0xfb6, None, 2, Cpu386, Modrm|No_bSuf|No_wSuf|No_lSuf|No_sSuf|No_qSuf|No_ldSuf|ATTSyntax, { Reg8|Unspecified|BaseIndex, Reg16|Reg32|Reg64 }
+movzx, 2, 0xfb7, None, 2, Cpu386, Modrm|No_bSuf|No_wSuf|No_lSuf|No_sSuf|No_qSuf|No_ldSuf|ATTSyntax, { Reg16, Reg32|Reg64 }
+movzxw, 2, 0xfb7, None, 2, Cpu386, Modrm|No_bSuf|No_wSuf|No_lSuf|No_sSuf|No_qSuf|No_ldSuf|ATTSyntax, { Reg16|Unspecified|BaseIndex, Reg32|Reg64 }
 // Intel Syntax next 2 insns (the 64-bit variants are not particulary
 // useful since the zero extend 32->64 is implicit, but we can encode them).
-movzx, 2, 0xfb6, None, 2, Cpu386, Modrm|No_wSuf|No_lSuf|No_sSuf|No_qSuf|No_ldSuf|ATTSyntax, { Reg8|Unspecified|BaseIndex, Reg16|Reg32|Reg64 }
-movzx, 2, 0xfb7, None, 2, Cpu386, Modrm|No_bSuf|No_lSuf|No_sSuf|No_qSuf|No_ldSuf|ATTSyntax, { Reg16|Unspecified|BaseIndex, Reg32|Reg64 }
-movzx, 2, 0xfb6, None, 2, Cpu386, Modrm|No_wSuf|No_lSuf|No_sSuf|No_qSuf|No_ldSuf|IntelSyntax, { Reg8|Byte|BaseIndex, Reg16|Reg32|Reg64 }
-movzx, 2, 0xfb7, None, 2, Cpu386, Modrm|No_bSuf|No_lSuf|No_sSuf|No_qSuf|No_ldSuf|IntelSyntax, { Reg16|Word|BaseIndex, Reg32|Reg64 }
+movzx, 2, 0xfb6, None, 2, Cpu386, Modrm|No_bSuf|No_wSuf|No_lSuf|No_sSuf|No_qSuf|No_ldSuf|IntelSyntax, { Reg8|Byte|BaseIndex, Reg16|Reg32|Reg64 }
+movzx, 2, 0xfb7, None, 2, Cpu386, Modrm|No_bSuf|No_wSuf|No_lSuf|No_sSuf|No_qSuf|No_ldSuf|IntelSyntax, { Reg16|Word|BaseIndex, Reg32|Reg64 }
 
 // Push instructions.
 push, 1, 0x50, None, 1, CpuNo64, No_bSuf|No_sSuf|No_qSuf|No_ldSuf, { Reg16|Reg32 }
diff --git a/opcodes/i386-tbl.h b/opcodes/i386-tbl.h
index 860646c923..5a9a4c3def 100644
--- a/opcodes/i386-tbl.h
+++ b/opcodes/i386-tbl.h
@@ -351,11 +351,11 @@ const insn_template i386_optab[] =
         0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
         0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
         0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } },
-    { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 1, 0, 0,
+    { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 1, 1, 0, 0,
       0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
       0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0 },
-    { { { 1, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 0, 1, 1, 0, 0, 0, 0,
-	  0, 0, 0, 0, 1, 0 } },
+    { { { 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0,
+	  0, 0, 0, 0, 0, 0 } },
       { { 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 0, 1,
 	  0, 0, 0, 0, 0, 0 } } } },
   { "movsx", 0xfbf, None, 2, 2,
@@ -365,11 +365,11 @@ const insn_template i386_optab[] =
         0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
         0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
         0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } },
-    { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 1, 1, 1, 0, 0,
+    { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 1, 1, 0, 0,
       0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
       0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0 },
-    { { { 1, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 0, 1, 0, 1, 0, 0, 0,
-	  0, 0, 0, 0, 1, 0 } },
+    { { { 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0,
+	  0, 0, 0, 0, 0, 0 } },
       { { 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1,
 	  0, 0, 0, 0, 0, 0 } } } },
   { "movsx", 0x63, None, 1, 2,
@@ -379,11 +379,11 @@ const insn_template i386_optab[] =
         0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
         0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
         0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0 } },
-    { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 0, 1, 1, 1, 0, 0,
-      0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0,
+    { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 1, 1, 0, 0,
+      0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
       0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0 },
-    { { { 1, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 1, 0, 1, 0, 0, 1, 0, 0,
-	  0, 0, 0, 0, 1, 0 } },
+    { { { 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0,
+	  0, 0, 0, 0, 0, 0 } },
       { { 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1,
 	  0, 0, 0, 0, 0, 0 } } } },
   { "movsx", 0xfbe, None, 2, 2,
@@ -393,7 +393,7 @@ const insn_template i386_optab[] =
         0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
         0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
         0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } },
-    { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 1, 0, 0,
+    { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 1, 1, 0, 0,
       0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
       0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0 },
     { { { 1, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 0, 1, 1, 0, 0, 0, 0,
@@ -407,7 +407,7 @@ const insn_template i386_optab[] =
         0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
         0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
         0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } },
-    { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 1, 1, 1, 0, 0,
+    { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 1, 1, 0, 0,
       0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
       0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0 },
     { { { 1, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 0, 1, 0, 1, 0, 0, 0,
@@ -421,13 +421,55 @@ const insn_template i386_optab[] =
         0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
         0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
         0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0 } },
-    { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 0, 1, 1, 1, 0, 0,
+    { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 1, 1, 0, 0,
       0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0,
       0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0 },
     { { { 1, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 1, 0, 1, 0, 0, 1, 0, 0,
 	  0, 0, 0, 0, 0, 0 } },
       { { 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1,
 	  0, 0, 0, 0, 0, 0 } } } },
+  { "movsxb", 0xfbe, None, 2, 2,
+    { { 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
+        0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
+        0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
+        0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
+        0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
+        0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } },
+    { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 1, 1, 0, 0,
+      0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
+      0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0 },
+    { { { 1, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 0, 1, 1, 0, 0, 0, 0,
+	  0, 0, 0, 0, 1, 0 } },
+      { { 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 0, 1,
+	  0, 0, 0, 0, 0, 0 } } } },
+  { "movsxw", 0xfbf, None, 2, 2,
+    { { 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
+        0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
+        0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
+        0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
+        0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
+        0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } },
+    { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 1, 1, 0, 0,
+      0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
+      0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0 },
+    { { { 1, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 0, 1, 0, 1, 0, 0, 0,
+	  0, 0, 0, 0, 1, 0 } },
+      { { 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1,
+	  0, 0, 0, 0, 0, 0 } } } },
+  { "movsxl", 0x63, None, 1, 2,
+    { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
+        0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
+        0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
+        0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
+        0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
+        0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0 } },
+    { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 1, 1, 0, 0,
+      0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
+      0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0 },
+    { { { 1, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 1, 0, 1, 0, 0, 1, 0, 0,
+	  0, 0, 0, 0, 1, 0 } },
+      { { 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1,
+	  0, 0, 0, 0, 0, 0 } } } },
   { "movsxd", 0x63, None, 1, 2,
     { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
         0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
@@ -505,11 +547,11 @@ const insn_template i386_optab[] =
         0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
         0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
         0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } },
-    { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 1, 0, 0,
+    { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 1, 1, 0, 0,
       0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
       0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0 },
-    { { { 1, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 0, 1, 1, 0, 0, 0, 0,
-	  0, 0, 0, 0, 1, 0 } },
+    { { { 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0,
+	  0, 0, 0, 0, 0, 0 } },
       { { 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 0, 1,
 	  0, 0, 0, 0, 0, 0 } } } },
   { "movzx", 0xfb7, None, 2, 2,
@@ -519,11 +561,11 @@ const insn_template i386_optab[] =
         0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
         0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
         0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } },
-    { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 1, 1, 1, 0, 0,
+    { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 1, 1, 0, 0,
       0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
       0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0 },
-    { { { 1, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 0, 1, 0, 1, 0, 0, 0,
-	  0, 0, 0, 0, 1, 0 } },
+    { { { 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0,
+	  0, 0, 0, 0, 0, 0 } },
       { { 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1,
 	  0, 0, 0, 0, 0, 0 } } } },
   { "movzx", 0xfb6, None, 2, 2,
@@ -533,7 +575,7 @@ const insn_template i386_optab[] =
         0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
         0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
         0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } },
-    { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 1, 0, 0,
+    { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 1, 1, 0, 0,
       0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
       0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0 },
     { { { 1, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 0, 1, 1, 0, 0, 0, 0,
@@ -547,13 +589,41 @@ const insn_template i386_optab[] =
         0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
         0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
         0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } },
-    { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 1, 1, 1, 0, 0,
+    { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 1, 1, 0, 0,
       0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
       0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0 },
     { { { 1, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 0, 1, 0, 1, 0, 0, 0,
 	  0, 0, 0, 0, 0, 0 } },
       { { 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1,
 	  0, 0, 0, 0, 0, 0 } } } },
+  { "movzxb", 0xfb6, None, 2, 2,
+    { { 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
+        0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
+        0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
+        0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
+        0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
+        0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } },
+    { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 1, 1, 0, 0,
+      0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
+      0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0 },
+    { { { 1, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 0, 1, 1, 0, 0, 0, 0,
+	  0, 0, 0, 0, 1, 0 } },
+      { { 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 0, 1,
+	  0, 0, 0, 0, 0, 0 } } } },
+  { "movzxw", 0xfb7, None, 2, 2,
+    { { 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
+        0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
+        0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
+        0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
+        0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
+        0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } },
+    { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 1, 1, 0, 0,
+      0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
+      0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0 },
+    { { { 1, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 0, 1, 0, 1, 0, 0, 0,
+	  0, 0, 0, 0, 1, 0 } },
+      { { 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1,
+	  0, 0, 0, 0, 0, 0 } } } },
   { "push", 0x50, None, 1, 1,
     { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
         0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
H.J. Lu Feb. 11, 2020, 11:51 p.m. | #12
On Tue, Feb 11, 2020 at 3:34 PM H.J. Lu <hjl.tools@gmail.com> wrote:
>

> On Tue, Feb 11, 2020 at 12:11 PM H.J. Lu <hjl.tools@gmail.com> wrote:

> >

> > On Tue, Feb 11, 2020 at 9:04 AM H.J. Lu <hjl.tools@gmail.com> wrote:

> > >

> > > On Tue, Feb 11, 2020 at 8:45 AM Jan Beulich <jbeulich@suse.com> wrote:

> > > >

> > > > On 11.02.2020 14:07, H.J. Lu wrote:

> > > > > On Tue, Feb 11, 2020 at 5:04 AM Jan Beulich <jbeulich@suse.com> wrote:

> > > > >>

> > > > >> On 11.02.2020 14:01, H.J. Lu wrote:

> > > > >>> On Tue, Feb 11, 2020 at 4:58 AM Jan Beulich <jbeulich@suse.com> wrote:

> > > > >>>>

> > > > >>>> On 11.02.2020 13:19, H.J. Lu wrote:

> > > > >>>>> On Tue, Feb 11, 2020 at 3:55 AM Jan Beulich <jbeulich@suse.com> wrote:

> > > > >>>>>>

> > > > >>>>>> On 11.02.2020 12:42, H.J. Lu wrote:

> > > > >>>>>>> On Tue, Feb 11, 2020 at 2:25 AM Jan Beulich <jbeulich@suse.com> wrote:

> > > > >>>>>>>>

> > > > >>>>>>>> Some encodings are about to gain a warning - move them from test cases

> > > > >>>>>>>> not expecting any diagnostics to the new, dedicated ones, to allow

> > > > >>>>>>>> better focus on the actual changes in the subsequent patch.

> > > > >>>>>>>>

> > > > >>>>>>>> The new tests added have some wrong expectations right now, which will

> > > > >>>>>>>> be corrected by the next patch. The test is being added here to make

> > > > >>>>>>>> more visible which cases actually were wrong (and hence get changed),

> > > > >>>>>>>> besides demonstrating that in the vast majority of cases the subsequent

> > > > >>>>>>>> change doesn't alter generated code.

> > > > >>>>>>>>

> > > > >>>>>>>> gas/

> > > > >>>>>>>> 2020-02-XX  Jan Beulich  <jbeulich@suse.com>

> > > > >>>>>>>>

> > > > >>>>>>>>         * testsuite/gas/i386/i386.s, testsuite/gas/i386/iamcu-1.s,

> > > > >>>>>>>>         testsuite/gas/i386/ilp32/x86-64.s: Move ambiguous operand size

> > > > >>>>>>>>         tests ...

> > > > >>>>>>>>         * testsuite/gas/i386/noreg16.s, testsuite/gas/i386/noreg32.s,

> > > > >>>>>>>>         testsuite/gas/i386/noreg64.s, testsuite/gas/i386/x86_64.s: ...

> > > > >>>>>>>>         here.

> > > > >>>>>>>>         * testsuite/gas/i386/i386.d, testsuite/gas/i386/i386-intel.d

> > > > >>>>>>>>         testsuite/gas/i386/iamcu-1.d, testsuite/gas/i386/ilp32/x86-64.d,

> > > > >>>>>>>>         testsuite/gas/i386/k1om.d, testsuite/gas/i386/l1om.d,

> > > > >>>>>>>>         testsuite/gas/i386/noreg16.d, testsuite/gas/i386/noreg32.d,

> > > > >>>>>>>>         testsuite/gas/i386/noreg64.d, testsuite/gas/i386/x86_64-intel.d,

> > > > >>>>>>>>         testsuite/gas/i386/x86_64.d: Adjust expectations.

> > > > >>>>>>>>         * testsuite/gas/i386/movx16.s, testsuite/gas/i386/movx16.l,

> > > > >>>>>>>>         testsuite/gas/i386/movx32.s, testsuite/gas/i386/movx32.l,

> > > > >>>>>>>>         testsuite/gas/i386/movx64.s, testsuite/gas/i386/movx64.l: New.

> > > > >>>>>>>>         * testsuite/gas/i386/i386.exp: Run new tests.

> > > > >>>>>>>

> > > > >>>>>>> Please make a separate patch to address MOVSX/MOVZX.

> > > > >>>>>>

> > > > >>>>>> I don't understand what you mean here. This patch simply documents the

> > > > >>>>>> status quo, to make it (much) easier to see what the next patch

> > > > >>>>>> actually adjusts. It doesn't "address" anything. If, for the purpose

> > > > >>>>>> of committing, you'd like to see both patches folded - fine by me. But

> > > > >>>>>> only then, not any earlier.

> > > > >>>>>>

> > > > >>>>>>>  MOVSX and MOVZX

> > > > >>>>>>> should take no suffixes.  AT&T syntax is supported if there is no

> > > > >>>>>>> ambiguity.  AT&T

> > > > >>>>>>> syntax also supports movsXY and movzXY.

> > > > >>>>>>

> > > > >>>>>> Please could you clarify what specifically you'd like to see changed,

> > > > >>>>>> at the very least by pointing out one case each where you think I'm

> > > > >>>>>> moving in the wrong direction (presumably in the next patch really)?

> > > > >>>>>> I'm afraid your response isn't such that I can derive from it what

> > > > >>>>>> exactly you want.

> > > > >>>>>

> > > > >>>>> We support

> > > > >>>>>

> > > > >>>>> movsx %ax, %ecx

> > > > >>>>> movzx %ax, %ecx

> > > > >>>>> movswl %ax, %ecx

> > > > >>>>> movzwl %ax, %ecx

> > > > >>>>>

> > > > >>>>> We disallow

> > > > >>>>>

> > > > >>>>> movsxw %ax, %ecx

> > > > >>>>> movzxw %ax, %ecx

> > > > >>>>

> > > > >>>> We don't (as this patch demonstrates, along with pre-existing tests,

> > > > >>>> unless you mean once again to have an inconsistency between insns

> > > > >>>> with all register operands and similar ones with e memory source),

> > > > >>>> and if you want it to be this way, then please do so yourself, but

> > > > >>>

> > > > >>> I will do it.

> > > > >>>

> > > > >>>> please also only on top of my changes, so I won't need to re-base

> > > > >>>

> > > > >>> Which changes of yours are you referring to?

> > > > >>

> > > > >> This patch and the subsequent one.

> > > > >>

> > > > >

> > > > > Both changes won't be necessary after my changes.

> > > >

> > > > I'm confused. What you want to deal with is - afaict - orthogonal to

> > > > what the next patch in the series here does.

> > > >

> > >

> > > You will see what I mean when I post my patch for review.

> > >

> >

> > AT&T syntax requires suffix to specify memory operand size.  Since

> > movsx and movzx can have different memory operand sizes with the same

> > destination register, this patch removes movsx and movzx with memory

> > operand from AT&T syntax.  Since AT&T syntax uses different mnemonics

> > for movsx and movzx, this change should have little impact on assembly

> > sources.  Tested with Linux kernel 5.5.3 for x86-64 and glibc 2.31 for

> > i686 and x86-64.

> >

>

> Updated patch to add more testcases and allow register operand with

> mov[sz]x[bwl].

>


I found usage of

movzx 4(%edx), %eax

We also need to support:

movsx 4(%edx), %eax

I will update my patch.

-- 
H.J.

Patch

--- a/gas/testsuite/gas/i386/i386-intel.d
+++ b/gas/testsuite/gas/i386/i386-intel.d
@@ -14,7 +14,6 @@  Disassembly of section .text:
 [ 	]*[a-f0-9]+:	66 0f be f0          	movsx  si,al
 [ 	]*[a-f0-9]+:	0f be f0             	movsx  esi,al
 [ 	]*[a-f0-9]+:	0f bf f0             	movsx  esi,ax
-[ 	]*[a-f0-9]+:	0f be 10             	movsx  edx,BYTE PTR \[eax\]
 [ 	]*[a-f0-9]+:	66 0f be 10          	movsx  dx,BYTE PTR \[eax\]
 [ 	]*[a-f0-9]+:	66 0f be 10          	movsx  dx,BYTE PTR \[eax\]
 [ 	]*[a-f0-9]+:	0f be 10             	movsx  edx,BYTE PTR \[eax\]
@@ -25,7 +24,6 @@  Disassembly of section .text:
 [ 	]*[a-f0-9]+:	66 0f b6 f0          	movzx  si,al
 [ 	]*[a-f0-9]+:	0f b6 f0             	movzx  esi,al
 [ 	]*[a-f0-9]+:	0f b7 f0             	movzx  esi,ax
-[ 	]*[a-f0-9]+:	0f b6 10             	movzx  edx,BYTE PTR \[eax\]
 [ 	]*[a-f0-9]+:	66 0f b6 10          	movzx  dx,BYTE PTR \[eax\]
 [ 	]*[a-f0-9]+:	66 0f b6 10          	movzx  dx,BYTE PTR \[eax\]
 [ 	]*[a-f0-9]+:	0f b6 10             	movzx  edx,BYTE PTR \[eax\]
--- a/gas/testsuite/gas/i386/i386.d
+++ b/gas/testsuite/gas/i386/i386.d
@@ -13,7 +13,6 @@  Disassembly of section .text:
 [ 	]*[a-f0-9]+:	66 0f be f0          	movsbw %al,%si
 [ 	]*[a-f0-9]+:	0f be f0             	movsbl %al,%esi
 [ 	]*[a-f0-9]+:	0f bf f0             	movswl %ax,%esi
-[ 	]*[a-f0-9]+:	0f be 10             	movsbl \(%eax\),%edx
 [ 	]*[a-f0-9]+:	66 0f be 10          	movsbw \(%eax\),%dx
 [ 	]*[a-f0-9]+:	66 0f be 10          	movsbw \(%eax\),%dx
 [ 	]*[a-f0-9]+:	0f be 10             	movsbl \(%eax\),%edx
@@ -24,7 +23,6 @@  Disassembly of section .text:
 [ 	]*[a-f0-9]+:	66 0f b6 f0          	movzbw %al,%si
 [ 	]*[a-f0-9]+:	0f b6 f0             	movzbl %al,%esi
 [ 	]*[a-f0-9]+:	0f b7 f0             	movzwl %ax,%esi
-[ 	]*[a-f0-9]+:	0f b6 10             	movzbl \(%eax\),%edx
 [ 	]*[a-f0-9]+:	66 0f b6 10          	movzbw \(%eax\),%dx
 [ 	]*[a-f0-9]+:	66 0f b6 10          	movzbw \(%eax\),%dx
 [ 	]*[a-f0-9]+:	0f b6 10             	movzbl \(%eax\),%edx
--- a/gas/testsuite/gas/i386/i386.exp
+++ b/gas/testsuite/gas/i386/i386.exp
@@ -132,6 +132,8 @@  if [expr ([istarget "i*86-*-*"] ||  [ist
     run_list_test "noreg16"
     run_dump_test "noreg32"
     run_list_test "noreg32"
+    run_list_test "movx16" "-I${srcdir}/$subdir -al"
+    run_list_test "movx32" "-al"
     run_dump_test "addr16"
     run_dump_test "addr32"
     run_dump_test "code16"
@@ -734,6 +736,7 @@  if [expr ([istarget "i*86-*-*"] || [ista
     run_list_test "x86-64-sysenter-amd" "-mamd64"
     run_dump_test "noreg64"
     run_list_test "noreg64"
+    run_list_test "movx64" "-al"
     run_list_test "cvtsi2sX"
     run_dump_test "x86-64-sse4_1"
     run_dump_test "x86-64-sse4_1-intel"
--- a/gas/testsuite/gas/i386/i386.s
+++ b/gas/testsuite/gas/i386/i386.s
@@ -9,7 +9,6 @@ 
 	movsx	%al, %si
 	movsx	%al, %esi
 	movsx	%ax, %esi
-	movsx	(%eax), %edx
 	movsx	(%eax), %dx
 	movsxb	(%eax), %dx
 	movsxb	(%eax), %edx
@@ -21,7 +20,6 @@ 
 	movzx	%al, %si
 	movzx	%al, %esi
 	movzx	%ax, %esi
-	movzx	(%eax), %edx
 	movzx	(%eax), %dx
 	movzxb	(%eax), %dx
 	movzxb	(%eax), %edx
--- a/gas/testsuite/gas/i386/iamcu-1.d
+++ b/gas/testsuite/gas/i386/iamcu-1.d
@@ -10,7 +10,6 @@  Disassembly of section .text:
 [ 	]*[a-f0-9]+:	66 0f be f0          	movsbw %al,%si
 [ 	]*[a-f0-9]+:	0f be f0             	movsbl %al,%esi
 [ 	]*[a-f0-9]+:	0f bf f0             	movswl %ax,%esi
-[ 	]*[a-f0-9]+:	0f be 10             	movsbl \(%eax\),%edx
 [ 	]*[a-f0-9]+:	66 0f be 10          	movsbw \(%eax\),%dx
 [ 	]*[a-f0-9]+:	66 0f be 10          	movsbw \(%eax\),%dx
 [ 	]*[a-f0-9]+:	0f be 10             	movsbl \(%eax\),%edx
@@ -21,7 +20,6 @@  Disassembly of section .text:
 [ 	]*[a-f0-9]+:	66 0f b6 f0          	movzbw %al,%si
 [ 	]*[a-f0-9]+:	0f b6 f0             	movzbl %al,%esi
 [ 	]*[a-f0-9]+:	0f b7 f0             	movzwl %ax,%esi
-[ 	]*[a-f0-9]+:	0f b6 10             	movzbl \(%eax\),%edx
 [ 	]*[a-f0-9]+:	66 0f b6 10          	movzbw \(%eax\),%dx
 [ 	]*[a-f0-9]+:	66 0f b6 10          	movzbw \(%eax\),%dx
 [ 	]*[a-f0-9]+:	0f b6 10             	movzbl \(%eax\),%edx
--- a/gas/testsuite/gas/i386/iamcu-1.s
+++ b/gas/testsuite/gas/i386/iamcu-1.s
@@ -4,7 +4,6 @@ 
 	movsx	%al, %si
 	movsx	%al, %esi
 	movsx	%ax, %esi
-	movsx	(%eax), %edx
 	movsx	(%eax), %dx
 	movsxb	(%eax), %dx
 	movsxb	(%eax), %edx
@@ -16,7 +15,6 @@ 
 	movzx	%al, %si
 	movzx	%al, %esi
 	movzx	%ax, %esi
-	movzx	(%eax), %edx
 	movzx	(%eax), %dx
 	movzxb	(%eax), %dx
 	movzxb	(%eax), %edx
--- a/gas/testsuite/gas/i386/ilp32/x86-64.d
+++ b/gas/testsuite/gas/i386/ilp32/x86-64.d
@@ -162,8 +162,6 @@  Disassembly of section .text:
 [ 	]*[a-f0-9]+:	0f bf f0             	movswl %ax,%esi
 [ 	]*[a-f0-9]+:	48 0f bf f0          	movswq %ax,%rsi
 [ 	]*[a-f0-9]+:	48 63 f0             	movslq %eax,%rsi
-[ 	]*[a-f0-9]+:	0f be 10             	movsbl \(%rax\),%edx
-[ 	]*[a-f0-9]+:	48 0f be 10          	movsbq \(%rax\),%rdx
 [ 	]*[a-f0-9]+:	66 0f be 10          	movsbw \(%rax\),%dx
 [ 	]*[a-f0-9]+:	0f be 10             	movsbl \(%rax\),%edx
 [ 	]*[a-f0-9]+:	48 0f be 10          	movsbq \(%rax\),%rdx
@@ -175,8 +173,6 @@  Disassembly of section .text:
 [ 	]*[a-f0-9]+:	48 0f b6 f0          	movzbq %al,%rsi
 [ 	]*[a-f0-9]+:	0f b7 f0             	movzwl %ax,%esi
 [ 	]*[a-f0-9]+:	48 0f b7 f0          	movzwq %ax,%rsi
-[ 	]*[a-f0-9]+:	0f b6 10             	movzbl \(%rax\),%edx
-[ 	]*[a-f0-9]+:	48 0f b6 10          	movzbq \(%rax\),%rdx
 [ 	]*[a-f0-9]+:	66 0f b6 10          	movzbw \(%rax\),%dx
 [ 	]*[a-f0-9]+:	0f b6 10             	movzbl \(%rax\),%edx
 [ 	]*[a-f0-9]+:	48 0f b6 10          	movzbq \(%rax\),%rdx
@@ -220,8 +216,6 @@  Disassembly of section .text:
 [ 	]*[a-f0-9]+:	9b df e0             	fstsw  %ax
 [ 	]*[a-f0-9]+:	9b df e0             	fstsw  %ax
 [ 	]*[a-f0-9]+:	66 0f be 00          	movsbw \(%rax\),%ax
-[ 	]*[a-f0-9]+:	0f be 00             	movsbl \(%rax\),%eax
-[ 	]*[a-f0-9]+:	48 0f be 00          	movsbq \(%rax\),%rax
 [ 	]*[a-f0-9]+:	66 0f be 10          	movsbw \(%rax\),%dx
 [ 	]*[a-f0-9]+:	0f be 10             	movsbl \(%rax\),%edx
 [ 	]*[a-f0-9]+:	48 0f be 10          	movsbq \(%rax\),%rdx
@@ -230,8 +224,6 @@  Disassembly of section .text:
 [ 	]*[a-f0-9]+:	48 63 10             	movslq \(%rax\),%rdx
 [ 	]*[a-f0-9]+:	48 63 00             	movslq \(%rax\),%rax
 [ 	]*[a-f0-9]+:	66 0f b6 00          	movzbw \(%rax\),%ax
-[ 	]*[a-f0-9]+:	0f b6 00             	movzbl \(%rax\),%eax
-[ 	]*[a-f0-9]+:	48 0f b6 00          	movzbq \(%rax\),%rax
 [ 	]*[a-f0-9]+:	66 0f b6 10          	movzbw \(%rax\),%dx
 [ 	]*[a-f0-9]+:	0f b6 10             	movzbl \(%rax\),%edx
 [ 	]*[a-f0-9]+:	48 0f b6 10          	movzbq \(%rax\),%rdx
--- a/gas/testsuite/gas/i386/ilp32/x86-64.s
+++ b/gas/testsuite/gas/i386/ilp32/x86-64.s
@@ -194,8 +194,6 @@  cmpxchg16b oword ptr [rax]
 	movsx	%ax, %esi
 	movsx	%ax, %rsi
 	movsx	%eax, %rsi
-	movsx	(%rax), %edx
-	movsx	(%rax), %rdx
 	movsx	(%rax), %dx
 	movsbl	(%rax), %edx
 	movsbq	(%rax), %rdx
@@ -208,8 +206,6 @@  cmpxchg16b oword ptr [rax]
 	movzx	%al, %rsi
 	movzx	%ax, %esi
 	movzx	%ax, %rsi
-	movzx	(%rax), %edx
-	movzx	(%rax), %rdx
 	movzx	(%rax), %dx
 	movzb	(%rax), %edx
 	movzb	(%rax), %rdx
@@ -263,8 +259,6 @@  cmpxchg16b oword ptr [rax]
 
 .att_syntax
 movsx (%rax),%ax
-movsx (%rax),%eax
-movsx (%rax),%rax
 movsxb	(%rax), %dx
 movsxb	(%rax), %edx
 movsxb	(%rax), %rdx
@@ -273,8 +267,6 @@  movsxw	(%rax), %rdx
 movsxl	(%rax), %rdx
 movsxd (%rax),%rax
 movzx (%rax),%ax
-movzx (%rax),%eax
-movzx (%rax),%rax
 movzxb	(%rax), %dx
 movzxb	(%rax), %edx
 movzxb	(%rax), %rdx
--- a/gas/testsuite/gas/i386/k1om.d
+++ b/gas/testsuite/gas/i386/k1om.d
@@ -175,8 +175,6 @@  Disassembly of section .text:
 [ 	]*[a-f0-9]+:	0f bf f0             	movswl %ax,%esi
 [ 	]*[a-f0-9]+:	48 0f bf f0          	movswq %ax,%rsi
 [ 	]*[a-f0-9]+:	48 63 f0             	movslq %eax,%rsi
-[ 	]*[a-f0-9]+:	0f be 10             	movsbl \(%rax\),%edx
-[ 	]*[a-f0-9]+:	48 0f be 10          	movsbq \(%rax\),%rdx
 [ 	]*[a-f0-9]+:	66 0f be 10          	movsbw \(%rax\),%dx
 [ 	]*[a-f0-9]+:	0f be 10             	movsbl \(%rax\),%edx
 [ 	]*[a-f0-9]+:	48 0f be 10          	movsbq \(%rax\),%rdx
@@ -188,8 +186,6 @@  Disassembly of section .text:
 [ 	]*[a-f0-9]+:	48 0f b6 f0          	movzbq %al,%rsi
 [ 	]*[a-f0-9]+:	0f b7 f0             	movzwl %ax,%esi
 [ 	]*[a-f0-9]+:	48 0f b7 f0          	movzwq %ax,%rsi
-[ 	]*[a-f0-9]+:	0f b6 10             	movzbl \(%rax\),%edx
-[ 	]*[a-f0-9]+:	48 0f b6 10          	movzbq \(%rax\),%rdx
 [ 	]*[a-f0-9]+:	66 0f b6 10          	movzbw \(%rax\),%dx
 [ 	]*[a-f0-9]+:	0f b6 10             	movzbl \(%rax\),%edx
 [ 	]*[a-f0-9]+:	48 0f b6 10          	movzbq \(%rax\),%rdx
@@ -233,8 +229,6 @@  Disassembly of section .text:
 [ 	]*[a-f0-9]+:	9b df e0             	fstsw  %ax
 [ 	]*[a-f0-9]+:	9b df e0             	fstsw  %ax
 [ 	]*[a-f0-9]+:	66 0f be 00          	movsbw \(%rax\),%ax
-[ 	]*[a-f0-9]+:	0f be 00             	movsbl \(%rax\),%eax
-[ 	]*[a-f0-9]+:	48 0f be 00          	movsbq \(%rax\),%rax
 [ 	]*[a-f0-9]+:	66 0f be 10          	movsbw \(%rax\),%dx
 [ 	]*[a-f0-9]+:	0f be 10             	movsbl \(%rax\),%edx
 [ 	]*[a-f0-9]+:	48 0f be 10          	movsbq \(%rax\),%rdx
@@ -243,8 +237,6 @@  Disassembly of section .text:
 [ 	]*[a-f0-9]+:	48 63 10             	movslq \(%rax\),%rdx
 [ 	]*[a-f0-9]+:	48 63 00             	movslq \(%rax\),%rax
 [ 	]*[a-f0-9]+:	66 0f b6 00          	movzbw \(%rax\),%ax
-[ 	]*[a-f0-9]+:	0f b6 00             	movzbl \(%rax\),%eax
-[ 	]*[a-f0-9]+:	48 0f b6 00          	movzbq \(%rax\),%rax
 [ 	]*[a-f0-9]+:	66 0f b6 10          	movzbw \(%rax\),%dx
 [ 	]*[a-f0-9]+:	0f b6 10             	movzbl \(%rax\),%edx
 [ 	]*[a-f0-9]+:	48 0f b6 10          	movzbq \(%rax\),%rdx
--- a/gas/testsuite/gas/i386/l1om.d
+++ b/gas/testsuite/gas/i386/l1om.d
@@ -175,8 +175,6 @@  Disassembly of section .text:
 [ 	]*[a-f0-9]+:	0f bf f0             	movswl %ax,%esi
 [ 	]*[a-f0-9]+:	48 0f bf f0          	movswq %ax,%rsi
 [ 	]*[a-f0-9]+:	48 63 f0             	movslq %eax,%rsi
-[ 	]*[a-f0-9]+:	0f be 10             	movsbl \(%rax\),%edx
-[ 	]*[a-f0-9]+:	48 0f be 10          	movsbq \(%rax\),%rdx
 [ 	]*[a-f0-9]+:	66 0f be 10          	movsbw \(%rax\),%dx
 [ 	]*[a-f0-9]+:	0f be 10             	movsbl \(%rax\),%edx
 [ 	]*[a-f0-9]+:	48 0f be 10          	movsbq \(%rax\),%rdx
@@ -188,8 +186,6 @@  Disassembly of section .text:
 [ 	]*[a-f0-9]+:	48 0f b6 f0          	movzbq %al,%rsi
 [ 	]*[a-f0-9]+:	0f b7 f0             	movzwl %ax,%esi
 [ 	]*[a-f0-9]+:	48 0f b7 f0          	movzwq %ax,%rsi
-[ 	]*[a-f0-9]+:	0f b6 10             	movzbl \(%rax\),%edx
-[ 	]*[a-f0-9]+:	48 0f b6 10          	movzbq \(%rax\),%rdx
 [ 	]*[a-f0-9]+:	66 0f b6 10          	movzbw \(%rax\),%dx
 [ 	]*[a-f0-9]+:	0f b6 10             	movzbl \(%rax\),%edx
 [ 	]*[a-f0-9]+:	48 0f b6 10          	movzbq \(%rax\),%rdx
@@ -233,8 +229,6 @@  Disassembly of section .text:
 [ 	]*[a-f0-9]+:	9b df e0             	fstsw  %ax
 [ 	]*[a-f0-9]+:	9b df e0             	fstsw  %ax
 [ 	]*[a-f0-9]+:	66 0f be 00          	movsbw \(%rax\),%ax
-[ 	]*[a-f0-9]+:	0f be 00             	movsbl \(%rax\),%eax
-[ 	]*[a-f0-9]+:	48 0f be 00          	movsbq \(%rax\),%rax
 [ 	]*[a-f0-9]+:	66 0f be 10          	movsbw \(%rax\),%dx
 [ 	]*[a-f0-9]+:	0f be 10             	movsbl \(%rax\),%edx
 [ 	]*[a-f0-9]+:	48 0f be 10          	movsbq \(%rax\),%rdx
@@ -243,8 +237,6 @@  Disassembly of section .text:
 [ 	]*[a-f0-9]+:	48 63 10             	movslq \(%rax\),%rdx
 [ 	]*[a-f0-9]+:	48 63 00             	movslq \(%rax\),%rax
 [ 	]*[a-f0-9]+:	66 0f b6 00          	movzbw \(%rax\),%ax
-[ 	]*[a-f0-9]+:	0f b6 00             	movzbl \(%rax\),%eax
-[ 	]*[a-f0-9]+:	48 0f b6 00          	movzbq \(%rax\),%rax
 [ 	]*[a-f0-9]+:	66 0f b6 10          	movzbw \(%rax\),%dx
 [ 	]*[a-f0-9]+:	0f b6 10             	movzbl \(%rax\),%edx
 [ 	]*[a-f0-9]+:	48 0f b6 10          	movzbq \(%rax\),%rdx
--- /dev/null
+++ b/gas/testsuite/gas/i386/movx16.l
@@ -0,0 +1,197 @@ 
+.*: Assembler messages:
+#...
+[ 	]*[1-9][0-9]*[ 	]+movsx:
+[ 	]*[1-9][0-9]*[ 	]+movsx	%al, %cl
+[ 	]*[1-9][0-9]*[ 	]+movsx	%ax, %cl
+[ 	]*[1-9][0-9]*[ 	]+movsx	%eax, %cl
+[ 	]*[1-9][0-9]*[ 	]*
+[ 	]*[1-9][0-9]* \?\?\?\? 0FBEC8[ 	]+movsx	%al, %cx
+[ 	]*[1-9][0-9]*[ 	]+movsx	%ax, %cx
+[ 	]*[1-9][0-9]*[ 	]+movsx	%eax, %cx
+[ 	]*[1-9][0-9]*[ 	]*
+[ 	]*[1-9][0-9]* \?\?\?\? 660FBEC8[ 	]+movsx	%al, %ecx
+[ 	]*[1-9][0-9]* \?\?\?\? 660FBFC8[ 	]+movsx	%ax, %ecx
+[ 	]*[1-9][0-9]*[ 	]+movsx	%eax, %ecx
+[ 	]*[1-9][0-9]*[ 	]*
+[ 	]*[1-9][0-9]*[ 	]+movsxb	%al, %cl
+[ 	]*[1-9][0-9]*[ 	]+movsxb	%ax, %cl
+[ 	]*[1-9][0-9]*[ 	]+movsxb	%eax, %cl
+[ 	]*[1-9][0-9]*[ 	]*
+[ 	]*[1-9][0-9]* \?\?\?\? 0FBEC8[ 	]+movsxb	%al, %cx
+[ 	]*[1-9][0-9]*[ 	]+movsxb	%ax, %cx
+[ 	]*[1-9][0-9]*[ 	]+movsxb	%eax, %cx
+[ 	]*[1-9][0-9]*[ 	]*
+[ 	]*[1-9][0-9]* \?\?\?\? 660FBEC8[ 	]+movsxb	%al, %ecx
+[ 	]*[1-9][0-9]*[ 	]+movsxb	%ax, %ecx
+[ 	]*[1-9][0-9]*[ 	]+movsxb	%eax, %ecx
+[ 	]*[1-9][0-9]*[ 	]*
+[ 	]*[1-9][0-9]*[ 	]+movsxw	%al, %cl
+[ 	]*[1-9][0-9]*[ 	]+movsxw	%ax, %cl
+[ 	]*[1-9][0-9]*[ 	]+movsxw	%eax, %cl
+[ 	]*[1-9][0-9]*[ 	]*
+[ 	]*[1-9][0-9]*[ 	]+movsxw	%al, %cx
+[ 	]*[1-9][0-9]*[ 	]+movsxw	%ax, %cx
+[ 	]*[1-9][0-9]*[ 	]+movsxw	%eax, %cx
+[ 	]*[1-9][0-9]*[ 	]*
+[ 	]*[1-9][0-9]*[ 	]+movsxw	%al, %ecx
+[ 	]*[1-9][0-9]* \?\?\?\? 660FBFC8[ 	]+movsxw	%ax, %ecx
+[ 	]*[1-9][0-9]*[ 	]+movsxw	%eax, %ecx
+[ 	]*[1-9][0-9]*[ 	]*
+[ 	]*[1-9][0-9]*[ 	]+movsb	%al, %cl
+[ 	]*[1-9][0-9]*[ 	]+movsb	%ax, %cl
+[ 	]*[1-9][0-9]*[ 	]+movsb	%eax, %cl
+[ 	]*[1-9][0-9]*[ 	]*
+[ 	]*[1-9][0-9]*[ 	]+movsb	%al, %cx
+[ 	]*[1-9][0-9]*[ 	]+movsb	%ax, %cx
+[ 	]*[1-9][0-9]*[ 	]+movsb	%eax, %cx
+[ 	]*[1-9][0-9]*[ 	]*
+[ 	]*[1-9][0-9]*[ 	]+movsb	%al, %ecx
+[ 	]*[1-9][0-9]*[ 	]+movsb	%ax, %ecx
+[ 	]*[1-9][0-9]*[ 	]+movsb	%eax, %ecx
+[ 	]*[1-9][0-9]*[ 	]*
+[ 	]*[1-9][0-9]*[ 	]+movsbw	%al, %cl
+[ 	]*[1-9][0-9]*[ 	]+movsbw	%ax, %cl
+[ 	]*[1-9][0-9]*[ 	]+movsbw	%eax, %cl
+[ 	]*[1-9][0-9]*[ 	]*
+[ 	]*[1-9][0-9]* \?\?\?\? 0FBEC8[ 	]+movsbw	%al, %cx
+[ 	]*[1-9][0-9]*[ 	]+movsbw	%ax, %cx
+[ 	]*[1-9][0-9]*[ 	]+movsbw	%eax, %cx
+[ 	]*[1-9][0-9]*[ 	]*
+[ 	]*[1-9][0-9]*[ 	]+movsbw	%al, %ecx
+[ 	]*[1-9][0-9]*[ 	]+movsbw	%ax, %ecx
+[ 	]*[1-9][0-9]*[ 	]+movsbw	%eax, %ecx
+[ 	]*[1-9][0-9]*[ 	]*
+[ 	]*[1-9][0-9]*[ 	]+movsbl	%al, %cl
+[ 	]*[1-9][0-9]*[ 	]+movsbl	%ax, %cl
+[ 	]*[1-9][0-9]*[ 	]+movsbl	%eax, %cl
+[ 	]*[1-9][0-9]*[ 	]*
+[ 	]*[1-9][0-9]*[ 	]+movsbl	%al, %cx
+[ 	]*[1-9][0-9]*[ 	]+movsbl	%ax, %cx
+[ 	]*[1-9][0-9]*[ 	]+movsbl	%eax, %cx
+[ 	]*[1-9][0-9]*[ 	]*
+[ 	]*[1-9][0-9]* \?\?\?\? 660FBEC8[ 	]+movsbl	%al, %ecx
+[ 	]*[1-9][0-9]*[ 	]+movsbl	%ax, %ecx
+[ 	]*[1-9][0-9]*[ 	]+movsbl	%eax, %ecx
+[ 	]*[1-9][0-9]*[ 	]*
+[ 	]*[1-9][0-9]*[ 	]+movsw	%al, %cl
+[ 	]*[1-9][0-9]*[ 	]+movsw	%ax, %cl
+[ 	]*[1-9][0-9]*[ 	]+movsw	%eax, %cl
+[ 	]*[1-9][0-9]*[ 	]*
+[ 	]*[1-9][0-9]*[ 	]+movsw	%al, %cx
+[ 	]*[1-9][0-9]*[ 	]+movsw	%ax, %cx
+[ 	]*[1-9][0-9]*[ 	]+movsw	%eax, %cx
+[ 	]*[1-9][0-9]*[ 	]*
+[ 	]*[1-9][0-9]*[ 	]+movsw	%al, %ecx
+[ 	]*[1-9][0-9]*[ 	]+movsw	%ax, %ecx
+[ 	]*[1-9][0-9]*[ 	]+movsw	%eax, %ecx
+[ 	]*[1-9][0-9]*[ 	]*
+[ 	]*[1-9][0-9]*[ 	]+movswl	%al, %cl
+[ 	]*[1-9][0-9]*[ 	]+movswl	%ax, %cl
+[ 	]*[1-9][0-9]*[ 	]+movswl	%eax, %cl
+[ 	]*[1-9][0-9]*[ 	]*
+[ 	]*[1-9][0-9]*[ 	]+movswl	%al, %cx
+[ 	]*[1-9][0-9]*[ 	]+movswl	%ax, %cx
+[ 	]*[1-9][0-9]*[ 	]+movswl	%eax, %cx
+[ 	]*[1-9][0-9]*[ 	]*
+[ 	]*[1-9][0-9]*[ 	]+movswl	%al, %ecx
+[ 	]*[1-9][0-9]* \?\?\?\? 660FBFC8[ 	]+movswl	%ax, %ecx
+[ 	]*[1-9][0-9]*[ 	]+movswl	%eax, %ecx
+[ 	]*[1-9][0-9]*[ 	]*
+[ 	]*[1-9][0-9]*[ 	]+movzx:
+[ 	]*[1-9][0-9]*[ 	]+movzx	%al, %cl
+[ 	]*[1-9][0-9]*[ 	]+movzx	%ax, %cl
+[ 	]*[1-9][0-9]*[ 	]+movzx	%eax, %cl
+[ 	]*[1-9][0-9]*[ 	]*
+[ 	]*[1-9][0-9]* \?\?\?\? 0FB6C8[ 	]+movzx	%al, %cx
+[ 	]*[1-9][0-9]*[ 	]+movzx	%ax, %cx
+[ 	]*[1-9][0-9]*[ 	]+movzx	%eax, %cx
+[ 	]*[1-9][0-9]*[ 	]*
+[ 	]*[1-9][0-9]* \?\?\?\? 660FB6C8[ 	]+movzx	%al, %ecx
+[ 	]*[1-9][0-9]* \?\?\?\? 660FB7C8[ 	]+movzx	%ax, %ecx
+[ 	]*[1-9][0-9]*[ 	]+movzx	%eax, %ecx
+[ 	]*[1-9][0-9]*[ 	]*
+[ 	]*[1-9][0-9]*[ 	]+movzxb	%al, %cl
+[ 	]*[1-9][0-9]*[ 	]+movzxb	%ax, %cl
+[ 	]*[1-9][0-9]*[ 	]+movzxb	%eax, %cl
+[ 	]*[1-9][0-9]*[ 	]*
+[ 	]*[1-9][0-9]* \?\?\?\? 0FB6C8[ 	]+movzxb	%al, %cx
+[ 	]*[1-9][0-9]*[ 	]+movzxb	%ax, %cx
+[ 	]*[1-9][0-9]*[ 	]+movzxb	%eax, %cx
+[ 	]*[1-9][0-9]*[ 	]*
+[ 	]*[1-9][0-9]* \?\?\?\? 660FB6C8[ 	]+movzxb	%al, %ecx
+[ 	]*[1-9][0-9]*[ 	]+movzxb	%ax, %ecx
+[ 	]*[1-9][0-9]*[ 	]+movzxb	%eax, %ecx
+[ 	]*[1-9][0-9]*[ 	]*
+[ 	]*[1-9][0-9]*[ 	]+movzxw	%al, %cl
+[ 	]*[1-9][0-9]*[ 	]+movzxw	%ax, %cl
+[ 	]*[1-9][0-9]*[ 	]+movzxw	%eax, %cl
+[ 	]*[1-9][0-9]*[ 	]*
+[ 	]*[1-9][0-9]*[ 	]+movzxw	%al, %cx
+[ 	]*[1-9][0-9]*[ 	]+movzxw	%ax, %cx
+[ 	]*[1-9][0-9]*[ 	]+movzxw	%eax, %cx
+[ 	]*[1-9][0-9]*[ 	]*
+[ 	]*[1-9][0-9]*[ 	]+movzxw	%al, %ecx
+[ 	]*[1-9][0-9]* \?\?\?\? 660FB7C8[ 	]+movzxw	%ax, %ecx
+[ 	]*[1-9][0-9]*[ 	]+movzxw	%eax, %ecx
+[ 	]*[1-9][0-9]*[ 	]*
+[ 	]*[1-9][0-9]*[ 	]+movzb	%al, %cl
+[ 	]*[1-9][0-9]*[ 	]+movzb	%ax, %cl
+[ 	]*[1-9][0-9]*[ 	]+movzb	%eax, %cl
+[ 	]*[1-9][0-9]*[ 	]*
+[ 	]*[1-9][0-9]* \?\?\?\? 0FB6C8[ 	]+movzb	%al, %cx
+[ 	]*[1-9][0-9]*[ 	]+movzb	%ax, %cx
+[ 	]*[1-9][0-9]*[ 	]+movzb	%eax, %cx
+[ 	]*[1-9][0-9]*[ 	]*
+[ 	]*[1-9][0-9]* \?\?\?\? 660FB6C8[ 	]+movzb	%al, %ecx
+[ 	]*[1-9][0-9]*[ 	]+movzb	%ax, %ecx
+[ 	]*[1-9][0-9]*[ 	]+movzb	%eax, %ecx
+[ 	]*[1-9][0-9]*[ 	]*
+[ 	]*[1-9][0-9]*[ 	]+movzbw	%al, %cl
+[ 	]*[1-9][0-9]*[ 	]+movzbw	%ax, %cl
+[ 	]*[1-9][0-9]*[ 	]+movzbw	%eax, %cl
+[ 	]*[1-9][0-9]*[ 	]*
+[ 	]*[1-9][0-9]* \?\?\?\? 0FB6C8[ 	]+movzbw	%al, %cx
+[ 	]*[1-9][0-9]*[ 	]+movzbw	%ax, %cx
+[ 	]*[1-9][0-9]*[ 	]+movzbw	%eax, %cx
+[ 	]*[1-9][0-9]*[ 	]*
+[ 	]*[1-9][0-9]* \?\?\?\? 660FB6C8[ 	]+movzbw	%al, %ecx
+[ 	]*[1-9][0-9]*[ 	]+movzbw	%ax, %ecx
+[ 	]*[1-9][0-9]*[ 	]+movzbw	%eax, %ecx
+[ 	]*[1-9][0-9]*[ 	]*
+[ 	]*[1-9][0-9]*[ 	]+movzbl	%al, %cl
+[ 	]*[1-9][0-9]*[ 	]+movzbl	%ax, %cl
+[ 	]*[1-9][0-9]*[ 	]+movzbl	%eax, %cl
+[ 	]*[1-9][0-9]*[ 	]*
+[ 	]*[1-9][0-9]* \?\?\?\? 0FB6C8[ 	]+movzbl	%al, %cx
+[ 	]*[1-9][0-9]*[ 	]+movzbl	%ax, %cx
+[ 	]*[1-9][0-9]*[ 	]+movzbl	%eax, %cx
+[ 	]*[1-9][0-9]*[ 	]*
+[ 	]*[1-9][0-9]* \?\?\?\? 660FB6C8[ 	]+movzbl	%al, %ecx
+[ 	]*[1-9][0-9]*[ 	]+movzbl	%ax, %ecx
+[ 	]*[1-9][0-9]*[ 	]+movzbl	%eax, %ecx
+[ 	]*[1-9][0-9]*[ 	]*
+[ 	]*[1-9][0-9]*[ 	]+movzw	%al, %cl
+[ 	]*[1-9][0-9]*[ 	]+movzw	%ax, %cl
+[ 	]*[1-9][0-9]*[ 	]+movzw	%eax, %cl
+[ 	]*[1-9][0-9]*[ 	]*
+[ 	]*[1-9][0-9]*[ 	]+movzw	%al, %cx
+[ 	]*[1-9][0-9]*[ 	]+movzw	%ax, %cx
+[ 	]*[1-9][0-9]*[ 	]+movzw	%eax, %cx
+[ 	]*[1-9][0-9]*[ 	]*
+[ 	]*[1-9][0-9]*[ 	]+movzw	%al, %ecx
+[ 	]*[1-9][0-9]* \?\?\?\? 660FB7C8[ 	]+movzw	%ax, %ecx
+[ 	]*[1-9][0-9]*[ 	]+movzw	%eax, %ecx
+[ 	]*[1-9][0-9]*[ 	]*
+[ 	]*[1-9][0-9]*[ 	]+movzwl	%al, %cl
+[ 	]*[1-9][0-9]*[ 	]+movzwl	%ax, %cl
+[ 	]*[1-9][0-9]*[ 	]+movzwl	%eax, %cl
+[ 	]*[1-9][0-9]*[ 	]*
+[ 	]*[1-9][0-9]*[ 	]+movzwl	%al, %cx
+[ 	]*[1-9][0-9]*[ 	]+movzwl	%ax, %cx
+[ 	]*[1-9][0-9]*[ 	]+movzwl	%eax, %cx
+[ 	]*[1-9][0-9]*[ 	]*
+[ 	]*[1-9][0-9]*[ 	]+movzwl	%al, %ecx
+[ 	]*[1-9][0-9]* \?\?\?\? 660FB7C8[ 	]+movzwl	%ax, %ecx
+[ 	]*[1-9][0-9]*[ 	]+movzwl	%eax, %ecx
+[ 	]*[1-9][0-9]*[ 	]*
+#pass
--- /dev/null
+++ b/gas/testsuite/gas/i386/movx16.s
@@ -0,0 +1,2 @@ 
+	.code16
+	.include "movx32.s"
--- /dev/null
+++ b/gas/testsuite/gas/i386/movx32.l
@@ -0,0 +1,197 @@ 
+.*: Assembler messages:
+#...
+[ 	]*[1-9][0-9]*[ 	]+movsx:
+[ 	]*[1-9][0-9]*[ 	]+movsx	%al, %cl
+[ 	]*[1-9][0-9]*[ 	]+movsx	%ax, %cl
+[ 	]*[1-9][0-9]*[ 	]+movsx	%eax, %cl
+[ 	]*[1-9][0-9]*[ 	]*
+[ 	]*[1-9][0-9]* \?\?\?\? 660FBEC8[ 	]+movsx	%al, %cx
+[ 	]*[1-9][0-9]*[ 	]+movsx	%ax, %cx
+[ 	]*[1-9][0-9]*[ 	]+movsx	%eax, %cx
+[ 	]*[1-9][0-9]*[ 	]*
+[ 	]*[1-9][0-9]* \?\?\?\? 0FBEC8[ 	]+movsx	%al, %ecx
+[ 	]*[1-9][0-9]* \?\?\?\? 0FBFC8[ 	]+movsx	%ax, %ecx
+[ 	]*[1-9][0-9]*[ 	]+movsx	%eax, %ecx
+[ 	]*[1-9][0-9]*[ 	]*
+[ 	]*[1-9][0-9]*[ 	]+movsxb	%al, %cl
+[ 	]*[1-9][0-9]*[ 	]+movsxb	%ax, %cl
+[ 	]*[1-9][0-9]*[ 	]+movsxb	%eax, %cl
+[ 	]*[1-9][0-9]*[ 	]*
+[ 	]*[1-9][0-9]* \?\?\?\? 660FBEC8[ 	]+movsxb	%al, %cx
+[ 	]*[1-9][0-9]*[ 	]+movsxb	%ax, %cx
+[ 	]*[1-9][0-9]*[ 	]+movsxb	%eax, %cx
+[ 	]*[1-9][0-9]*[ 	]*
+[ 	]*[1-9][0-9]* \?\?\?\? 0FBEC8[ 	]+movsxb	%al, %ecx
+[ 	]*[1-9][0-9]*[ 	]+movsxb	%ax, %ecx
+[ 	]*[1-9][0-9]*[ 	]+movsxb	%eax, %ecx
+[ 	]*[1-9][0-9]*[ 	]*
+[ 	]*[1-9][0-9]*[ 	]+movsxw	%al, %cl
+[ 	]*[1-9][0-9]*[ 	]+movsxw	%ax, %cl
+[ 	]*[1-9][0-9]*[ 	]+movsxw	%eax, %cl
+[ 	]*[1-9][0-9]*[ 	]*
+[ 	]*[1-9][0-9]*[ 	]+movsxw	%al, %cx
+[ 	]*[1-9][0-9]*[ 	]+movsxw	%ax, %cx
+[ 	]*[1-9][0-9]*[ 	]+movsxw	%eax, %cx
+[ 	]*[1-9][0-9]*[ 	]*
+[ 	]*[1-9][0-9]*[ 	]+movsxw	%al, %ecx
+[ 	]*[1-9][0-9]* \?\?\?\? 0FBFC8[ 	]+movsxw	%ax, %ecx
+[ 	]*[1-9][0-9]*[ 	]+movsxw	%eax, %ecx
+[ 	]*[1-9][0-9]*[ 	]*
+[ 	]*[1-9][0-9]*[ 	]+movsb	%al, %cl
+[ 	]*[1-9][0-9]*[ 	]+movsb	%ax, %cl
+[ 	]*[1-9][0-9]*[ 	]+movsb	%eax, %cl
+[ 	]*[1-9][0-9]*[ 	]*
+[ 	]*[1-9][0-9]*[ 	]+movsb	%al, %cx
+[ 	]*[1-9][0-9]*[ 	]+movsb	%ax, %cx
+[ 	]*[1-9][0-9]*[ 	]+movsb	%eax, %cx
+[ 	]*[1-9][0-9]*[ 	]*
+[ 	]*[1-9][0-9]*[ 	]+movsb	%al, %ecx
+[ 	]*[1-9][0-9]*[ 	]+movsb	%ax, %ecx
+[ 	]*[1-9][0-9]*[ 	]+movsb	%eax, %ecx
+[ 	]*[1-9][0-9]*[ 	]*
+[ 	]*[1-9][0-9]*[ 	]+movsbw	%al, %cl
+[ 	]*[1-9][0-9]*[ 	]+movsbw	%ax, %cl
+[ 	]*[1-9][0-9]*[ 	]+movsbw	%eax, %cl
+[ 	]*[1-9][0-9]*[ 	]*
+[ 	]*[1-9][0-9]* \?\?\?\? 660FBEC8[ 	]+movsbw	%al, %cx
+[ 	]*[1-9][0-9]*[ 	]+movsbw	%ax, %cx
+[ 	]*[1-9][0-9]*[ 	]+movsbw	%eax, %cx
+[ 	]*[1-9][0-9]*[ 	]*
+[ 	]*[1-9][0-9]*[ 	]+movsbw	%al, %ecx
+[ 	]*[1-9][0-9]*[ 	]+movsbw	%ax, %ecx
+[ 	]*[1-9][0-9]*[ 	]+movsbw	%eax, %ecx
+[ 	]*[1-9][0-9]*[ 	]*
+[ 	]*[1-9][0-9]*[ 	]+movsbl	%al, %cl
+[ 	]*[1-9][0-9]*[ 	]+movsbl	%ax, %cl
+[ 	]*[1-9][0-9]*[ 	]+movsbl	%eax, %cl
+[ 	]*[1-9][0-9]*[ 	]*
+[ 	]*[1-9][0-9]*[ 	]+movsbl	%al, %cx
+[ 	]*[1-9][0-9]*[ 	]+movsbl	%ax, %cx
+[ 	]*[1-9][0-9]*[ 	]+movsbl	%eax, %cx
+[ 	]*[1-9][0-9]*[ 	]*
+[ 	]*[1-9][0-9]* \?\?\?\? 0FBEC8[ 	]+movsbl	%al, %ecx
+[ 	]*[1-9][0-9]*[ 	]+movsbl	%ax, %ecx
+[ 	]*[1-9][0-9]*[ 	]+movsbl	%eax, %ecx
+[ 	]*[1-9][0-9]*[ 	]*
+[ 	]*[1-9][0-9]*[ 	]+movsw	%al, %cl
+[ 	]*[1-9][0-9]*[ 	]+movsw	%ax, %cl
+[ 	]*[1-9][0-9]*[ 	]+movsw	%eax, %cl
+[ 	]*[1-9][0-9]*[ 	]*
+[ 	]*[1-9][0-9]*[ 	]+movsw	%al, %cx
+[ 	]*[1-9][0-9]*[ 	]+movsw	%ax, %cx
+[ 	]*[1-9][0-9]*[ 	]+movsw	%eax, %cx
+[ 	]*[1-9][0-9]*[ 	]*
+[ 	]*[1-9][0-9]*[ 	]+movsw	%al, %ecx
+[ 	]*[1-9][0-9]*[ 	]+movsw	%ax, %ecx
+[ 	]*[1-9][0-9]*[ 	]+movsw	%eax, %ecx
+[ 	]*[1-9][0-9]*[ 	]*
+[ 	]*[1-9][0-9]*[ 	]+movswl	%al, %cl
+[ 	]*[1-9][0-9]*[ 	]+movswl	%ax, %cl
+[ 	]*[1-9][0-9]*[ 	]+movswl	%eax, %cl
+[ 	]*[1-9][0-9]*[ 	]*
+[ 	]*[1-9][0-9]*[ 	]+movswl	%al, %cx
+[ 	]*[1-9][0-9]*[ 	]+movswl	%ax, %cx
+[ 	]*[1-9][0-9]*[ 	]+movswl	%eax, %cx
+[ 	]*[1-9][0-9]*[ 	]*
+[ 	]*[1-9][0-9]*[ 	]+movswl	%al, %ecx
+[ 	]*[1-9][0-9]* \?\?\?\? 0FBFC8[ 	]+movswl	%ax, %ecx
+[ 	]*[1-9][0-9]*[ 	]+movswl	%eax, %ecx
+[ 	]*[1-9][0-9]*[ 	]*
+[ 	]*[1-9][0-9]*[ 	]+movzx:
+[ 	]*[1-9][0-9]*[ 	]+movzx	%al, %cl
+[ 	]*[1-9][0-9]*[ 	]+movzx	%ax, %cl
+[ 	]*[1-9][0-9]*[ 	]+movzx	%eax, %cl
+[ 	]*[1-9][0-9]*[ 	]*
+[ 	]*[1-9][0-9]* \?\?\?\? 660FB6C8[ 	]+movzx	%al, %cx
+[ 	]*[1-9][0-9]*[ 	]+movzx	%ax, %cx
+[ 	]*[1-9][0-9]*[ 	]+movzx	%eax, %cx
+[ 	]*[1-9][0-9]*[ 	]*
+[ 	]*[1-9][0-9]* \?\?\?\? 0FB6C8[ 	]+movzx	%al, %ecx
+[ 	]*[1-9][0-9]* \?\?\?\? 0FB7C8[ 	]+movzx	%ax, %ecx
+[ 	]*[1-9][0-9]*[ 	]+movzx	%eax, %ecx
+[ 	]*[1-9][0-9]*[ 	]*
+[ 	]*[1-9][0-9]*[ 	]+movzxb	%al, %cl
+[ 	]*[1-9][0-9]*[ 	]+movzxb	%ax, %cl
+[ 	]*[1-9][0-9]*[ 	]+movzxb	%eax, %cl
+[ 	]*[1-9][0-9]*[ 	]*
+[ 	]*[1-9][0-9]* \?\?\?\? 660FB6C8[ 	]+movzxb	%al, %cx
+[ 	]*[1-9][0-9]*[ 	]+movzxb	%ax, %cx
+[ 	]*[1-9][0-9]*[ 	]+movzxb	%eax, %cx
+[ 	]*[1-9][0-9]*[ 	]*
+[ 	]*[1-9][0-9]* \?\?\?\? 0FB6C8[ 	]+movzxb	%al, %ecx
+[ 	]*[1-9][0-9]*[ 	]+movzxb	%ax, %ecx
+[ 	]*[1-9][0-9]*[ 	]+movzxb	%eax, %ecx
+[ 	]*[1-9][0-9]*[ 	]*
+[ 	]*[1-9][0-9]*[ 	]+movzxw	%al, %cl
+[ 	]*[1-9][0-9]*[ 	]+movzxw	%ax, %cl
+[ 	]*[1-9][0-9]*[ 	]+movzxw	%eax, %cl
+[ 	]*[1-9][0-9]*[ 	]*
+[ 	]*[1-9][0-9]*[ 	]+movzxw	%al, %cx
+[ 	]*[1-9][0-9]*[ 	]+movzxw	%ax, %cx
+[ 	]*[1-9][0-9]*[ 	]+movzxw	%eax, %cx
+[ 	]*[1-9][0-9]*[ 	]*
+[ 	]*[1-9][0-9]*[ 	]+movzxw	%al, %ecx
+[ 	]*[1-9][0-9]* \?\?\?\? 0FB7C8[ 	]+movzxw	%ax, %ecx
+[ 	]*[1-9][0-9]*[ 	]+movzxw	%eax, %ecx
+[ 	]*[1-9][0-9]*[ 	]*
+[ 	]*[1-9][0-9]*[ 	]+movzb	%al, %cl
+[ 	]*[1-9][0-9]*[ 	]+movzb	%ax, %cl
+[ 	]*[1-9][0-9]*[ 	]+movzb	%eax, %cl
+[ 	]*[1-9][0-9]*[ 	]*
+[ 	]*[1-9][0-9]* \?\?\?\? 660FB6C8[ 	]+movzb	%al, %cx
+[ 	]*[1-9][0-9]*[ 	]+movzb	%ax, %cx
+[ 	]*[1-9][0-9]*[ 	]+movzb	%eax, %cx
+[ 	]*[1-9][0-9]*[ 	]*
+[ 	]*[1-9][0-9]* \?\?\?\? 0FB6C8[ 	]+movzb	%al, %ecx
+[ 	]*[1-9][0-9]*[ 	]+movzb	%ax, %ecx
+[ 	]*[1-9][0-9]*[ 	]+movzb	%eax, %ecx
+[ 	]*[1-9][0-9]*[ 	]*
+[ 	]*[1-9][0-9]*[ 	]+movzbw	%al, %cl
+[ 	]*[1-9][0-9]*[ 	]+movzbw	%ax, %cl
+[ 	]*[1-9][0-9]*[ 	]+movzbw	%eax, %cl
+[ 	]*[1-9][0-9]*[ 	]*
+[ 	]*[1-9][0-9]* \?\?\?\? 660FB6C8[ 	]+movzbw	%al, %cx
+[ 	]*[1-9][0-9]*[ 	]+movzbw	%ax, %cx
+[ 	]*[1-9][0-9]*[ 	]+movzbw	%eax, %cx
+[ 	]*[1-9][0-9]*[ 	]*
+[ 	]*[1-9][0-9]* \?\?\?\? 0FB6C8[ 	]+movzbw	%al, %ecx
+[ 	]*[1-9][0-9]*[ 	]+movzbw	%ax, %ecx
+[ 	]*[1-9][0-9]*[ 	]+movzbw	%eax, %ecx
+[ 	]*[1-9][0-9]*[ 	]*
+[ 	]*[1-9][0-9]*[ 	]+movzbl	%al, %cl
+[ 	]*[1-9][0-9]*[ 	]+movzbl	%ax, %cl
+[ 	]*[1-9][0-9]*[ 	]+movzbl	%eax, %cl
+[ 	]*[1-9][0-9]*[ 	]*
+[ 	]*[1-9][0-9]* \?\?\?\? 660FB6C8[ 	]+movzbl	%al, %cx
+[ 	]*[1-9][0-9]*[ 	]+movzbl	%ax, %cx
+[ 	]*[1-9][0-9]*[ 	]+movzbl	%eax, %cx
+[ 	]*[1-9][0-9]*[ 	]*
+[ 	]*[1-9][0-9]* \?\?\?\? 0FB6C8[ 	]+movzbl	%al, %ecx
+[ 	]*[1-9][0-9]*[ 	]+movzbl	%ax, %ecx
+[ 	]*[1-9][0-9]*[ 	]+movzbl	%eax, %ecx
+[ 	]*[1-9][0-9]*[ 	]*
+[ 	]*[1-9][0-9]*[ 	]+movzw	%al, %cl
+[ 	]*[1-9][0-9]*[ 	]+movzw	%ax, %cl
+[ 	]*[1-9][0-9]*[ 	]+movzw	%eax, %cl
+[ 	]*[1-9][0-9]*[ 	]*
+[ 	]*[1-9][0-9]*[ 	]+movzw	%al, %cx
+[ 	]*[1-9][0-9]*[ 	]+movzw	%ax, %cx
+[ 	]*[1-9][0-9]*[ 	]+movzw	%eax, %cx
+[ 	]*[1-9][0-9]*[ 	]*
+[ 	]*[1-9][0-9]*[ 	]+movzw	%al, %ecx
+[ 	]*[1-9][0-9]* \?\?\?\? 0FB7C8[ 	]+movzw	%ax, %ecx
+[ 	]*[1-9][0-9]*[ 	]+movzw	%eax, %ecx
+[ 	]*[1-9][0-9]*[ 	]*
+[ 	]*[1-9][0-9]*[ 	]+movzwl	%al, %cl
+[ 	]*[1-9][0-9]*[ 	]+movzwl	%ax, %cl
+[ 	]*[1-9][0-9]*[ 	]+movzwl	%eax, %cl
+[ 	]*[1-9][0-9]*[ 	]*
+[ 	]*[1-9][0-9]*[ 	]+movzwl	%al, %cx
+[ 	]*[1-9][0-9]*[ 	]+movzwl	%ax, %cx
+[ 	]*[1-9][0-9]*[ 	]+movzwl	%eax, %cx
+[ 	]*[1-9][0-9]*[ 	]*
+[ 	]*[1-9][0-9]*[ 	]+movzwl	%al, %ecx
+[ 	]*[1-9][0-9]* \?\?\?\? 0FB7C8[ 	]+movzwl	%ax, %ecx
+[ 	]*[1-9][0-9]*[ 	]+movzwl	%eax, %ecx
+[ 	]*[1-9][0-9]*[ 	]*
+#pass
--- /dev/null
+++ b/gas/testsuite/gas/i386/movx32.s
@@ -0,0 +1,197 @@ 
+	.text
+	.psize 0
+movsx:
+	movsx	%al, %cl
+	movsx	%ax, %cl
+	movsx	%eax, %cl
+
+	movsx	%al, %cx
+	movsx	%ax, %cx
+	movsx	%eax, %cx
+
+	movsx	%al, %ecx
+	movsx	%ax, %ecx
+	movsx	%eax, %ecx
+
+	movsxb	%al, %cl
+	movsxb	%ax, %cl
+	movsxb	%eax, %cl
+
+	movsxb	%al, %cx
+	movsxb	%ax, %cx
+	movsxb	%eax, %cx
+
+	movsxb	%al, %ecx
+	movsxb	%ax, %ecx
+	movsxb	%eax, %ecx
+
+	movsxw	%al, %cl
+	movsxw	%ax, %cl
+	movsxw	%eax, %cl
+
+	movsxw	%al, %cx
+	movsxw	%ax, %cx
+	movsxw	%eax, %cx
+
+	movsxw	%al, %ecx
+	movsxw	%ax, %ecx
+	movsxw	%eax, %ecx
+
+	movsb	%al, %cl
+	movsb	%ax, %cl
+	movsb	%eax, %cl
+
+	movsb	%al, %cx
+	movsb	%ax, %cx
+	movsb	%eax, %cx
+
+	movsb	%al, %ecx
+	movsb	%ax, %ecx
+	movsb	%eax, %ecx
+
+	movsbw	%al, %cl
+	movsbw	%ax, %cl
+	movsbw	%eax, %cl
+
+	movsbw	%al, %cx
+	movsbw	%ax, %cx
+	movsbw	%eax, %cx
+
+	movsbw	%al, %ecx
+	movsbw	%ax, %ecx
+	movsbw	%eax, %ecx
+
+	movsbl	%al, %cl
+	movsbl	%ax, %cl
+	movsbl	%eax, %cl
+
+	movsbl	%al, %cx
+	movsbl	%ax, %cx
+	movsbl	%eax, %cx
+
+	movsbl	%al, %ecx
+	movsbl	%ax, %ecx
+	movsbl	%eax, %ecx
+
+	movsw	%al, %cl
+	movsw	%ax, %cl
+	movsw	%eax, %cl
+
+	movsw	%al, %cx
+	movsw	%ax, %cx
+	movsw	%eax, %cx
+
+	movsw	%al, %ecx
+	movsw	%ax, %ecx
+	movsw	%eax, %ecx
+
+	movswl	%al, %cl
+	movswl	%ax, %cl
+	movswl	%eax, %cl
+
+	movswl	%al, %cx
+	movswl	%ax, %cx
+	movswl	%eax, %cx
+
+	movswl	%al, %ecx
+	movswl	%ax, %ecx
+	movswl	%eax, %ecx
+
+movzx:
+	movzx	%al, %cl
+	movzx	%ax, %cl
+	movzx	%eax, %cl
+
+	movzx	%al, %cx
+	movzx	%ax, %cx
+	movzx	%eax, %cx
+
+	movzx	%al, %ecx
+	movzx	%ax, %ecx
+	movzx	%eax, %ecx
+
+	movzxb	%al, %cl
+	movzxb	%ax, %cl
+	movzxb	%eax, %cl
+
+	movzxb	%al, %cx
+	movzxb	%ax, %cx
+	movzxb	%eax, %cx
+
+	movzxb	%al, %ecx
+	movzxb	%ax, %ecx
+	movzxb	%eax, %ecx
+
+	movzxw	%al, %cl
+	movzxw	%ax, %cl
+	movzxw	%eax, %cl
+
+	movzxw	%al, %cx
+	movzxw	%ax, %cx
+	movzxw	%eax, %cx
+
+	movzxw	%al, %ecx
+	movzxw	%ax, %ecx
+	movzxw	%eax, %ecx
+
+	movzb	%al, %cl
+	movzb	%ax, %cl
+	movzb	%eax, %cl
+
+	movzb	%al, %cx
+	movzb	%ax, %cx
+	movzb	%eax, %cx
+
+	movzb	%al, %ecx
+	movzb	%ax, %ecx
+	movzb	%eax, %ecx
+
+	movzbw	%al, %cl
+	movzbw	%ax, %cl
+	movzbw	%eax, %cl
+
+	movzbw	%al, %cx
+	movzbw	%ax, %cx
+	movzbw	%eax, %cx
+
+	movzbw	%al, %ecx
+	movzbw	%ax, %ecx
+	movzbw	%eax, %ecx
+
+	movzbl	%al, %cl
+	movzbl	%ax, %cl
+	movzbl	%eax, %cl
+
+	movzbl	%al, %cx
+	movzbl	%ax, %cx
+	movzbl	%eax, %cx
+
+	movzbl	%al, %ecx
+	movzbl	%ax, %ecx
+	movzbl	%eax, %ecx
+
+	movzw	%al, %cl
+	movzw	%ax, %cl
+	movzw	%eax, %cl
+
+	movzw	%al, %cx
+	movzw	%ax, %cx
+	movzw	%eax, %cx
+
+	movzw	%al, %ecx
+	movzw	%ax, %ecx
+	movzw	%eax, %ecx
+
+	movzwl	%al, %cl
+	movzwl	%ax, %cl
+	movzwl	%eax, %cl
+
+	movzwl	%al, %cx
+	movzwl	%ax, %cx
+	movzwl	%eax, %cx
+
+	movzwl	%al, %ecx
+	movzwl	%ax, %ecx
+	movzwl	%eax, %ecx
+
+	.p2align 4
--- /dev/null
+++ b/gas/testsuite/gas/i386/movx64.l
@@ -0,0 +1,485 @@ 
+.*: Assembler messages:
+#...
+[ 	]*[1-9][0-9]*[ 	]+movsx:
+[ 	]*[1-9][0-9]*[ 	]+movsx	%al, %cl
+[ 	]*[1-9][0-9]*[ 	]+movsx	%ax, %cl
+[ 	]*[1-9][0-9]*[ 	]+movsx	%eax, %cl
+[ 	]*[1-9][0-9]*[ 	]+movsx	%rax, %cl
+[ 	]*[1-9][0-9]*[ 	]*
+[ 	]*[1-9][0-9]* \?\?\?\? 660FBEC8[ 	]+movsx	%al, %cx
+[ 	]*[1-9][0-9]*[ 	]+movsx	%ax, %cx
+[ 	]*[1-9][0-9]*[ 	]+movsx	%eax, %cx
+[ 	]*[1-9][0-9]*[ 	]+movsx	%rax, %cx
+[ 	]*[1-9][0-9]*[ 	]*
+[ 	]*[1-9][0-9]* \?\?\?\? 0FBEC8[ 	]+movsx	%al, %ecx
+[ 	]*[1-9][0-9]* \?\?\?\? 0FBFC8[ 	]+movsx	%ax, %ecx
+[ 	]*[1-9][0-9]*[ 	]+movsx	%eax, %ecx
+[ 	]*[1-9][0-9]*[ 	]+movsx	%rax, %ecx
+[ 	]*[1-9][0-9]*[ 	]*
+[ 	]*[1-9][0-9]* \?\?\?\? 480FBEC8[ 	]+movsx	%al, %rcx
+[ 	]*[1-9][0-9]* \?\?\?\? 480FBFC8[ 	]+movsx	%ax, %rcx
+[ 	]*[1-9][0-9]* \?\?\?\? 4863C8[ 	]+movsx	%eax, %rcx
+[ 	]*[1-9][0-9]*[ 	]+movsx	%rax, %rcx
+[ 	]*[1-9][0-9]*[ 	]*
+[ 	]*[1-9][0-9]*[ 	]+movsxb	%al, %cl
+[ 	]*[1-9][0-9]*[ 	]+movsxb	%ax, %cl
+[ 	]*[1-9][0-9]*[ 	]+movsxb	%eax, %cl
+[ 	]*[1-9][0-9]*[ 	]+movsxb	%rax, %cl
+[ 	]*[1-9][0-9]*[ 	]*
+[ 	]*[1-9][0-9]* \?\?\?\? 660FBEC8[ 	]+movsxb	%al, %cx
+[ 	]*[1-9][0-9]*[ 	]+movsxb	%ax, %cx
+[ 	]*[1-9][0-9]*[ 	]+movsxb	%eax, %cx
+[ 	]*[1-9][0-9]*[ 	]+movsxb	%rax, %cx
+[ 	]*[1-9][0-9]*[ 	]*
+[ 	]*[1-9][0-9]* \?\?\?\? 0FBEC8[ 	]+movsxb	%al, %ecx
+[ 	]*[1-9][0-9]*[ 	]+movsxb	%ax, %ecx
+[ 	]*[1-9][0-9]*[ 	]+movsxb	%eax, %ecx
+[ 	]*[1-9][0-9]*[ 	]+movsxb	%rax, %ecx
+[ 	]*[1-9][0-9]*[ 	]*
+[ 	]*[1-9][0-9]* \?\?\?\? 480FBEC8[ 	]+movsxb	%al, %rcx
+[ 	]*[1-9][0-9]*[ 	]+movsxb	%ax, %rcx
+[ 	]*[1-9][0-9]*[ 	]+movsxb	%eax, %rcx
+[ 	]*[1-9][0-9]*[ 	]+movsxb	%rax, %rcx
+[ 	]*[1-9][0-9]*[ 	]*
+[ 	]*[1-9][0-9]*[ 	]+movsxw	%al, %cl
+[ 	]*[1-9][0-9]*[ 	]+movsxw	%ax, %cl
+[ 	]*[1-9][0-9]*[ 	]+movsxw	%eax, %cl
+[ 	]*[1-9][0-9]*[ 	]+movsxw	%rax, %cl
+[ 	]*[1-9][0-9]*[ 	]*
+[ 	]*[1-9][0-9]*[ 	]+movsxw	%al, %cx
+[ 	]*[1-9][0-9]*[ 	]+movsxw	%ax, %cx
+[ 	]*[1-9][0-9]*[ 	]+movsxw	%eax, %cx
+[ 	]*[1-9][0-9]*[ 	]+movsxw	%rax, %cx
+[ 	]*[1-9][0-9]*[ 	]*
+[ 	]*[1-9][0-9]*[ 	]+movsxw	%al, %ecx
+[ 	]*[1-9][0-9]* \?\?\?\? 0FBFC8[ 	]+movsxw	%ax, %ecx
+[ 	]*[1-9][0-9]*[ 	]+movsxw	%eax, %ecx
+[ 	]*[1-9][0-9]*[ 	]+movsxw	%rax, %ecx
+[ 	]*[1-9][0-9]*[ 	]*
+[ 	]*[1-9][0-9]*[ 	]+movsxw	%al, %rcx
+[ 	]*[1-9][0-9]* \?\?\?\? 480FBFC8[ 	]+movsxw	%ax, %rcx
+[ 	]*[1-9][0-9]*[ 	]+movsxw	%eax, %rcx
+[ 	]*[1-9][0-9]*[ 	]+movsxw	%rax, %rcx
+[ 	]*[1-9][0-9]*[ 	]*
+[ 	]*[1-9][0-9]*[ 	]+movsxl	%al, %cl
+[ 	]*[1-9][0-9]*[ 	]+movsxl	%ax, %cl
+[ 	]*[1-9][0-9]*[ 	]+movsxl	%eax, %cl
+[ 	]*[1-9][0-9]*[ 	]+movsxl	%rax, %cl
+[ 	]*[1-9][0-9]*[ 	]*
+[ 	]*[1-9][0-9]*[ 	]+movsxl	%al, %cx
+[ 	]*[1-9][0-9]*[ 	]+movsxl	%ax, %cx
+[ 	]*[1-9][0-9]*[ 	]+movsxl	%eax, %cx
+[ 	]*[1-9][0-9]*[ 	]+movsxl	%rax, %cx
+[ 	]*[1-9][0-9]*[ 	]*
+[ 	]*[1-9][0-9]*[ 	]+movsxl	%al, %ecx
+[ 	]*[1-9][0-9]*[ 	]+movsxl	%ax, %ecx
+[ 	]*[1-9][0-9]*[ 	]+movsxl	%eax, %ecx
+[ 	]*[1-9][0-9]*[ 	]+movsxl	%rax, %ecx
+[ 	]*[1-9][0-9]*[ 	]*
+[ 	]*[1-9][0-9]*[ 	]+movsxl	%al, %rcx
+[ 	]*[1-9][0-9]*[ 	]+movsxl	%ax, %rcx
+[ 	]*[1-9][0-9]* \?\?\?\? 4863C8[ 	]+movsxl	%eax, %rcx
+[ 	]*[1-9][0-9]*[ 	]+movsxl	%rax, %rcx
+[ 	]*[1-9][0-9]*[ 	]*
+[ 	]*[1-9][0-9]*[ 	]+movsxd	%al, %cl
+[ 	]*[1-9][0-9]*[ 	]+movsxd	%ax, %cl
+[ 	]*[1-9][0-9]*[ 	]+movsxd	%eax, %cl
+[ 	]*[1-9][0-9]*[ 	]+movsxd	%rax, %cl
+[ 	]*[1-9][0-9]*[ 	]*
+[ 	]*[1-9][0-9]*[ 	]+movsxd	%al, %cx
+[ 	]*[1-9][0-9]*[ 	]+movsxd	%ax, %cx
+[ 	]*[1-9][0-9]* \?\?\?\? 6663C8[ 	]+movsxd	%eax, %cx
+[ 	]*[1-9][0-9]*[ 	]+movsxd	%rax, %cx
+[ 	]*[1-9][0-9]*[ 	]*
+[ 	]*[1-9][0-9]*[ 	]+movsxd	%al, %ecx
+[ 	]*[1-9][0-9]*[ 	]+movsxd	%ax, %ecx
+[ 	]*[1-9][0-9]* \?\?\?\? 63C8[ 	]+movsxd	%eax, %ecx
+[ 	]*[1-9][0-9]*[ 	]+movsxd	%rax, %ecx
+[ 	]*[1-9][0-9]*[ 	]*
+[ 	]*[1-9][0-9]*[ 	]+movsxd	%al, %rcx
+[ 	]*[1-9][0-9]*[ 	]+movsxd	%ax, %rcx
+[ 	]*[1-9][0-9]* \?\?\?\? 4863C8[ 	]+movsxd	%eax, %rcx
+[ 	]*[1-9][0-9]*[ 	]+movsxd	%rax, %rcx
+[ 	]*[1-9][0-9]*[ 	]*
+[ 	]*[1-9][0-9]*[ 	]+movsb	%al, %cl
+[ 	]*[1-9][0-9]*[ 	]+movsb	%ax, %cl
+[ 	]*[1-9][0-9]*[ 	]+movsb	%eax, %cl
+[ 	]*[1-9][0-9]*[ 	]+movsb	%rax, %cl
+[ 	]*[1-9][0-9]*[ 	]*
+[ 	]*[1-9][0-9]*[ 	]+movsb	%al, %cx
+[ 	]*[1-9][0-9]*[ 	]+movsb	%ax, %cx
+[ 	]*[1-9][0-9]*[ 	]+movsb	%eax, %cx
+[ 	]*[1-9][0-9]*[ 	]+movsb	%rax, %cx
+[ 	]*[1-9][0-9]*[ 	]*
+[ 	]*[1-9][0-9]*[ 	]+movsb	%al, %ecx
+[ 	]*[1-9][0-9]*[ 	]+movsb	%ax, %ecx
+[ 	]*[1-9][0-9]*[ 	]+movsb	%eax, %ecx
+[ 	]*[1-9][0-9]*[ 	]+movsb	%rax, %ecx
+[ 	]*[1-9][0-9]*[ 	]*
+[ 	]*[1-9][0-9]*[ 	]+movsb	%al, %rcx
+[ 	]*[1-9][0-9]*[ 	]+movsb	%ax, %rcx
+[ 	]*[1-9][0-9]*[ 	]+movsb	%eax, %rcx
+[ 	]*[1-9][0-9]*[ 	]+movsb	%rax, %rcx
+[ 	]*[1-9][0-9]*[ 	]*
+[ 	]*[1-9][0-9]*[ 	]+movsbw	%al, %cl
+[ 	]*[1-9][0-9]*[ 	]+movsbw	%ax, %cl
+[ 	]*[1-9][0-9]*[ 	]+movsbw	%eax, %cl
+[ 	]*[1-9][0-9]*[ 	]+movsbw	%rax, %cl
+[ 	]*[1-9][0-9]*[ 	]*
+[ 	]*[1-9][0-9]* \?\?\?\? 660FBEC8[ 	]+movsbw	%al, %cx
+[ 	]*[1-9][0-9]*[ 	]+movsbw	%ax, %cx
+[ 	]*[1-9][0-9]*[ 	]+movsbw	%eax, %cx
+[ 	]*[1-9][0-9]*[ 	]+movsbw	%rax, %cx
+[ 	]*[1-9][0-9]*[ 	]*
+[ 	]*[1-9][0-9]*[ 	]+movsbw	%al, %ecx
+[ 	]*[1-9][0-9]*[ 	]+movsbw	%ax, %ecx
+[ 	]*[1-9][0-9]*[ 	]+movsbw	%eax, %ecx
+[ 	]*[1-9][0-9]*[ 	]+movsbw	%rax, %ecx
+[ 	]*[1-9][0-9]*[ 	]*
+[ 	]*[1-9][0-9]*[ 	]+movsbw	%al, %rcx
+[ 	]*[1-9][0-9]*[ 	]+movsbw	%ax, %rcx
+[ 	]*[1-9][0-9]*[ 	]+movsbw	%eax, %rcx
+[ 	]*[1-9][0-9]*[ 	]+movsbw	%rax, %rcx
+[ 	]*[1-9][0-9]*[ 	]*
+[ 	]*[1-9][0-9]*[ 	]+movsbl	%al, %cl
+[ 	]*[1-9][0-9]*[ 	]+movsbl	%ax, %cl
+[ 	]*[1-9][0-9]*[ 	]+movsbl	%eax, %cl
+[ 	]*[1-9][0-9]*[ 	]+movsbl	%rax, %cl
+[ 	]*[1-9][0-9]*[ 	]*
+[ 	]*[1-9][0-9]*[ 	]+movsbl	%al, %cx
+[ 	]*[1-9][0-9]*[ 	]+movsbl	%ax, %cx
+[ 	]*[1-9][0-9]*[ 	]+movsbl	%eax, %cx
+[ 	]*[1-9][0-9]*[ 	]+movsbl	%rax, %cx
+[ 	]*[1-9][0-9]*[ 	]*
+[ 	]*[1-9][0-9]* \?\?\?\? 0FBEC8[ 	]+movsbl	%al, %ecx
+[ 	]*[1-9][0-9]*[ 	]+movsbl	%ax, %ecx
+[ 	]*[1-9][0-9]*[ 	]+movsbl	%eax, %ecx
+[ 	]*[1-9][0-9]*[ 	]+movsbl	%rax, %ecx
+[ 	]*[1-9][0-9]*[ 	]*
+[ 	]*[1-9][0-9]*[ 	]+movsbl	%al, %rcx
+[ 	]*[1-9][0-9]*[ 	]+movsbl	%ax, %rcx
+[ 	]*[1-9][0-9]*[ 	]+movsbl	%eax, %rcx
+[ 	]*[1-9][0-9]*[ 	]+movsbl	%rax, %rcx
+[ 	]*[1-9][0-9]*[ 	]*
+[ 	]*[1-9][0-9]*[ 	]+movsbq	%al, %cl
+[ 	]*[1-9][0-9]*[ 	]+movsbq	%ax, %cl
+[ 	]*[1-9][0-9]*[ 	]+movsbq	%eax, %cl
+[ 	]*[1-9][0-9]*[ 	]+movsbq	%rax, %cl
+[ 	]*[1-9][0-9]*[ 	]*
+[ 	]*[1-9][0-9]*[ 	]+movsbq	%al, %cx
+[ 	]*[1-9][0-9]*[ 	]+movsbq	%ax, %cx
+[ 	]*[1-9][0-9]*[ 	]+movsbq	%eax, %cx
+[ 	]*[1-9][0-9]*[ 	]+movsbq	%rax, %cx
+[ 	]*[1-9][0-9]*[ 	]*
+[ 	]*[1-9][0-9]*[ 	]+movsbq	%al, %ecx
+[ 	]*[1-9][0-9]*[ 	]+movsbq	%ax, %ecx
+[ 	]*[1-9][0-9]*[ 	]+movsbq	%eax, %ecx
+[ 	]*[1-9][0-9]*[ 	]+movsbq	%rax, %ecx
+[ 	]*[1-9][0-9]*[ 	]*
+[ 	]*[1-9][0-9]* \?\?\?\? 480FBEC8[ 	]+movsbq	%al, %rcx
+[ 	]*[1-9][0-9]*[ 	]+movsbq	%ax, %rcx
+[ 	]*[1-9][0-9]*[ 	]+movsbq	%eax, %rcx
+[ 	]*[1-9][0-9]*[ 	]+movsbq	%rax, %rcx
+[ 	]*[1-9][0-9]*[ 	]*
+[ 	]*[1-9][0-9]*[ 	]+movsw	%al, %cl
+[ 	]*[1-9][0-9]*[ 	]+movsw	%ax, %cl
+[ 	]*[1-9][0-9]*[ 	]+movsw	%eax, %cl
+[ 	]*[1-9][0-9]*[ 	]+movsw	%rax, %cl
+[ 	]*[1-9][0-9]*[ 	]*
+[ 	]*[1-9][0-9]*[ 	]+movsw	%al, %cx
+[ 	]*[1-9][0-9]*[ 	]+movsw	%ax, %cx
+[ 	]*[1-9][0-9]*[ 	]+movsw	%eax, %cx
+[ 	]*[1-9][0-9]*[ 	]+movsw	%rax, %cx
+[ 	]*[1-9][0-9]*[ 	]*
+[ 	]*[1-9][0-9]*[ 	]+movsw	%al, %ecx
+[ 	]*[1-9][0-9]*[ 	]+movsw	%ax, %ecx
+[ 	]*[1-9][0-9]*[ 	]+movsw	%eax, %ecx
+[ 	]*[1-9][0-9]*[ 	]+movsw	%rax, %ecx
+[ 	]*[1-9][0-9]*[ 	]*
+[ 	]*[1-9][0-9]*[ 	]+movsw	%al, %rcx
+[ 	]*[1-9][0-9]*[ 	]+movsw	%ax, %rcx
+[ 	]*[1-9][0-9]*[ 	]+movsw	%eax, %rcx
+[ 	]*[1-9][0-9]*[ 	]+movsw	%rax, %rcx
+[ 	]*[1-9][0-9]*[ 	]*
+[ 	]*[1-9][0-9]*[ 	]+movswl	%al, %cl
+[ 	]*[1-9][0-9]*[ 	]+movswl	%ax, %cl
+[ 	]*[1-9][0-9]*[ 	]+movswl	%eax, %cl
+[ 	]*[1-9][0-9]*[ 	]+movswl	%rax, %cl
+[ 	]*[1-9][0-9]*[ 	]*
+[ 	]*[1-9][0-9]*[ 	]+movswl	%al, %cx
+[ 	]*[1-9][0-9]*[ 	]+movswl	%ax, %cx
+[ 	]*[1-9][0-9]*[ 	]+movswl	%eax, %cx
+[ 	]*[1-9][0-9]*[ 	]+movswl	%rax, %cx
+[ 	]*[1-9][0-9]*[ 	]*
+[ 	]*[1-9][0-9]*[ 	]+movswl	%al, %ecx
+[ 	]*[1-9][0-9]* \?\?\?\? 0FBFC8[ 	]+movswl	%ax, %ecx
+[ 	]*[1-9][0-9]*[ 	]+movswl	%eax, %ecx
+[ 	]*[1-9][0-9]*[ 	]+movswl	%rax, %ecx
+[ 	]*[1-9][0-9]*[ 	]*
+[ 	]*[1-9][0-9]*[ 	]+movswl	%al, %rcx
+[ 	]*[1-9][0-9]*[ 	]+movswl	%ax, %rcx
+[ 	]*[1-9][0-9]*[ 	]+movswl	%eax, %rcx
+[ 	]*[1-9][0-9]*[ 	]+movswl	%rax, %rcx
+[ 	]*[1-9][0-9]*[ 	]*
+[ 	]*[1-9][0-9]*[ 	]+movswq	%al, %cl
+[ 	]*[1-9][0-9]*[ 	]+movswq	%ax, %cl
+[ 	]*[1-9][0-9]*[ 	]+movswq	%eax, %cl
+[ 	]*[1-9][0-9]*[ 	]+movswq	%rax, %cl
+[ 	]*[1-9][0-9]*[ 	]*
+[ 	]*[1-9][0-9]*[ 	]+movswq	%al, %cx
+[ 	]*[1-9][0-9]*[ 	]+movswq	%ax, %cx
+[ 	]*[1-9][0-9]*[ 	]+movswq	%eax, %cx
+[ 	]*[1-9][0-9]*[ 	]+movswq	%rax, %cx
+[ 	]*[1-9][0-9]*[ 	]*
+[ 	]*[1-9][0-9]*[ 	]+movswq	%al, %ecx
+[ 	]*[1-9][0-9]*[ 	]+movswq	%ax, %ecx
+[ 	]*[1-9][0-9]*[ 	]+movswq	%eax, %ecx
+[ 	]*[1-9][0-9]*[ 	]+movswq	%rax, %ecx
+[ 	]*[1-9][0-9]*[ 	]*
+[ 	]*[1-9][0-9]*[ 	]+movswq	%al, %rcx
+[ 	]*[1-9][0-9]* \?\?\?\? 480FBFC8[ 	]+movswq	%ax, %rcx
+[ 	]*[1-9][0-9]*[ 	]+movswq	%eax, %rcx
+[ 	]*[1-9][0-9]*[ 	]+movswq	%rax, %rcx
+[ 	]*[1-9][0-9]*[ 	]*
+[ 	]*[1-9][0-9]*[ 	]+movzx:
+[ 	]*[1-9][0-9]*[ 	]+movzx	%al, %cl
+[ 	]*[1-9][0-9]*[ 	]+movzx	%ax, %cl
+[ 	]*[1-9][0-9]*[ 	]+movzx	%eax, %cl
+[ 	]*[1-9][0-9]*[ 	]+movzx	%rax, %cl
+[ 	]*[1-9][0-9]*[ 	]*
+[ 	]*[1-9][0-9]* \?\?\?\? 660FB6C8[ 	]+movzx	%al, %cx
+[ 	]*[1-9][0-9]*[ 	]+movzx	%ax, %cx
+[ 	]*[1-9][0-9]*[ 	]+movzx	%eax, %cx
+[ 	]*[1-9][0-9]*[ 	]+movzx	%rax, %cx
+[ 	]*[1-9][0-9]*[ 	]*
+[ 	]*[1-9][0-9]* \?\?\?\? 0FB6C8[ 	]+movzx	%al, %ecx
+[ 	]*[1-9][0-9]* \?\?\?\? 0FB7C8[ 	]+movzx	%ax, %ecx
+[ 	]*[1-9][0-9]*[ 	]+movzx	%eax, %ecx
+[ 	]*[1-9][0-9]*[ 	]+movzx	%rax, %ecx
+[ 	]*[1-9][0-9]*[ 	]*
+[ 	]*[1-9][0-9]* \?\?\?\? 480FB6C8[ 	]+movzx	%al, %rcx
+[ 	]*[1-9][0-9]* \?\?\?\? 480FB7C8[ 	]+movzx	%ax, %rcx
+[ 	]*[1-9][0-9]*[ 	]+movzx	%eax, %rcx
+[ 	]*[1-9][0-9]*[ 	]+movzx	%rax, %rcx
+[ 	]*[1-9][0-9]*[ 	]*
+[ 	]*[1-9][0-9]*[ 	]+movzxb	%al, %cl
+[ 	]*[1-9][0-9]*[ 	]+movzxb	%ax, %cl
+[ 	]*[1-9][0-9]*[ 	]+movzxb	%eax, %cl
+[ 	]*[1-9][0-9]*[ 	]+movzxb	%rax, %cl
+[ 	]*[1-9][0-9]*[ 	]*
+[ 	]*[1-9][0-9]* \?\?\?\? 660FB6C8[ 	]+movzxb	%al, %cx
+[ 	]*[1-9][0-9]*[ 	]+movzxb	%ax, %cx
+[ 	]*[1-9][0-9]*[ 	]+movzxb	%eax, %cx
+[ 	]*[1-9][0-9]*[ 	]+movzxb	%rax, %cx
+[ 	]*[1-9][0-9]*[ 	]*
+[ 	]*[1-9][0-9]* \?\?\?\? 0FB6C8[ 	]+movzxb	%al, %ecx
+[ 	]*[1-9][0-9]*[ 	]+movzxb	%ax, %ecx
+[ 	]*[1-9][0-9]*[ 	]+movzxb	%eax, %ecx
+[ 	]*[1-9][0-9]*[ 	]+movzxb	%rax, %ecx
+[ 	]*[1-9][0-9]*[ 	]*
+[ 	]*[1-9][0-9]* \?\?\?\? 480FB6C8[ 	]+movzxb	%al, %rcx
+[ 	]*[1-9][0-9]*[ 	]+movzxb	%ax, %rcx
+[ 	]*[1-9][0-9]*[ 	]+movzxb	%eax, %rcx
+[ 	]*[1-9][0-9]*[ 	]+movzxb	%rax, %rcx
+[ 	]*[1-9][0-9]*[ 	]*
+[ 	]*[1-9][0-9]*[ 	]+movzxw	%al, %cl
+[ 	]*[1-9][0-9]*[ 	]+movzxw	%ax, %cl
+[ 	]*[1-9][0-9]*[ 	]+movzxw	%eax, %cl
+[ 	]*[1-9][0-9]*[ 	]+movzxw	%rax, %cl
+[ 	]*[1-9][0-9]*[ 	]*
+[ 	]*[1-9][0-9]*[ 	]+movzxw	%al, %cx
+[ 	]*[1-9][0-9]*[ 	]+movzxw	%ax, %cx
+[ 	]*[1-9][0-9]*[ 	]+movzxw	%eax, %cx
+[ 	]*[1-9][0-9]*[ 	]+movzxw	%rax, %cx
+[ 	]*[1-9][0-9]*[ 	]*
+[ 	]*[1-9][0-9]*[ 	]+movzxw	%al, %ecx
+[ 	]*[1-9][0-9]* \?\?\?\? 0FB7C8[ 	]+movzxw	%ax, %ecx
+[ 	]*[1-9][0-9]*[ 	]+movzxw	%eax, %ecx
+[ 	]*[1-9][0-9]*[ 	]+movzxw	%rax, %ecx
+[ 	]*[1-9][0-9]*[ 	]*
+[ 	]*[1-9][0-9]*[ 	]+movzxw	%al, %rcx
+[ 	]*[1-9][0-9]* \?\?\?\? 480FB7C8[ 	]+movzxw	%ax, %rcx
+[ 	]*[1-9][0-9]*[ 	]+movzxw	%eax, %rcx
+[ 	]*[1-9][0-9]*[ 	]+movzxw	%rax, %rcx
+[ 	]*[1-9][0-9]*[ 	]*
+[ 	]*[1-9][0-9]*[ 	]+movzxl	%al, %cl
+[ 	]*[1-9][0-9]*[ 	]+movzxl	%ax, %cl
+[ 	]*[1-9][0-9]*[ 	]+movzxl	%eax, %cl
+[ 	]*[1-9][0-9]*[ 	]+movzxl	%rax, %cl
+[ 	]*[1-9][0-9]*[ 	]*
+[ 	]*[1-9][0-9]*[ 	]+movzxl	%al, %cx
+[ 	]*[1-9][0-9]*[ 	]+movzxl	%ax, %cx
+[ 	]*[1-9][0-9]*[ 	]+movzxl	%eax, %cx
+[ 	]*[1-9][0-9]*[ 	]+movzxl	%rax, %cx
+[ 	]*[1-9][0-9]*[ 	]*
+[ 	]*[1-9][0-9]*[ 	]+movzxl	%al, %ecx
+[ 	]*[1-9][0-9]*[ 	]+movzxl	%ax, %ecx
+[ 	]*[1-9][0-9]*[ 	]+movzxl	%eax, %ecx
+[ 	]*[1-9][0-9]*[ 	]+movzxl	%rax, %ecx
+[ 	]*[1-9][0-9]*[ 	]*
+[ 	]*[1-9][0-9]*[ 	]+movzxl	%al, %rcx
+[ 	]*[1-9][0-9]*[ 	]+movzxl	%ax, %rcx
+[ 	]*[1-9][0-9]*[ 	]+movzxl	%eax, %rcx
+[ 	]*[1-9][0-9]*[ 	]+movzxl	%rax, %rcx
+[ 	]*[1-9][0-9]*[ 	]*
+[ 	]*[1-9][0-9]*[ 	]+movzxd	%al, %cl
+[ 	]*[1-9][0-9]*[ 	]+movzxd	%ax, %cl
+[ 	]*[1-9][0-9]*[ 	]+movzxd	%eax, %cl
+[ 	]*[1-9][0-9]*[ 	]+movzxd	%rax, %cl
+[ 	]*[1-9][0-9]*[ 	]*
+[ 	]*[1-9][0-9]*[ 	]+movzxd	%al, %cx
+[ 	]*[1-9][0-9]*[ 	]+movzxd	%ax, %cx
+[ 	]*[1-9][0-9]*[ 	]+movzxd	%eax, %cx
+[ 	]*[1-9][0-9]*[ 	]+movzxd	%rax, %cx
+[ 	]*[1-9][0-9]*[ 	]*
+[ 	]*[1-9][0-9]*[ 	]+movzxd	%al, %ecx
+[ 	]*[1-9][0-9]*[ 	]+movzxd	%ax, %ecx
+[ 	]*[1-9][0-9]*[ 	]+movzxd	%eax, %ecx
+[ 	]*[1-9][0-9]*[ 	]+movzxd	%rax, %ecx
+[ 	]*[1-9][0-9]*[ 	]*
+[ 	]*[1-9][0-9]*[ 	]+movzxd	%al, %rcx
+[ 	]*[1-9][0-9]*[ 	]+movzxd	%ax, %rcx
+[ 	]*[1-9][0-9]*[ 	]+movzxd	%eax, %rcx
+[ 	]*[1-9][0-9]*[ 	]+movzxd	%rax, %rcx
+[ 	]*[1-9][0-9]*[ 	]*
+[ 	]*[1-9][0-9]*[ 	]+movzb	%al, %cl
+[ 	]*[1-9][0-9]*[ 	]+movzb	%ax, %cl
+[ 	]*[1-9][0-9]*[ 	]+movzb	%eax, %cl
+[ 	]*[1-9][0-9]*[ 	]+movzb	%rax, %cl
+[ 	]*[1-9][0-9]*[ 	]*
+[ 	]*[1-9][0-9]* \?\?\?\? 660FB6C8[ 	]+movzb	%al, %cx
+[ 	]*[1-9][0-9]*[ 	]+movzb	%ax, %cx
+[ 	]*[1-9][0-9]*[ 	]+movzb	%eax, %cx
+[ 	]*[1-9][0-9]*[ 	]+movzb	%rax, %cx
+[ 	]*[1-9][0-9]*[ 	]*
+[ 	]*[1-9][0-9]* \?\?\?\? 0FB6C8[ 	]+movzb	%al, %ecx
+[ 	]*[1-9][0-9]*[ 	]+movzb	%ax, %ecx
+[ 	]*[1-9][0-9]*[ 	]+movzb	%eax, %ecx
+[ 	]*[1-9][0-9]*[ 	]+movzb	%rax, %ecx
+[ 	]*[1-9][0-9]*[ 	]*
+[ 	]*[1-9][0-9]* \?\?\?\? 480FB6C8[ 	]+movzb	%al, %rcx
+[ 	]*[1-9][0-9]*[ 	]+movzb	%ax, %rcx
+[ 	]*[1-9][0-9]*[ 	]+movzb	%eax, %rcx
+[ 	]*[1-9][0-9]*[ 	]+movzb	%rax, %rcx
+[ 	]*[1-9][0-9]*[ 	]*
+[ 	]*[1-9][0-9]*[ 	]+movzbw	%al, %cl
+[ 	]*[1-9][0-9]*[ 	]+movzbw	%ax, %cl
+[ 	]*[1-9][0-9]*[ 	]+movzbw	%eax, %cl
+[ 	]*[1-9][0-9]*[ 	]+movzbw	%rax, %cl
+[ 	]*[1-9][0-9]*[ 	]*
+[ 	]*[1-9][0-9]* \?\?\?\? 660FB6C8[ 	]+movzbw	%al, %cx
+[ 	]*[1-9][0-9]*[ 	]+movzbw	%ax, %cx
+[ 	]*[1-9][0-9]*[ 	]+movzbw	%eax, %cx
+[ 	]*[1-9][0-9]*[ 	]+movzbw	%rax, %cx
+[ 	]*[1-9][0-9]*[ 	]*
+[ 	]*[1-9][0-9]* \?\?\?\? 0FB6C8[ 	]+movzbw	%al, %ecx
+[ 	]*[1-9][0-9]*[ 	]+movzbw	%ax, %ecx
+[ 	]*[1-9][0-9]*[ 	]+movzbw	%eax, %ecx
+[ 	]*[1-9][0-9]*[ 	]+movzbw	%rax, %ecx
+[ 	]*[1-9][0-9]*[ 	]*
+[ 	]*[1-9][0-9]* \?\?\?\? 480FB6C8[ 	]+movzbw	%al, %rcx
+[ 	]*[1-9][0-9]*[ 	]+movzbw	%ax, %rcx
+[ 	]*[1-9][0-9]*[ 	]+movzbw	%eax, %rcx
+[ 	]*[1-9][0-9]*[ 	]+movzbw	%rax, %rcx
+[ 	]*[1-9][0-9]*[ 	]*
+[ 	]*[1-9][0-9]*[ 	]+movzbl	%al, %cl
+[ 	]*[1-9][0-9]*[ 	]+movzbl	%ax, %cl
+[ 	]*[1-9][0-9]*[ 	]+movzbl	%eax, %cl
+[ 	]*[1-9][0-9]*[ 	]+movzbl	%rax, %cl
+[ 	]*[1-9][0-9]*[ 	]*
+[ 	]*[1-9][0-9]* \?\?\?\? 660FB6C8[ 	]+movzbl	%al, %cx
+[ 	]*[1-9][0-9]*[ 	]+movzbl	%ax, %cx
+[ 	]*[1-9][0-9]*[ 	]+movzbl	%eax, %cx
+[ 	]*[1-9][0-9]*[ 	]+movzbl	%rax, %cx
+[ 	]*[1-9][0-9]*[ 	]*
+[ 	]*[1-9][0-9]* \?\?\?\? 0FB6C8[ 	]+movzbl	%al, %ecx
+[ 	]*[1-9][0-9]*[ 	]+movzbl	%ax, %ecx
+[ 	]*[1-9][0-9]*[ 	]+movzbl	%eax, %ecx
+[ 	]*[1-9][0-9]*[ 	]+movzbl	%rax, %ecx
+[ 	]*[1-9][0-9]*[ 	]*
+[ 	]*[1-9][0-9]* \?\?\?\? 480FB6C8[ 	]+movzbl	%al, %rcx
+[ 	]*[1-9][0-9]*[ 	]+movzbl	%ax, %rcx
+[ 	]*[1-9][0-9]*[ 	]+movzbl	%eax, %rcx
+[ 	]*[1-9][0-9]*[ 	]+movzbl	%rax, %rcx
+[ 	]*[1-9][0-9]*[ 	]*
+[ 	]*[1-9][0-9]*[ 	]+movzbq	%al, %cl
+[ 	]*[1-9][0-9]*[ 	]+movzbq	%ax, %cl
+[ 	]*[1-9][0-9]*[ 	]+movzbq	%eax, %cl
+[ 	]*[1-9][0-9]*[ 	]+movzbq	%rax, %cl
+[ 	]*[1-9][0-9]*[ 	]*
+[ 	]*[1-9][0-9]* \?\?\?\? 660FB6C8[ 	]+movzbq	%al, %cx
+[ 	]*[1-9][0-9]*[ 	]+movzbq	%ax, %cx
+[ 	]*[1-9][0-9]*[ 	]+movzbq	%eax, %cx
+[ 	]*[1-9][0-9]*[ 	]+movzbq	%rax, %cx
+[ 	]*[1-9][0-9]*[ 	]*
+[ 	]*[1-9][0-9]* \?\?\?\? 0FB6C8[ 	]+movzbq	%al, %ecx
+[ 	]*[1-9][0-9]*[ 	]+movzbq	%ax, %ecx
+[ 	]*[1-9][0-9]*[ 	]+movzbq	%eax, %ecx
+[ 	]*[1-9][0-9]*[ 	]+movzbq	%rax, %ecx
+[ 	]*[1-9][0-9]*[ 	]*
+[ 	]*[1-9][0-9]* \?\?\?\? 480FB6C8[ 	]+movzbq	%al, %rcx
+[ 	]*[1-9][0-9]*[ 	]+movzbq	%ax, %rcx
+[ 	]*[1-9][0-9]*[ 	]+movzbq	%eax, %rcx
+[ 	]*[1-9][0-9]*[ 	]+movzbq	%rax, %rcx
+[ 	]*[1-9][0-9]*[ 	]*
+[ 	]*[1-9][0-9]*[ 	]+movzw	%al, %cl
+[ 	]*[1-9][0-9]*[ 	]+movzw	%ax, %cl
+[ 	]*[1-9][0-9]*[ 	]+movzw	%eax, %cl
+[ 	]*[1-9][0-9]*[ 	]+movzw	%rax, %cl
+[ 	]*[1-9][0-9]*[ 	]*
+[ 	]*[1-9][0-9]*[ 	]+movzw	%al, %cx
+[ 	]*[1-9][0-9]*[ 	]+movzw	%ax, %cx
+[ 	]*[1-9][0-9]*[ 	]+movzw	%eax, %cx
+[ 	]*[1-9][0-9]*[ 	]+movzw	%rax, %cx
+[ 	]*[1-9][0-9]*[ 	]*
+[ 	]*[1-9][0-9]*[ 	]+movzw	%al, %ecx
+[ 	]*[1-9][0-9]* \?\?\?\? 0FB7C8[ 	]+movzw	%ax, %ecx
+[ 	]*[1-9][0-9]*[ 	]+movzw	%eax, %ecx
+[ 	]*[1-9][0-9]*[ 	]+movzw	%rax, %ecx
+[ 	]*[1-9][0-9]*[ 	]*
+[ 	]*[1-9][0-9]*[ 	]+movzw	%al, %rcx
+[ 	]*[1-9][0-9]* \?\?\?\? 480FB7C8[ 	]+movzw	%ax, %rcx
+[ 	]*[1-9][0-9]*[ 	]+movzw	%eax, %rcx
+[ 	]*[1-9][0-9]*[ 	]+movzw	%rax, %rcx
+[ 	]*[1-9][0-9]*[ 	]*
+[ 	]*[1-9][0-9]*[ 	]+movzwl	%al, %cl
+[ 	]*[1-9][0-9]*[ 	]+movzwl	%ax, %cl
+[ 	]*[1-9][0-9]*[ 	]+movzwl	%eax, %cl
+[ 	]*[1-9][0-9]*[ 	]+movzwl	%rax, %cl
+[ 	]*[1-9][0-9]*[ 	]*
+[ 	]*[1-9][0-9]*[ 	]+movzwl	%al, %cx
+[ 	]*[1-9][0-9]*[ 	]+movzwl	%ax, %cx
+[ 	]*[1-9][0-9]*[ 	]+movzwl	%eax, %cx
+[ 	]*[1-9][0-9]*[ 	]+movzwl	%rax, %cx
+[ 	]*[1-9][0-9]*[ 	]*
+[ 	]*[1-9][0-9]*[ 	]+movzwl	%al, %ecx
+[ 	]*[1-9][0-9]* \?\?\?\? 0FB7C8[ 	]+movzwl	%ax, %ecx
+[ 	]*[1-9][0-9]*[ 	]+movzwl	%eax, %ecx
+[ 	]*[1-9][0-9]*[ 	]+movzwl	%rax, %ecx
+[ 	]*[1-9][0-9]*[ 	]*
+[ 	]*[1-9][0-9]*[ 	]+movzwl	%al, %rcx
+[ 	]*[1-9][0-9]* \?\?\?\? 480FB7C8[ 	]+movzwl	%ax, %rcx
+[ 	]*[1-9][0-9]*[ 	]+movzwl	%eax, %rcx
+[ 	]*[1-9][0-9]*[ 	]+movzwl	%rax, %rcx
+[ 	]*[1-9][0-9]*[ 	]*
+[ 	]*[1-9][0-9]*[ 	]+movzwq	%al, %cl
+[ 	]*[1-9][0-9]*[ 	]+movzwq	%ax, %cl
+[ 	]*[1-9][0-9]*[ 	]+movzwq	%eax, %cl
+[ 	]*[1-9][0-9]*[ 	]+movzwq	%rax, %cl
+[ 	]*[1-9][0-9]*[ 	]*
+[ 	]*[1-9][0-9]*[ 	]+movzwq	%al, %cx
+[ 	]*[1-9][0-9]*[ 	]+movzwq	%ax, %cx
+[ 	]*[1-9][0-9]*[ 	]+movzwq	%eax, %cx
+[ 	]*[1-9][0-9]*[ 	]+movzwq	%rax, %cx
+[ 	]*[1-9][0-9]*[ 	]*
+[ 	]*[1-9][0-9]*[ 	]+movzwq	%al, %ecx
+[ 	]*[1-9][0-9]* \?\?\?\? 0FB7C8[ 	]+movzwq	%ax, %ecx
+[ 	]*[1-9][0-9]*[ 	]+movzwq	%eax, %ecx
+[ 	]*[1-9][0-9]*[ 	]+movzwq	%rax, %ecx
+[ 	]*[1-9][0-9]*[ 	]*
+[ 	]*[1-9][0-9]*[ 	]+movzwq	%al, %rcx
+[ 	]*[1-9][0-9]* \?\?\?\? 480FB7C8[ 	]+movzwq	%ax, %rcx
+[ 	]*[1-9][0-9]*[ 	]+movzwq	%eax, %rcx
+[ 	]*[1-9][0-9]*[ 	]+movzwq	%rax, %rcx
+[ 	]*[1-9][0-9]*[ 	]*
+#pass
--- /dev/null
+++ b/gas/testsuite/gas/i386/movx64.s
@@ -0,0 +1,485 @@ 
+	.text
+	.psize 0
+movsx:
+	movsx	%al, %cl
+	movsx	%ax, %cl
+	movsx	%eax, %cl
+	movsx	%rax, %cl
+
+	movsx	%al, %cx
+	movsx	%ax, %cx
+	movsx	%eax, %cx
+	movsx	%rax, %cx
+
+	movsx	%al, %ecx
+	movsx	%ax, %ecx
+	movsx	%eax, %ecx
+	movsx	%rax, %ecx
+
+	movsx	%al, %rcx
+	movsx	%ax, %rcx
+	movsx	%eax, %rcx
+	movsx	%rax, %rcx
+
+	movsxb	%al, %cl
+	movsxb	%ax, %cl
+	movsxb	%eax, %cl
+	movsxb	%rax, %cl
+
+	movsxb	%al, %cx
+	movsxb	%ax, %cx
+	movsxb	%eax, %cx
+	movsxb	%rax, %cx
+
+	movsxb	%al, %ecx
+	movsxb	%ax, %ecx
+	movsxb	%eax, %ecx
+	movsxb	%rax, %ecx
+
+	movsxb	%al, %rcx
+	movsxb	%ax, %rcx
+	movsxb	%eax, %rcx
+	movsxb	%rax, %rcx
+
+	movsxw	%al, %cl
+	movsxw	%ax, %cl
+	movsxw	%eax, %cl
+	movsxw	%rax, %cl
+
+	movsxw	%al, %cx
+	movsxw	%ax, %cx
+	movsxw	%eax, %cx
+	movsxw	%rax, %cx
+
+	movsxw	%al, %ecx
+	movsxw	%ax, %ecx
+	movsxw	%eax, %ecx
+	movsxw	%rax, %ecx
+
+	movsxw	%al, %rcx
+	movsxw	%ax, %rcx
+	movsxw	%eax, %rcx
+	movsxw	%rax, %rcx
+
+	movsxl	%al, %cl
+	movsxl	%ax, %cl
+	movsxl	%eax, %cl
+	movsxl	%rax, %cl
+
+	movsxl	%al, %cx
+	movsxl	%ax, %cx
+	movsxl	%eax, %cx
+	movsxl	%rax, %cx
+
+	movsxl	%al, %ecx
+	movsxl	%ax, %ecx
+	movsxl	%eax, %ecx
+	movsxl	%rax, %ecx
+
+	movsxl	%al, %rcx
+	movsxl	%ax, %rcx
+	movsxl	%eax, %rcx
+	movsxl	%rax, %rcx
+
+	movsxd	%al, %cl
+	movsxd	%ax, %cl
+	movsxd	%eax, %cl
+	movsxd	%rax, %cl
+
+	movsxd	%al, %cx
+	movsxd	%ax, %cx
+	movsxd	%eax, %cx
+	movsxd	%rax, %cx
+
+	movsxd	%al, %ecx
+	movsxd	%ax, %ecx
+	movsxd	%eax, %ecx
+	movsxd	%rax, %ecx
+
+	movsxd	%al, %rcx
+	movsxd	%ax, %rcx
+	movsxd	%eax, %rcx
+	movsxd	%rax, %rcx
+
+	movsb	%al, %cl
+	movsb	%ax, %cl
+	movsb	%eax, %cl
+	movsb	%rax, %cl
+
+	movsb	%al, %cx
+	movsb	%ax, %cx
+	movsb	%eax, %cx
+	movsb	%rax, %cx
+
+	movsb	%al, %ecx
+	movsb	%ax, %ecx
+	movsb	%eax, %ecx
+	movsb	%rax, %ecx
+
+	movsb	%al, %rcx
+	movsb	%ax, %rcx
+	movsb	%eax, %rcx
+	movsb	%rax, %rcx
+
+	movsbw	%al, %cl
+	movsbw	%ax, %cl
+	movsbw	%eax, %cl
+	movsbw	%rax, %cl
+
+	movsbw	%al, %cx
+	movsbw	%ax, %cx
+	movsbw	%eax, %cx
+	movsbw	%rax, %cx
+
+	movsbw	%al, %ecx
+	movsbw	%ax, %ecx
+	movsbw	%eax, %ecx
+	movsbw	%rax, %ecx
+
+	movsbw	%al, %rcx
+	movsbw	%ax, %rcx
+	movsbw	%eax, %rcx
+	movsbw	%rax, %rcx
+
+	movsbl	%al, %cl
+	movsbl	%ax, %cl
+	movsbl	%eax, %cl
+	movsbl	%rax, %cl
+
+	movsbl	%al, %cx
+	movsbl	%ax, %cx
+	movsbl	%eax, %cx
+	movsbl	%rax, %cx
+
+	movsbl	%al, %ecx
+	movsbl	%ax, %ecx
+	movsbl	%eax, %ecx
+	movsbl	%rax, %ecx
+
+	movsbl	%al, %rcx
+	movsbl	%ax, %rcx
+	movsbl	%eax, %rcx
+	movsbl	%rax, %rcx
+
+	movsbq	%al, %cl
+	movsbq	%ax, %cl
+	movsbq	%eax, %cl
+	movsbq	%rax, %cl
+
+	movsbq	%al, %cx
+	movsbq	%ax, %cx
+	movsbq	%eax, %cx
+	movsbq	%rax, %cx
+
+	movsbq	%al, %ecx
+	movsbq	%ax, %ecx
+	movsbq	%eax, %ecx
+	movsbq	%rax, %ecx
+
+	movsbq	%al, %rcx
+	movsbq	%ax, %rcx
+	movsbq	%eax, %rcx
+	movsbq	%rax, %rcx
+
+	movsw	%al, %cl
+	movsw	%ax, %cl
+	movsw	%eax, %cl
+	movsw	%rax, %cl
+
+	movsw	%al, %cx
+	movsw	%ax, %cx
+	movsw	%eax, %cx
+	movsw	%rax, %cx
+
+	movsw	%al, %ecx
+	movsw	%ax, %ecx
+	movsw	%eax, %ecx
+	movsw	%rax, %ecx
+
+	movsw	%al, %rcx
+	movsw	%ax, %rcx
+	movsw	%eax, %rcx
+	movsw	%rax, %rcx
+
+	movswl	%al, %cl
+	movswl	%ax, %cl
+	movswl	%eax, %cl
+	movswl	%rax, %cl
+
+	movswl	%al, %cx
+	movswl	%ax, %cx
+	movswl	%eax, %cx
+	movswl	%rax, %cx
+
+	movswl	%al, %ecx
+	movswl	%ax, %ecx
+	movswl	%eax, %ecx
+	movswl	%rax, %ecx
+
+	movswl	%al, %rcx
+	movswl	%ax, %rcx
+	movswl	%eax, %rcx
+	movswl	%rax, %rcx
+
+	movswq	%al, %cl
+	movswq	%ax, %cl
+	movswq	%eax, %cl
+	movswq	%rax, %cl
+
+	movswq	%al, %cx
+	movswq	%ax, %cx
+	movswq	%eax, %cx
+	movswq	%rax, %cx
+
+	movswq	%al, %ecx
+	movswq	%ax, %ecx
+	movswq	%eax, %ecx
+	movswq	%rax, %ecx
+
+	movswq	%al, %rcx
+	movswq	%ax, %rcx
+	movswq	%eax, %rcx
+	movswq	%rax, %rcx
+
+movzx:
+	movzx	%al, %cl
+	movzx	%ax, %cl
+	movzx	%eax, %cl
+	movzx	%rax, %cl
+
+	movzx	%al, %cx
+	movzx	%ax, %cx
+	movzx	%eax, %cx
+	movzx	%rax, %cx
+
+	movzx	%al, %ecx
+	movzx	%ax, %ecx
+	movzx	%eax, %ecx
+	movzx	%rax, %ecx
+
+	movzx	%al, %rcx
+	movzx	%ax, %rcx
+	movzx	%eax, %rcx
+	movzx	%rax, %rcx
+
+	movzxb	%al, %cl
+	movzxb	%ax, %cl
+	movzxb	%eax, %cl
+	movzxb	%rax, %cl
+
+	movzxb	%al, %cx
+	movzxb	%ax, %cx
+	movzxb	%eax, %cx
+	movzxb	%rax, %cx
+
+	movzxb	%al, %ecx
+	movzxb	%ax, %ecx
+	movzxb	%eax, %ecx
+	movzxb	%rax, %ecx
+
+	movzxb	%al, %rcx
+	movzxb	%ax, %rcx
+	movzxb	%eax, %rcx
+	movzxb	%rax, %rcx
+
+	movzxw	%al, %cl
+	movzxw	%ax, %cl
+	movzxw	%eax, %cl
+	movzxw	%rax, %cl
+
+	movzxw	%al, %cx
+	movzxw	%ax, %cx
+	movzxw	%eax, %cx
+	movzxw	%rax, %cx
+
+	movzxw	%al, %ecx
+	movzxw	%ax, %ecx
+	movzxw	%eax, %ecx
+	movzxw	%rax, %ecx
+
+	movzxw	%al, %rcx
+	movzxw	%ax, %rcx
+	movzxw	%eax, %rcx
+	movzxw	%rax, %rcx
+
+	movzxl	%al, %cl
+	movzxl	%ax, %cl
+	movzxl	%eax, %cl
+	movzxl	%rax, %cl
+
+	movzxl	%al, %cx
+	movzxl	%ax, %cx
+	movzxl	%eax, %cx
+	movzxl	%rax, %cx
+
+	movzxl	%al, %ecx
+	movzxl	%ax, %ecx
+	movzxl	%eax, %ecx
+	movzxl	%rax, %ecx
+
+	movzxl	%al, %rcx
+	movzxl	%ax, %rcx
+	movzxl	%eax, %rcx
+	movzxl	%rax, %rcx
+
+	movzxd	%al, %cl
+	movzxd	%ax, %cl
+	movzxd	%eax, %cl
+	movzxd	%rax, %cl
+
+	movzxd	%al, %cx
+	movzxd	%ax, %cx
+	movzxd	%eax, %cx
+	movzxd	%rax, %cx
+
+	movzxd	%al, %ecx
+	movzxd	%ax, %ecx
+	movzxd	%eax, %ecx
+	movzxd	%rax, %ecx
+
+	movzxd	%al, %rcx
+	movzxd	%ax, %rcx
+	movzxd	%eax, %rcx
+	movzxd	%rax, %rcx
+
+	movzb	%al, %cl
+	movzb	%ax, %cl
+	movzb	%eax, %cl
+	movzb	%rax, %cl
+
+	movzb	%al, %cx
+	movzb	%ax, %cx
+	movzb	%eax, %cx
+	movzb	%rax, %cx
+
+	movzb	%al, %ecx
+	movzb	%ax, %ecx
+	movzb	%eax, %ecx
+	movzb	%rax, %ecx
+
+	movzb	%al, %rcx
+	movzb	%ax, %rcx
+	movzb	%eax, %rcx
+	movzb	%rax, %rcx
+
+	movzbw	%al, %cl
+	movzbw	%ax, %cl
+	movzbw	%eax, %cl
+	movzbw	%rax, %cl
+
+	movzbw	%al, %cx
+	movzbw	%ax, %cx
+	movzbw	%eax, %cx
+	movzbw	%rax, %cx
+
+	movzbw	%al, %ecx
+	movzbw	%ax, %ecx
+	movzbw	%eax, %ecx
+	movzbw	%rax, %ecx
+
+	movzbw	%al, %rcx
+	movzbw	%ax, %rcx
+	movzbw	%eax, %rcx
+	movzbw	%rax, %rcx
+
+	movzbl	%al, %cl
+	movzbl	%ax, %cl
+	movzbl	%eax, %cl
+	movzbl	%rax, %cl
+
+	movzbl	%al, %cx
+	movzbl	%ax, %cx
+	movzbl	%eax, %cx
+	movzbl	%rax, %cx
+
+	movzbl	%al, %ecx
+	movzbl	%ax, %ecx
+	movzbl	%eax, %ecx
+	movzbl	%rax, %ecx
+
+	movzbl	%al, %rcx
+	movzbl	%ax, %rcx
+	movzbl	%eax, %rcx
+	movzbl	%rax, %rcx
+
+	movzbq	%al, %cl
+	movzbq	%ax, %cl
+	movzbq	%eax, %cl
+	movzbq	%rax, %cl
+
+	movzbq	%al, %cx
+	movzbq	%ax, %cx
+	movzbq	%eax, %cx
+	movzbq	%rax, %cx
+
+	movzbq	%al, %ecx
+	movzbq	%ax, %ecx
+	movzbq	%eax, %ecx
+	movzbq	%rax, %ecx
+
+	movzbq	%al, %rcx
+	movzbq	%ax, %rcx
+	movzbq	%eax, %rcx
+	movzbq	%rax, %rcx
+
+	movzw	%al, %cl
+	movzw	%ax, %cl
+	movzw	%eax, %cl
+	movzw	%rax, %cl
+
+	movzw	%al, %cx
+	movzw	%ax, %cx
+	movzw	%eax, %cx
+	movzw	%rax, %cx
+
+	movzw	%al, %ecx
+	movzw	%ax, %ecx
+	movzw	%eax, %ecx
+	movzw	%rax, %ecx
+
+	movzw	%al, %rcx
+	movzw	%ax, %rcx
+	movzw	%eax, %rcx
+	movzw	%rax, %rcx
+
+	movzwl	%al, %cl
+	movzwl	%ax, %cl
+	movzwl	%eax, %cl
+	movzwl	%rax, %cl
+
+	movzwl	%al, %cx
+	movzwl	%ax, %cx
+	movzwl	%eax, %cx
+	movzwl	%rax, %cx
+
+	movzwl	%al, %ecx
+	movzwl	%ax, %ecx
+	movzwl	%eax, %ecx
+	movzwl	%rax, %ecx
+
+	movzwl	%al, %rcx
+	movzwl	%ax, %rcx
+	movzwl	%eax, %rcx
+	movzwl	%rax, %rcx
+
+	movzwq	%al, %cl
+	movzwq	%ax, %cl
+	movzwq	%eax, %cl
+	movzwq	%rax, %cl
+
+	movzwq	%al, %cx
+	movzwq	%ax, %cx
+	movzwq	%eax, %cx
+	movzwq	%rax, %cx
+
+	movzwq	%al, %ecx
+	movzwq	%ax, %ecx
+	movzwq	%eax, %ecx
+	movzwq	%rax, %ecx
+
+	movzwq	%al, %rcx
+	movzwq	%ax, %rcx
+	movzwq	%eax, %rcx
+	movzwq	%rax, %rcx
+
+	.p2align 4
--- a/gas/testsuite/gas/i386/noreg16.d
+++ b/gas/testsuite/gas/i386/noreg16.d
@@ -75,6 +75,10 @@  Disassembly of section .text:
  *[a-f0-9]+:	8e 07                	mov    \(%bx\),%es
  *[a-f0-9]+:	a5                   	movsw  %ds:\(%si\),%es:\(%di\)
  *[a-f0-9]+:	67 a5                	movsw  %ds:\(%esi\),%es:\(%edi\)
+ *[a-f0-9]+:	0f be 07             	movsbw \(%bx\),%ax
+ *[a-f0-9]+:	66 0f be 07          	movsbl \(%bx\),%eax
+ *[a-f0-9]+:	0f b6 07             	movzbw \(%bx\),%ax
+ *[a-f0-9]+:	66 0f b6 07          	movzbl \(%bx\),%eax
  *[a-f0-9]+:	f7 27                	mulw   \(%bx\)
  *[a-f0-9]+:	f7 1f                	negw   \(%bx\)
  *[a-f0-9]+:	0f 1f 07             	nopw   \(%bx\)
--- a/gas/testsuite/gas/i386/noreg16.s
+++ b/gas/testsuite/gas/i386/noreg16.s
@@ -69,6 +69,10 @@  noreg:
 	mov	(%bx), %es
 	movs
 	movs	(%esi), %es:(%edi)
+	movsx	(%bx), %ax
+	movsx	(%bx), %eax
+	movzx	(%bx), %ax
+	movzx	(%bx), %eax
 	mul	(%bx)
 	neg	(%bx)
 	nop	(%bx)
--- a/gas/testsuite/gas/i386/noreg32.d
+++ b/gas/testsuite/gas/i386/noreg32.d
@@ -80,6 +80,10 @@  Disassembly of section .text:
  *[a-f0-9]+:	8e 00                	mov    \(%eax\),%es
  *[a-f0-9]+:	a5                   	movsl  %ds:\(%esi\),%es:\(%edi\)
  *[a-f0-9]+:	a5                   	movsl  %ds:\(%esi\),%es:\(%edi\)
+ *[a-f0-9]+:	66 0f be 00          	movsbw \(%eax\),%ax
+ *[a-f0-9]+:	0f be 00             	movsbl \(%eax\),%eax
+ *[a-f0-9]+:	66 0f b6 00          	movzbw \(%eax\),%ax
+ *[a-f0-9]+:	0f b6 00             	movzbl \(%eax\),%eax
  *[a-f0-9]+:	f7 20                	mull   \(%eax\)
  *[a-f0-9]+:	f7 18                	negl   \(%eax\)
  *[a-f0-9]+:	0f 1f 00             	nopl   \(%eax\)
--- a/gas/testsuite/gas/i386/noreg32.s
+++ b/gas/testsuite/gas/i386/noreg32.s
@@ -73,6 +73,10 @@  noreg:
 	mov	(%eax), %es
 	movs
 	movs	(%esi), %es:(%edi)
+	movsx	(%eax), %ax
+	movsx	(%eax), %eax
+	movzx	(%eax), %ax
+	movzx	(%eax), %eax
 	mul	(%eax)
 	neg	(%eax)
 	nop	(%eax)
--- a/gas/testsuite/gas/i386/noreg64.d
+++ b/gas/testsuite/gas/i386/noreg64.d
@@ -84,6 +84,12 @@  Disassembly of section .text:
  *[a-f0-9]+:	8e 00                	mov    \(%rax\),%es
  *[a-f0-9]+:	a5                   	movsl  %ds:\(%rsi\),%es:\(%rdi\)
  *[a-f0-9]+:	a5                   	movsl  %ds:\(%rsi\),%es:\(%rdi\)
+ *[a-f0-9]+:	66 0f be 00          	movsbw \(%rax\),%ax
+ *[a-f0-9]+:	0f be 00             	movsbl \(%rax\),%eax
+ *[a-f0-9]+:	48 0f be 00          	movsbq \(%rax\),%rax
+ *[a-f0-9]+:	66 0f b6 00          	movzbw \(%rax\),%ax
+ *[a-f0-9]+:	0f b6 00             	movzbl \(%rax\),%eax
+ *[a-f0-9]+:	48 0f b6 00          	movzbq \(%rax\),%rax
  *[a-f0-9]+:	f7 20                	mull   \(%rax\)
  *[a-f0-9]+:	f7 18                	negl   \(%rax\)
  *[a-f0-9]+:	0f 1f 00             	nopl   \(%rax\)
--- a/gas/testsuite/gas/i386/noreg64.s
+++ b/gas/testsuite/gas/i386/noreg64.s
@@ -77,6 +77,12 @@  noreg:
 	mov	(%rax), %es
 	movs
 	movs	(%rsi), %es:(%rdi)
+	movsx	(%rax), %ax
+	movsx	(%rax), %eax
+	movsx	(%rax), %rax
+	movzx	(%rax), %ax
+	movzx	(%rax), %eax
+	movzx	(%rax), %rax
 	mul	(%rax)
 	neg	(%rax)
 	nop	(%rax)
--- a/gas/testsuite/gas/i386/x86_64-intel.d
+++ b/gas/testsuite/gas/i386/x86_64-intel.d
@@ -173,8 +173,6 @@  Disassembly of section .text:
 [ 	]*[a-f0-9]+:	0f bf f0             	movsx  esi,ax
 [ 	]*[a-f0-9]+:	48 0f bf f0          	movsx  rsi,ax
 [ 	]*[a-f0-9]+:	48 63 f0             	movsxd rsi,eax
-[ 	]*[a-f0-9]+:	0f be 10             	movsx  edx,BYTE PTR \[rax\]
-[ 	]*[a-f0-9]+:	48 0f be 10          	movsx  rdx,BYTE PTR \[rax\]
 [ 	]*[a-f0-9]+:	66 0f be 10          	movsx  dx,BYTE PTR \[rax\]
 [ 	]*[a-f0-9]+:	0f be 10             	movsx  edx,BYTE PTR \[rax\]
 [ 	]*[a-f0-9]+:	48 0f be 10          	movsx  rdx,BYTE PTR \[rax\]
@@ -186,8 +184,6 @@  Disassembly of section .text:
 [ 	]*[a-f0-9]+:	48 0f b6 f0          	movzx  rsi,al
 [ 	]*[a-f0-9]+:	0f b7 f0             	movzx  esi,ax
 [ 	]*[a-f0-9]+:	48 0f b7 f0          	movzx  rsi,ax
-[ 	]*[a-f0-9]+:	0f b6 10             	movzx  edx,BYTE PTR \[rax\]
-[ 	]*[a-f0-9]+:	48 0f b6 10          	movzx  rdx,BYTE PTR \[rax\]
 [ 	]*[a-f0-9]+:	66 0f b6 10          	movzx  dx,BYTE PTR \[rax\]
 [ 	]*[a-f0-9]+:	0f b6 10             	movzx  edx,BYTE PTR \[rax\]
 [ 	]*[a-f0-9]+:	48 0f b6 10          	movzx  rdx,BYTE PTR \[rax\]
@@ -231,8 +227,6 @@  Disassembly of section .text:
 [ 	]*[a-f0-9]+:	9b df e0             	fstsw  ax
 [ 	]*[a-f0-9]+:	9b df e0             	fstsw  ax
 [ 	]*[a-f0-9]+:	66 0f be 00          	movsx  ax,BYTE PTR \[rax\]
-[ 	]*[a-f0-9]+:	0f be 00             	movsx  eax,BYTE PTR \[rax\]
-[ 	]*[a-f0-9]+:	48 0f be 00          	movsx  rax,BYTE PTR \[rax\]
 [ 	]*[a-f0-9]+:	66 0f be 10          	movsx  dx,BYTE PTR \[rax\]
 [ 	]*[a-f0-9]+:	0f be 10             	movsx  edx,BYTE PTR \[rax\]
 [ 	]*[a-f0-9]+:	48 0f be 10          	movsx  rdx,BYTE PTR \[rax\]
@@ -241,8 +235,6 @@  Disassembly of section .text:
 [ 	]*[a-f0-9]+:	48 63 10             	movsxd rdx,DWORD PTR \[rax\]
 [ 	]*[a-f0-9]+:	48 63 00             	movsxd rax,DWORD PTR \[rax\]
 [ 	]*[a-f0-9]+:	66 0f b6 00          	movzx  ax,BYTE PTR \[rax\]
-[ 	]*[a-f0-9]+:	0f b6 00             	movzx  eax,BYTE PTR \[rax\]
-[ 	]*[a-f0-9]+:	48 0f b6 00          	movzx  rax,BYTE PTR \[rax\]
 [ 	]*[a-f0-9]+:	66 0f b6 10          	movzx  dx,BYTE PTR \[rax\]
 [ 	]*[a-f0-9]+:	0f b6 10             	movzx  edx,BYTE PTR \[rax\]
 [ 	]*[a-f0-9]+:	48 0f b6 10          	movzx  rdx,BYTE PTR \[rax\]
--- a/gas/testsuite/gas/i386/x86_64.d
+++ b/gas/testsuite/gas/i386/x86_64.d
@@ -173,8 +173,6 @@  Disassembly of section .text:
 [ 	]*[a-f0-9]+:	0f bf f0             	movswl %ax,%esi
 [ 	]*[a-f0-9]+:	48 0f bf f0          	movswq %ax,%rsi
 [ 	]*[a-f0-9]+:	48 63 f0             	movslq %eax,%rsi
-[ 	]*[a-f0-9]+:	0f be 10             	movsbl \(%rax\),%edx
-[ 	]*[a-f0-9]+:	48 0f be 10          	movsbq \(%rax\),%rdx
 [ 	]*[a-f0-9]+:	66 0f be 10          	movsbw \(%rax\),%dx
 [ 	]*[a-f0-9]+:	0f be 10             	movsbl \(%rax\),%edx
 [ 	]*[a-f0-9]+:	48 0f be 10          	movsbq \(%rax\),%rdx
@@ -186,8 +184,6 @@  Disassembly of section .text:
 [ 	]*[a-f0-9]+:	48 0f b6 f0          	movzbq %al,%rsi
 [ 	]*[a-f0-9]+:	0f b7 f0             	movzwl %ax,%esi
 [ 	]*[a-f0-9]+:	48 0f b7 f0          	movzwq %ax,%rsi
-[ 	]*[a-f0-9]+:	0f b6 10             	movzbl \(%rax\),%edx
-[ 	]*[a-f0-9]+:	48 0f b6 10          	movzbq \(%rax\),%rdx
 [ 	]*[a-f0-9]+:	66 0f b6 10          	movzbw \(%rax\),%dx
 [ 	]*[a-f0-9]+:	0f b6 10             	movzbl \(%rax\),%edx
 [ 	]*[a-f0-9]+:	48 0f b6 10          	movzbq \(%rax\),%rdx
@@ -231,8 +227,6 @@  Disassembly of section .text:
 [ 	]*[a-f0-9]+:	9b df e0             	fstsw  %ax
 [ 	]*[a-f0-9]+:	9b df e0             	fstsw  %ax
 [ 	]*[a-f0-9]+:	66 0f be 00          	movsbw \(%rax\),%ax
-[ 	]*[a-f0-9]+:	0f be 00             	movsbl \(%rax\),%eax
-[ 	]*[a-f0-9]+:	48 0f be 00          	movsbq \(%rax\),%rax
 [ 	]*[a-f0-9]+:	66 0f be 10          	movsbw \(%rax\),%dx
 [ 	]*[a-f0-9]+:	0f be 10             	movsbl \(%rax\),%edx
 [ 	]*[a-f0-9]+:	48 0f be 10          	movsbq \(%rax\),%rdx
@@ -241,8 +235,6 @@  Disassembly of section .text:
 [ 	]*[a-f0-9]+:	48 63 10             	movslq \(%rax\),%rdx
 [ 	]*[a-f0-9]+:	48 63 00             	movslq \(%rax\),%rax
 [ 	]*[a-f0-9]+:	66 0f b6 00          	movzbw \(%rax\),%ax
-[ 	]*[a-f0-9]+:	0f b6 00             	movzbl \(%rax\),%eax
-[ 	]*[a-f0-9]+:	48 0f b6 00          	movzbq \(%rax\),%rax
 [ 	]*[a-f0-9]+:	66 0f b6 10          	movzbw \(%rax\),%dx
 [ 	]*[a-f0-9]+:	0f b6 10             	movzbl \(%rax\),%edx
 [ 	]*[a-f0-9]+:	48 0f b6 10          	movzbq \(%rax\),%rdx
--- a/gas/testsuite/gas/i386/x86_64.s
+++ b/gas/testsuite/gas/i386/x86_64.s
@@ -208,8 +208,6 @@  cmpxchg16b oword ptr [rax]
 	movsx	%ax, %esi
 	movsx	%ax, %rsi
 	movsx	%eax, %rsi
-	movsx	(%rax), %edx
-	movsx	(%rax), %rdx
 	movsx	(%rax), %dx
 	movsbl	(%rax), %edx
 	movsbq	(%rax), %rdx
@@ -222,8 +220,6 @@  cmpxchg16b oword ptr [rax]
 	movzx	%al, %rsi
 	movzx	%ax, %esi
 	movzx	%ax, %rsi
-	movzx	(%rax), %edx
-	movzx	(%rax), %rdx
 	movzx	(%rax), %dx
 	movzb	(%rax), %edx
 	movzb	(%rax), %rdx
@@ -277,8 +273,6 @@  cmpxchg16b oword ptr [rax]
 
 .att_syntax
 movsx (%rax),%ax
-movsx (%rax),%eax
-movsx (%rax),%rax
 movsxb	(%rax), %dx
 movsxb	(%rax), %edx
 movsxb	(%rax), %rdx
@@ -287,8 +281,6 @@  movsxw	(%rax), %rdx
 movsxl	(%rax), %rdx
 movsxd (%rax),%rax
 movzx (%rax),%ax
-movzx (%rax),%eax
-movzx (%rax),%rax
 movzxb	(%rax), %dx
 movzxb	(%rax), %edx
 movzxb	(%rax), %rdx