[09/13] x86: eliminate ImmExt abuse

Message ID df417ad0-6250-c806-b570-75047b577f06@suse.com
State New
Headers show
Series
  • x86: further insn template compaction
Related show

Commit Message

Jan Beulich Oct. 30, 2019, 8:27 a.m.
Drop the remaining instances left in place by commit c3949f432f ("x86:
limit ImmExt abuse), now that we have a way to specify specific GPRs.

Take the opportunity and also introduce proper 16-bit forms of
applicable SVME insns as well as 1-operand forms of CLZERO.

gas/
2019-10-XX  Jan Beulich  <jbeulich@suse.com>

	* config/tc-i386.c (process_immext): Remove SSE3, SVME, and
	MWAITX special case logic.
	(process_suffix): Replace immext field uses by instance ones.
	* testsuite/gas/i386/arch-13.s,
	testsuite/gas/i386/x86-64-arch-3.s: Add CLZERO with operand
	cases.
	* testsuite/gas/i386/svme.s: Add 16-bit operand cases.
	* testsuite/gas/i386/x86-64-specific-reg.s: Drop FIXME comments.
	* testsuite/gas/i386/arch-13.d,
	testsuite/gas/i386/mwaitx-reg.l, testsuite/gas/i386/svme.d,
	testsuite/gas/i386/x86-64-arch-3.d,
	testsuite/gas/i386/x86-64-mwaitx-reg.l,
	testsuite/gas/i386/x86-64-specific-reg.l: Adjust expectations.
	* testsuite/gas/i386/arch-13-znver1.d,
	testsuite/gas/i386/arch-13-znver2.d: Redirect expectations to
	arch-13.d.
	* testsuite/gas/i386/x86-64-arch-3-znver1.d,
	testsuite/gas/i386/x86-64-arch-3-znver2.d: Redirect expectations
	to x86-64-arch-3.d.

opcodes/
2019-10-XX  Jan Beulich  <jbeulich@suse.com>

	* i386-gen.c (operand_instances): Add RegB entry.
	* i386-opc.h (enum operand_instance): Add RegB.
	* i386-opc.tbl (RegC, RegD, RegB): Define.
	(Acc, ShiftCount, InOutPortReg): Adjust definitions.
	(monitor, mwait, invlpga, skinit, vmload, vmrun, vmsave, clzero,
	monitorx, mwaitx): Drop ImmExt and convert encodings
	accordingly.
	* i386-reg.tbl (ecx, rcx): Add Instance=RegC.
	(edx, rdx): Add Instance=RegD.
	(ebx, rbx): Add Instance=RegB.
	* i386-tbl.h: Re-generate.

---
TBD: The now more generic error messages may be deemed less helpful. I'm
     not sure though that it's worthwhile to add extra code to point out
     the specific registers that are expected.

Comments

H.J. Lu Oct. 31, 2019, 7:31 p.m. | #1
On Wed, Oct 30, 2019 at 1:27 AM Jan Beulich <jbeulich@suse.com> wrote:
>

> Drop the remaining instances left in place by commit c3949f432f ("x86:

> limit ImmExt abuse), now that we have a way to specify specific GPRs.

>

> Take the opportunity and also introduce proper 16-bit forms of

> applicable SVME insns as well as 1-operand forms of CLZERO.

>

> gas/

> 2019-10-XX  Jan Beulich  <jbeulich@suse.com>

>

>         * config/tc-i386.c (process_immext): Remove SSE3, SVME, and

>         MWAITX special case logic.

>         (process_suffix): Replace immext field uses by instance ones.

>         * testsuite/gas/i386/arch-13.s,

>         testsuite/gas/i386/x86-64-arch-3.s: Add CLZERO with operand

>         cases.

>         * testsuite/gas/i386/svme.s: Add 16-bit operand cases.

>         * testsuite/gas/i386/x86-64-specific-reg.s: Drop FIXME comments.

>         * testsuite/gas/i386/arch-13.d,

>         testsuite/gas/i386/mwaitx-reg.l, testsuite/gas/i386/svme.d,

>         testsuite/gas/i386/x86-64-arch-3.d,

>         testsuite/gas/i386/x86-64-mwaitx-reg.l,

>         testsuite/gas/i386/x86-64-specific-reg.l: Adjust expectations.

>         * testsuite/gas/i386/arch-13-znver1.d,

>         testsuite/gas/i386/arch-13-znver2.d: Redirect expectations to

>         arch-13.d.

>         * testsuite/gas/i386/x86-64-arch-3-znver1.d,

>         testsuite/gas/i386/x86-64-arch-3-znver2.d: Redirect expectations

>         to x86-64-arch-3.d.

>

> opcodes/

> 2019-10-XX  Jan Beulich  <jbeulich@suse.com>

>

>         * i386-gen.c (operand_instances): Add RegB entry.

>         * i386-opc.h (enum operand_instance): Add RegB.

>         * i386-opc.tbl (RegC, RegD, RegB): Define.

>         (Acc, ShiftCount, InOutPortReg): Adjust definitions.

>         (monitor, mwait, invlpga, skinit, vmload, vmrun, vmsave, clzero,

>         monitorx, mwaitx): Drop ImmExt and convert encodings

>         accordingly.

>         * i386-reg.tbl (ecx, rcx): Add Instance=RegC.

>         (edx, rdx): Add Instance=RegD.

>         (ebx, rbx): Add Instance=RegB.

>         * i386-tbl.h: Re-generate.

>


OK.

Thanks.

-- 
H.J.

Patch

--- a/gas/config/tc-i386.c
+++ b/gas/config/tc-i386.c
@@ -3849,54 +3849,6 @@  process_immext (void)
 {
   expressionS *exp;
 
-  if ((i.tm.cpu_flags.bitfield.cpusse3 || i.tm.cpu_flags.bitfield.cpusvme)
-      && i.operands > 0)
-    {
-      /* MONITOR/MWAIT as well as SVME instructions have fixed operands
-	 with an opcode suffix which is coded in the same place as an
-	 8-bit immediate field would be.
-	 Here we check those operands and remove them afterwards.  */
-      unsigned int x;
-
-      for (x = 0; x < i.operands; x++)
-	if (register_number (i.op[x].regs) != x)
-	  as_bad (_("can't use register '%s%s' as operand %d in '%s'."),
-		  register_prefix, i.op[x].regs->reg_name, x + 1,
-		  i.tm.name);
-
-      i.operands = 0;
-      i.tm.operands = 0;
-    }
-
-  if (i.tm.cpu_flags.bitfield.cpumwaitx && i.operands > 0)
-    {
-      /* MONITORX/MWAITX instructions have fixed operands with an opcode
-	 suffix which is coded in the same place as an 8-bit immediate
-	 field would be.
-	 Here we check those operands and remove them afterwards.  */
-      unsigned int x;
-
-      if (i.operands != 3)
-	abort();
-
-      for (x = 0; x < 2; x++)
-	if (register_number (i.op[x].regs) != x)
-	  goto bad_register_operand;
-
-      /* Check for third operand for mwaitx/monitorx insn.  */
-      if (register_number (i.op[x].regs)
-	  != (x + (i.tm.extension_opcode == 0xfb)))
-	{
-bad_register_operand:
-	  as_bad (_("can't use register '%s%s' as operand %d in '%s'."),
-		  register_prefix, i.op[x].regs->reg_name, x+1,
-		  i.tm.name);
-	}
-
-      i.operands = 0;
-      i.tm.operands = 0;
-    }
-
   /* These AMD 3DNow! and SSE2 instructions have an opcode suffix
      which is coded in the same place as an 8-bit immediate field
      would be.  Here we fake an 8-bit immediate operand from the
@@ -6569,7 +6521,7 @@  process_suffix (void)
       if (i.reg_operands > 0
 	  && i.types[0].bitfield.class == Reg
 	  && i.tm.opcode_modifier.addrprefixopreg
-	  && (i.tm.opcode_modifier.immext
+	  && (i.tm.operand_types[0].bitfield.instance == Accum
 	      || i.operands == 1))
 	{
 	  /* The address size override prefix changes the size of the
@@ -6619,7 +6571,7 @@  process_suffix (void)
   if (i.reg_operands != 0
       && i.operands > 1
       && i.tm.opcode_modifier.addrprefixopreg
-      && !i.tm.opcode_modifier.immext)
+      && i.tm.operand_types[0].bitfield.instance != Accum)
     {
       /* Check invalid register operand when the address size override
 	 prefix changes the size of register operands.  */
--- a/gas/testsuite/gas/i386/arch-13-znver1.d
+++ b/gas/testsuite/gas/i386/arch-13-znver1.d
@@ -2,28 +2,4 @@ 
 #as: -march=znver1+rdpid+clwb+wbnoinvd
 #objdump: -dw
 #name: i386 arch 13 (znver1)
-
-.*:     file format .*
-
-Disassembly of section .text:
-
-0+ <.text>:
-[ 	]*[a-f0-9]+:	0f 01 ca             	clac   
-[ 	]*[a-f0-9]+:	0f 01 cb             	stac   
-[ 	]*[a-f0-9]+:	66 0f 38 f6 ca       	adcx   %edx,%ecx
-[ 	]*[a-f0-9]+:	f3 0f 38 f6 ca       	adox   %edx,%ecx
-[ 	]*[a-f0-9]+:	0f c7 f8             	rdseed %eax
-[ 	]*[a-f0-9]+:	0f 01 fc             	clzero 
-[ 	]*[a-f0-9]+:	0f c7 21             	xsavec \(%ecx\)
-[ 	]*[a-f0-9]+:	0f c7 29             	xsaves \(%ecx\)
-[ 	]*[a-f0-9]+:	66 0f ae 39          	clflushopt \(%ecx\)
-[ 	]*[a-f0-9]+:	0f 01 fa             	monitorx %eax,%ecx,%edx
-[ 	]*[a-f0-9]+:	67 0f 01 fa          	monitorx %ax,%ecx,%edx
-[ 	]*[a-f0-9]+:	0f 01 fa             	monitorx %eax,%ecx,%edx
-[ 	]*[a-f0-9]+:	0f 01 fb             	mwaitx %eax,%ecx,%ebx
-[ 	]*[a-f0-9]+:	0f 01 fb             	mwaitx %eax,%ecx,%ebx
-[ 	]*[a-f0-9]+:[ 	]*66 0f ae 31[ 	]*clwb   \(%ecx\)
-[ 	]*[a-f0-9]+:[ 	]*66 0f ae b4 f4 c0 1d fe ff[ 	]*clwb   -0x1e240\(%esp,%esi,8\)
-[ 	]*[a-f0-9]+:[ 	]*f3 0f c7 f8[ 	]*rdpid  %eax
-[ 	]*[a-f0-9]+:[ 	]*f3 0f 09[ 	]*wbnoinvd[ 	]*
-#pass
+#dump: arch-13.d
--- a/gas/testsuite/gas/i386/arch-13-znver2.d
+++ b/gas/testsuite/gas/i386/arch-13-znver2.d
@@ -2,28 +2,4 @@ 
 #as: -march=znver2
 #objdump: -dw
 #name: i386 arch 13 (znver2)
-
-.*:     file format .*
-
-Disassembly of section .text:
-
-0+ <.text>:
-[ 	]*[a-f0-9]+:	0f 01 ca             	clac[ ]*
-[ 	]*[a-f0-9]+:	0f 01 cb             	stac[ ]*
-[ 	]*[a-f0-9]+:	66 0f 38 f6 ca       	adcx   %edx,%ecx
-[ 	]*[a-f0-9]+:	f3 0f 38 f6 ca       	adox   %edx,%ecx
-[ 	]*[a-f0-9]+:	0f c7 f8             	rdseed %eax
-[ 	]*[a-f0-9]+:	0f 01 fc             	clzero[ ]*
-[ 	]*[a-f0-9]+:	0f c7 21             	xsavec \(%ecx\)
-[ 	]*[a-f0-9]+:	0f c7 29             	xsaves \(%ecx\)
-[ 	]*[a-f0-9]+:	66 0f ae 39          	clflushopt \(%ecx\)
-[ 	]*[a-f0-9]+:	0f 01 fa             	monitorx %eax,%ecx,%edx
-[ 	]*[a-f0-9]+:	67 0f 01 fa          	monitorx %ax,%ecx,%edx
-[ 	]*[a-f0-9]+:	0f 01 fa             	monitorx %eax,%ecx,%edx
-[ 	]*[a-f0-9]+:	0f 01 fb             	mwaitx %eax,%ecx,%ebx
-[ 	]*[a-f0-9]+:	0f 01 fb             	mwaitx %eax,%ecx,%ebx
-[ 	]*[a-f0-9]+:[ 	]*66 0f ae 31[ 	]*clwb   \(%ecx\)
-[ 	]*[a-f0-9]+:[ 	]*66 0f ae b4 f4 c0 1d fe ff[ 	]*clwb   -0x1e240\(%esp,%esi,8\)
-[ 	]*[a-f0-9]+:[ 	]*f3 0f c7 f8[ 	]*rdpid  %eax
-[ 	]*[a-f0-9]+:[ 	]*f3 0f 09[ 	]*wbnoinvd[ 	]*
-#pass
+#dump: arch-13.d
--- a/gas/testsuite/gas/i386/arch-13.d
+++ b/gas/testsuite/gas/i386/arch-13.d
@@ -12,7 +12,9 @@  Disassembly of section .text:
 [ 	]*[a-f0-9]+:	66 0f 38 f6 ca       	adcx   %edx,%ecx
 [ 	]*[a-f0-9]+:	f3 0f 38 f6 ca       	adox   %edx,%ecx
 [ 	]*[a-f0-9]+:	0f c7 f8             	rdseed %eax
-[ 	]*[a-f0-9]+:	0f 01 fc             	clzero 
+[ 	]*[a-f0-9]+:	0f 01 fc             	clzero[ 	]*
+[ 	]*[a-f0-9]+:	0f 01 fc             	clzero[ 	]*
+[ 	]*[a-f0-9]+:	67 0f 01 fc          	addr16 clzero[ 	]*
 [ 	]*[a-f0-9]+:	0f c7 21             	xsavec \(%ecx\)
 [ 	]*[a-f0-9]+:	0f c7 29             	xsaves \(%ecx\)
 [ 	]*[a-f0-9]+:	66 0f ae 39          	clflushopt \(%ecx\)
--- a/gas/testsuite/gas/i386/arch-13.s
+++ b/gas/testsuite/gas/i386/arch-13.s
@@ -11,6 +11,8 @@ 
 	rdseed    %eax
 #CLZERO
 	clzero
+	clzero  %eax
+	clzero  %ax
 #XSAVEC
 	xsavec  (%ecx)
 #XSAVES
--- a/gas/testsuite/gas/i386/mwaitx-reg.l
+++ b/gas/testsuite/gas/i386/mwaitx-reg.l
@@ -1,59 +1,59 @@ 
 #as: -march=mwaitx
 .*: Assembler messages:
 #eax
-.*:[0-9]*: Error: .*eax.* 2 .*monitorx.*
-.*:[0-9]*: Error: .*eax.* 3 .*monitorx.*
-.*:[0-9]*: Error: .*eax.* 2 .*mwaitx.*
-.*:[0-9]*: Error: .*eax.* 3 .*mwaitx.*
+.*:[0-9]*: Error: .*monitorx.*
+.*:[0-9]*: Error: .*monitorx.*
+.*:[0-9]*: Error: .*mwaitx.*
+.*:[0-9]*: Error: .*mwaitx.*
 
 #ebx
-.*:[0-9]*: Error: .*ebx.* 1 .*monitorx.*
-.*:[0-9]*: Error: .*ebx.* 2 .*monitorx.*
-.*:[0-9]*: Error: .*ebx.* 3 .*monitorx.*
-.*:[0-9]*: Error: .*ebx.* 1 .*mwaitx.*
-.*:[0-9]*: Error: .*ebx.* 2 .*mwaitx.*
+.*:[0-9]*: Error: .*monitorx.*
+.*:[0-9]*: Error: .*monitorx.*
+.*:[0-9]*: Error: .*monitorx.*
+.*:[0-9]*: Error: .*mwaitx.*
+.*:[0-9]*: Error: .*mwaitx.*
 
 #ecx
-.*:[0-9]*: Error: .*ecx.* 1 .*monitorx.*
-.*:[0-9]*: Error: .*ecx.* 3 .*monitorx.*
-.*:[0-9]*: Error: .*ecx.* 1 .*mwaitx.*
-.*:[0-9]*: Error: .*ecx.* 3 .*mwaitx.*
+.*:[0-9]*: Error: .*monitorx.*
+.*:[0-9]*: Error: .*monitorx.*
+.*:[0-9]*: Error: .*mwaitx.*
+.*:[0-9]*: Error: .*mwaitx.*
 
 #edx
-.*:[0-9]*: Error: .*edx.* 1 .*monitorx.*
-.*:[0-9]*: Error: .*edx.* 2 .*monitorx.*
-.*:[0-9]*: Error: .*edx.* 1 .*mwaitx.*
-.*:[0-9]*: Error: .*edx.* 2 .*mwaitx.*
-.*:[0-9]*: Error: .*edx.* 3 .*mwaitx.*
+.*:[0-9]*: Error: .*monitorx.*
+.*:[0-9]*: Error: .*monitorx.*
+.*:[0-9]*: Error: .*mwaitx.*
+.*:[0-9]*: Error: .*mwaitx.*
+.*:[0-9]*: Error: .*mwaitx.*
 
 #esp
-.*:[0-9]*: Error: .*esp.* 1 .*monitorx.*
-.*:[0-9]*: Error: .*esp.* 2 .*monitorx.*
-.*:[0-9]*: Error: .*esp.* 3 .*monitorx.*
-.*:[0-9]*: Error: .*esp.* 1 .*mwaitx.*
-.*:[0-9]*: Error: .*esp.* 2 .*mwaitx.*
-.*:[0-9]*: Error: .*esp.* 3 .*mwaitx.*
+.*:[0-9]*: Error: .*monitorx.*
+.*:[0-9]*: Error: .*monitorx.*
+.*:[0-9]*: Error: .*monitorx.*
+.*:[0-9]*: Error: .*mwaitx.*
+.*:[0-9]*: Error: .*mwaitx.*
+.*:[0-9]*: Error: .*mwaitx.*
 
 #ebp
-.*:[0-9]*: Error: .*ebp.* 1 .*monitorx.*
-.*:[0-9]*: Error: .*ebp.* 2 .*monitorx.*
-.*:[0-9]*: Error: .*ebp.* 3 .*monitorx.*
-.*:[0-9]*: Error: .*ebp.* 1 .*mwaitx.*
-.*:[0-9]*: Error: .*ebp.* 2 .*mwaitx.*
-.*:[0-9]*: Error: .*ebp.* 3 .*mwaitx.*
+.*:[0-9]*: Error: .*monitorx.*
+.*:[0-9]*: Error: .*monitorx.*
+.*:[0-9]*: Error: .*monitorx.*
+.*:[0-9]*: Error: .*mwaitx.*
+.*:[0-9]*: Error: .*mwaitx.*
+.*:[0-9]*: Error: .*mwaitx.*
 
 #esi
-.*:[0-9]*: Error: .*esi.* 1 .*monitorx.*
-.*:[0-9]*: Error: .*esi.* 2 .*monitorx.*
-.*:[0-9]*: Error: .*esi.* 3 .*monitorx.*
-.*:[0-9]*: Error: .*esi.* 1 .*mwaitx.*
-.*:[0-9]*: Error: .*esi.* 2 .*mwaitx.*
-.*:[0-9]*: Error: .*esi.* 3 .*mwaitx.*
+.*:[0-9]*: Error: .*monitorx.*
+.*:[0-9]*: Error: .*monitorx.*
+.*:[0-9]*: Error: .*monitorx.*
+.*:[0-9]*: Error: .*mwaitx.*
+.*:[0-9]*: Error: .*mwaitx.*
+.*:[0-9]*: Error: .*mwaitx.*
 
 #edi
-.*:[0-9]*: Error: .*edi.* 1 .*monitorx.*
-.*:[0-9]*: Error: .*edi.* 2 .*monitorx.*
-.*:[0-9]*: Error: .*edi.* 3 .*monitorx.*
-.*:[0-9]*: Error: .*edi.* 1 .*mwaitx.*
-.*:[0-9]*: Error: .*edi.* 2 .*mwaitx.*
-.*:[0-9]*: Error: .*edi.* 3 .*mwaitx.*
+.*:[0-9]*: Error: .*monitorx.*
+.*:[0-9]*: Error: .*monitorx.*
+.*:[0-9]*: Error: .*monitorx.*
+.*:[0-9]*: Error: .*mwaitx.*
+.*:[0-9]*: Error: .*mwaitx.*
+.*:[0-9]*: Error: .*mwaitx.*
--- a/gas/testsuite/gas/i386/svme.d
+++ b/gas/testsuite/gas/i386/svme.d
@@ -20,10 +20,20 @@  Disassembly of section .text:
 [	 ]*[0-9a-f]+:[	 ]+0f 01 da[	 ]+vmload[	 ]*
 [	 ]*[0-9a-f]+:[	 ]+0f 01 d8[	 ]+vmrun[	 ]*
 [	 ]*[0-9a-f]+:[	 ]+0f 01 db[	 ]+vmsave[	 ]*
+[0-9a-f]+ <att16>:
+[	 ]*[0-9a-f]+:[	 ]+67 0f 01 df[	 ]+addr16 invlpga[	 ]*
+[	 ]*[0-9a-f]+:[	 ]+67 0f 01 da[	 ]+addr16 vmload[	 ]*
+[	 ]*[0-9a-f]+:[	 ]+67 0f 01 d8[	 ]+addr16 vmrun[	 ]*
+[	 ]*[0-9a-f]+:[	 ]+67 0f 01 db[	 ]+addr16 vmsave[	 ]*
 [0-9a-f]+ <intel32>:
 [	 ]*[0-9a-f]+:[	 ]+0f 01 de[	 ]+skinit[	 ]*
 [	 ]*[0-9a-f]+:[	 ]+0f 01 df[	 ]+invlpga[	 ]*
 [	 ]*[0-9a-f]+:[	 ]+0f 01 da[	 ]+vmload[	 ]*
 [	 ]*[0-9a-f]+:[	 ]+0f 01 d8[	 ]+vmrun[	 ]*
 [	 ]*[0-9a-f]+:[	 ]+0f 01 db[	 ]+vmsave[	 ]*
+[0-9a-f]+ <intel16>:
+[	 ]*[0-9a-f]+:[	 ]+67 0f 01 df[	 ]+addr16 invlpga[	 ]*
+[	 ]*[0-9a-f]+:[	 ]+67 0f 01 da[	 ]+addr16 vmload[	 ]*
+[	 ]*[0-9a-f]+:[	 ]+67 0f 01 d8[	 ]+addr16 vmrun[	 ]*
+[	 ]*[0-9a-f]+:[	 ]+67 0f 01 db[	 ]+addr16 vmsave[	 ]*
 #pass
--- a/gas/testsuite/gas/i386/svme.s
+++ b/gas/testsuite/gas/i386/svme.s
@@ -23,6 +23,10 @@  att64:
 att32:
 	skinit	%eax
 	do_args	%eax, %ecx
+.ifndef __amd64__
+att16:
+	do_args	%ax, %ecx
+.endif
 
 .intel_syntax noprefix
 .ifdef __amd64__
@@ -32,5 +36,9 @@  intel64:
 intel32:
 	skinit	eax
 	do_args	eax, ecx
+.ifndef __amd64__
+intel16:
+	do_args	ax, ecx
+.endif
 
 	.p2align 4,0
--- a/gas/testsuite/gas/i386/x86-64-arch-3-znver1.d
+++ b/gas/testsuite/gas/i386/x86-64-arch-3-znver1.d
@@ -2,30 +2,4 @@ 
 #as: -march=znver1+rdpid+clwb+wbnoinvd
 #objdump: -dw
 #name: x86-64 arch 3 (znver1)
-
-.*:     file format .*
-
-Disassembly of section .text:
-
-0+ <.text>:
-[ 	]*[a-f0-9]+:	0f 01 ca             	clac   
-[ 	]*[a-f0-9]+:	0f 01 cb             	stac   
-[ 	]*[a-f0-9]+:	66 0f 38 f6 ca       	adcx   %edx,%ecx
-[ 	]*[a-f0-9]+:	f3 0f 38 f6 ca       	adox   %edx,%ecx
-[ 	]*[a-f0-9]+:	0f c7 f8             	rdseed %eax
-[ 	]*[a-f0-9]+:	0f 01 fc             	clzero 
-[ 	]*[a-f0-9]+:	44 0f 38 c8 00       	sha1nexte \(%rax\),%xmm8
-[ 	]*[a-f0-9]+:	48 0f c7 21          	xsavec64 \(%rcx\)
-[ 	]*[a-f0-9]+:	48 0f c7 29          	xsaves64 \(%rcx\)
-[ 	]*[a-f0-9]+:	66 0f ae 39          	clflushopt \(%rcx\)
-[ 	]*[a-f0-9]+:	0f 01 fa             	monitorx %rax,%rcx,%rdx
-[ 	]*[a-f0-9]+:	67 0f 01 fa          	monitorx %eax,%rcx,%rdx
-[ 	]*[a-f0-9]+:	0f 01 fa             	monitorx %rax,%rcx,%rdx
-[ 	]*[a-f0-9]+:	0f 01 fb             	mwaitx %rax,%rcx,%rbx
-[ 	]*[a-f0-9]+:	0f 01 fb             	mwaitx %rax,%rcx,%rbx
-[ 	]*[a-f0-9]+:[ 	]*66 0f ae 31[ 	]*clwb   \(%rcx\)
-[ 	]*[a-f0-9]+:[ 	]*66 42 0f ae b4 f0 23 01 00 00[ 	]*clwb   0x123\(%rax,%r14,8\)
-[ 	]*[a-f0-9]+:[ 	]*f3 0f c7 f8[ 	]*rdpid  %rax
-[ 	]*[a-f0-9]+:[ 	]*f3 41 0f c7 fa[ 	]*rdpid  %r10
-[ 	]*[a-f0-9]+:[ 	]*f3 0f 09[ 	]*wbnoinvd[ 	]*
-#pass
+#dump: x86-64-arch-3.d
--- a/gas/testsuite/gas/i386/x86-64-arch-3-znver2.d
+++ b/gas/testsuite/gas/i386/x86-64-arch-3-znver2.d
@@ -2,30 +2,4 @@ 
 #as: -march=znver2
 #objdump: -dw
 #name: x86-64 arch 3 (znver2)
-
-.*:     file format .*
-
-Disassembly of section .text:
-
-0+ <.text>:
-[ 	]*[a-f0-9]+:	0f 01 ca             	clac[ ]*
-[ 	]*[a-f0-9]+:	0f 01 cb             	stac[ ]*
-[ 	]*[a-f0-9]+:	66 0f 38 f6 ca       	adcx   %edx,%ecx
-[ 	]*[a-f0-9]+:	f3 0f 38 f6 ca       	adox   %edx,%ecx
-[ 	]*[a-f0-9]+:	0f c7 f8             	rdseed %eax
-[ 	]*[a-f0-9]+:	0f 01 fc             	clzero[ ]*
-[ 	]*[a-f0-9]+:	44 0f 38 c8 00       	sha1nexte \(%rax\),%xmm8
-[ 	]*[a-f0-9]+:	48 0f c7 21          	xsavec64 \(%rcx\)
-[ 	]*[a-f0-9]+:	48 0f c7 29          	xsaves64 \(%rcx\)
-[ 	]*[a-f0-9]+:	66 0f ae 39          	clflushopt \(%rcx\)
-[ 	]*[a-f0-9]+:	0f 01 fa             	monitorx %rax,%rcx,%rdx
-[ 	]*[a-f0-9]+:	67 0f 01 fa          	monitorx %eax,%rcx,%rdx
-[ 	]*[a-f0-9]+:	0f 01 fa             	monitorx %rax,%rcx,%rdx
-[ 	]*[a-f0-9]+:	0f 01 fb             	mwaitx %rax,%rcx,%rbx
-[ 	]*[a-f0-9]+:	0f 01 fb             	mwaitx %rax,%rcx,%rbx
-[ 	]*[a-f0-9]+:[ 	]*66 0f ae 31[ 	]*clwb   \(%rcx\)
-[ 	]*[a-f0-9]+:[ 	]*66 42 0f ae b4 f0 23 01 00 00[ 	]*clwb   0x123\(%rax,%r14,8\)
-[ 	]*[a-f0-9]+:[ 	]*f3 0f c7 f8[ 	]*rdpid  %rax
-[ 	]*[a-f0-9]+:[ 	]*f3 41 0f c7 fa[ 	]*rdpid  %r10
-[ 	]*[a-f0-9]+:[ 	]*f3 0f 09[ 	]*wbnoinvd[ 	]*
-#pass
+#dump: x86-64-arch-3.d
--- a/gas/testsuite/gas/i386/x86-64-arch-3.d
+++ b/gas/testsuite/gas/i386/x86-64-arch-3.d
@@ -12,7 +12,9 @@  Disassembly of section .text:
 [ 	]*[a-f0-9]+:	66 0f 38 f6 ca       	adcx   %edx,%ecx
 [ 	]*[a-f0-9]+:	f3 0f 38 f6 ca       	adox   %edx,%ecx
 [ 	]*[a-f0-9]+:	0f c7 f8             	rdseed %eax
-[ 	]*[a-f0-9]+:	0f 01 fc             	clzero 
+[ 	]*[a-f0-9]+:	0f 01 fc             	clzero[ 	]*
+[ 	]*[a-f0-9]+:	0f 01 fc             	clzero[ 	]*
+[ 	]*[a-f0-9]+:	67 0f 01 fc          	addr32 clzero[ 	]*
 [ 	]*[a-f0-9]+:	44 0f 38 c8 00       	sha1nexte \(%rax\),%xmm8
 [ 	]*[a-f0-9]+:	48 0f c7 21          	xsavec64 \(%rcx\)
 [ 	]*[a-f0-9]+:	48 0f c7 29          	xsaves64 \(%rcx\)
--- a/gas/testsuite/gas/i386/x86-64-arch-3.s
+++ b/gas/testsuite/gas/i386/x86-64-arch-3.s
@@ -10,6 +10,8 @@ 
 	rdseed    %eax
 #CLZERO
 	clzero
+	clzero  %rax
+	clzero  %eax
 #SHA
 	sha1nexte (%rax), %xmm8
 #XSAVEC
--- a/gas/testsuite/gas/i386/x86-64-mwaitx-reg.l
+++ b/gas/testsuite/gas/i386/x86-64-mwaitx-reg.l
@@ -1,123 +1,123 @@ 
 #as: -march=mwaitx
 .*: Assembler messages:
 #rax
-.*:[0-9]*: Error: .*rax.* 2 .*monitorx.*
-.*:[0-9]*: Error: .*rax.* 3 .*monitorx.*
-.*:[0-9]*: Error: .*rax.* 2 .*mwaitx.*
-.*:[0-9]*: Error: .*rax.* 3 .*mwaitx.*
+.*:[0-9]*: Error:.*monitorx.*
+.*:[0-9]*: Error:.*monitorx.*
+.*:[0-9]*: Error:.*mwaitx.*
+.*:[0-9]*: Error:.*mwaitx.*
 
 #rbx
-.*:[0-9]*: Error: .*rbx.* 1 .*monitorx.*
-.*:[0-9]*: Error: .*rbx.* 2 .*monitorx.*
-.*:[0-9]*: Error: .*rbx.* 3 .*monitorx.*
-.*:[0-9]*: Error: .*rbx.* 1 .*mwaitx.*
-.*:[0-9]*: Error: .*rbx.* 2 .*mwaitx.*
+.*:[0-9]*: Error: .*monitorx.*
+.*:[0-9]*: Error: .*monitorx.*
+.*:[0-9]*: Error: .*monitorx.*
+.*:[0-9]*: Error: .*mwaitx.*
+.*:[0-9]*: Error: .*mwaitx.*
 
 #rcx
-.*:[0-9]*: Error: .*rcx.* 1 .*monitorx.*
-.*:[0-9]*: Error: .*rcx.* 3 .*monitorx.*
-.*:[0-9]*: Error: .*rcx.* 1 .*mwaitx.*
-.*:[0-9]*: Error: .*rcx.* 3 .*mwaitx.*
+.*:[0-9]*: Error: .*monitorx.*
+.*:[0-9]*: Error: .*monitorx.*
+.*:[0-9]*: Error: .*mwaitx.*
+.*:[0-9]*: Error: .*mwaitx.*
 
 #rdx
-.*:[0-9]*: Error: .*rdx.* 1 .*monitorx.*
-.*:[0-9]*: Error: .*rdx.* 2 .*monitorx.*
-.*:[0-9]*: Error: .*rdx.* 1 .*mwaitx.*
-.*:[0-9]*: Error: .*rdx.* 2 .*mwaitx.*
-.*:[0-9]*: Error: .*rdx.* 3 .*mwaitx.*
+.*:[0-9]*: Error: .*monitorx.*
+.*:[0-9]*: Error: .*monitorx.*
+.*:[0-9]*: Error: .*mwaitx.*
+.*:[0-9]*: Error: .*mwaitx.*
+.*:[0-9]*: Error: .*mwaitx.*
 
 #rsp
-.*:[0-9]*: Error: .*rsp.* 1 .*monitorx.*
-.*:[0-9]*: Error: .*rsp.* 2 .*monitorx.*
-.*:[0-9]*: Error: .*rsp.* 3 .*monitorx.*
-.*:[0-9]*: Error: .*rsp.* 1 .*mwaitx.*
-.*:[0-9]*: Error: .*rsp.* 2 .*mwaitx.*
-.*:[0-9]*: Error: .*rsp.* 3 .*mwaitx.*
+.*:[0-9]*: Error: .*monitorx.*
+.*:[0-9]*: Error: .*monitorx.*
+.*:[0-9]*: Error: .*monitorx.*
+.*:[0-9]*: Error: .*mwaitx.*
+.*:[0-9]*: Error: .*mwaitx.*
+.*:[0-9]*: Error: .*mwaitx.*
 
 #rbp
-.*:[0-9]*: Error: .*rbp.* 1 .*monitorx.*
-.*:[0-9]*: Error: .*rbp.* 2 .*monitorx.*
-.*:[0-9]*: Error: .*rbp.* 3 .*monitorx.*
-.*:[0-9]*: Error: .*rbp.* 1 .*mwaitx.*
-.*:[0-9]*: Error: .*rbp.* 2 .*mwaitx.*
-.*:[0-9]*: Error: .*rbp.* 3 .*mwaitx.*
+.*:[0-9]*: Error: .*monitorx.*
+.*:[0-9]*: Error: .*monitorx.*
+.*:[0-9]*: Error: .*monitorx.*
+.*:[0-9]*: Error: .*mwaitx.*
+.*:[0-9]*: Error: .*mwaitx.*
+.*:[0-9]*: Error: .*mwaitx.*
 
 #rsi
-.*:[0-9]*: Error: .*rsi.* 1 .*monitorx.*
-.*:[0-9]*: Error: .*rsi.* 2 .*monitorx.*
-.*:[0-9]*: Error: .*rsi.* 3 .*monitorx.*
-.*:[0-9]*: Error: .*rsi.* 1 .*mwaitx.*
-.*:[0-9]*: Error: .*rsi.* 2 .*mwaitx.*
-.*:[0-9]*: Error: .*rsi.* 3 .*mwaitx.*
+.*:[0-9]*: Error: .*monitorx.*
+.*:[0-9]*: Error: .*monitorx.*
+.*:[0-9]*: Error: .*monitorx.*
+.*:[0-9]*: Error: .*mwaitx.*
+.*:[0-9]*: Error: .*mwaitx.*
+.*:[0-9]*: Error: .*mwaitx.*
 
 #rdi
-.*:[0-9]*: Error: .*rdi.* 1 .*monitorx.*
-.*:[0-9]*: Error: .*rdi.* 2 .*monitorx.*
-.*:[0-9]*: Error: .*rdi.* 3 .*monitorx.*
-.*:[0-9]*: Error: .*rdi.* 1 .*mwaitx.*
-.*:[0-9]*: Error: .*rdi.* 2 .*mwaitx.*
-.*:[0-9]*: Error: .*rdi.* 3 .*mwaitx.*
+.*:[0-9]*: Error: .*monitorx.*
+.*:[0-9]*: Error: .*monitorx.*
+.*:[0-9]*: Error: .*monitorx.*
+.*:[0-9]*: Error: .*mwaitx.*
+.*:[0-9]*: Error: .*mwaitx.*
+.*:[0-9]*: Error: .*mwaitx.*
 
 #r8
-.*:[0-9]*: Error: .*r8.* 1 .*monitorx.*
-.*:[0-9]*: Error: .*r8.* 2 .*monitorx.*
-.*:[0-9]*: Error: .*r8.* 3 .*monitorx.*
-.*:[0-9]*: Error: .*r8.* 1 .*mwaitx.*
-.*:[0-9]*: Error: .*r8.* 2 .*mwaitx.*
-.*:[0-9]*: Error: .*r8.* 3 .*mwaitx.*
+.*:[0-9]*: Error: .*monitorx.*
+.*:[0-9]*: Error: .*monitorx.*
+.*:[0-9]*: Error: .*monitorx.*
+.*:[0-9]*: Error: .*mwaitx.*
+.*:[0-9]*: Error: .*mwaitx.*
+.*:[0-9]*: Error: .*mwaitx.*
 
 #r9
-.*:[0-9]*: Error: .*r9.* 1 .*monitorx.*
-.*:[0-9]*: Error: .*r9.* 2 .*monitorx.*
-.*:[0-9]*: Error: .*r9.* 3 .*monitorx.*
-.*:[0-9]*: Error: .*r9.* 1 .*mwaitx.*
-.*:[0-9]*: Error: .*r9.* 2 .*mwaitx.*
-.*:[0-9]*: Error: .*r9.* 3 .*mwaitx.*
+.*:[0-9]*: Error: .*monitorx.*
+.*:[0-9]*: Error: .*monitorx.*
+.*:[0-9]*: Error: .*monitorx.*
+.*:[0-9]*: Error: .*mwaitx.*
+.*:[0-9]*: Error: .*mwaitx.*
+.*:[0-9]*: Error: .*mwaitx.*
 
 #r10
-.*:[0-9]*: Error: .*r10.* 1 .*monitorx.*
-.*:[0-9]*: Error: .*r10.* 2 .*monitorx.*
-.*:[0-9]*: Error: .*r10.* 3 .*monitorx.*
-.*:[0-9]*: Error: .*r10.* 1 .*mwaitx.*
-.*:[0-9]*: Error: .*r10.* 2 .*mwaitx.*
-.*:[0-9]*: Error: .*r10.* 3 .*mwaitx.*
+.*:[0-9]*: Error: .*monitorx.*
+.*:[0-9]*: Error: .*monitorx.*
+.*:[0-9]*: Error: .*monitorx.*
+.*:[0-9]*: Error: .*mwaitx.*
+.*:[0-9]*: Error: .*mwaitx.*
+.*:[0-9]*: Error: .*mwaitx.*
 
 #r11
-.*:[0-9]*: Error: .*r11.* 1 .*monitorx.*
-.*:[0-9]*: Error: .*r11.* 2 .*monitorx.*
-.*:[0-9]*: Error: .*r11.* 3 .*monitorx.*
-.*:[0-9]*: Error: .*r11.* 1 .*mwaitx.*
-.*:[0-9]*: Error: .*r11.* 2 .*mwaitx.*
-.*:[0-9]*: Error: .*r11.* 3 .*mwaitx.*
+.*:[0-9]*: Error: .*monitorx.*
+.*:[0-9]*: Error: .*monitorx.*
+.*:[0-9]*: Error: .*monitorx.*
+.*:[0-9]*: Error: .*mwaitx.*
+.*:[0-9]*: Error: .*mwaitx.*
+.*:[0-9]*: Error: .*mwaitx.*
 
 #r12
-.*:[0-9]*: Error: .*r12.* 1 .*monitorx.*
-.*:[0-9]*: Error: .*r12.* 2 .*monitorx.*
-.*:[0-9]*: Error: .*r12.* 3 .*monitorx.*
-.*:[0-9]*: Error: .*r12.* 1 .*mwaitx.*
-.*:[0-9]*: Error: .*r12.* 2 .*mwaitx.*
-.*:[0-9]*: Error: .*r12.* 3 .*mwaitx.*
+.*:[0-9]*: Error: .*monitorx.*
+.*:[0-9]*: Error: .*monitorx.*
+.*:[0-9]*: Error: .*monitorx.*
+.*:[0-9]*: Error: .*mwaitx.*
+.*:[0-9]*: Error: .*mwaitx.*
+.*:[0-9]*: Error: .*mwaitx.*
 
 #r13
-.*:[0-9]*: Error: .*r13.* 1 .*monitorx.*
-.*:[0-9]*: Error: .*r13.* 2 .*monitorx.*
-.*:[0-9]*: Error: .*r13.* 3 .*monitorx.*
-.*:[0-9]*: Error: .*r13.* 1 .*mwaitx.*
-.*:[0-9]*: Error: .*r13.* 2 .*mwaitx.*
-.*:[0-9]*: Error: .*r13.* 3 .*mwaitx.*
+.*:[0-9]*: Error: .*monitorx.*
+.*:[0-9]*: Error: .*monitorx.*
+.*:[0-9]*: Error: .*monitorx.*
+.*:[0-9]*: Error: .*mwaitx.*
+.*:[0-9]*: Error: .*mwaitx.*
+.*:[0-9]*: Error: .*mwaitx.*
 
 #r14
-.*:[0-9]*: Error: .*r14.* 1 .*monitorx.*
-.*:[0-9]*: Error: .*r14.* 2 .*monitorx.*
-.*:[0-9]*: Error: .*r14.* 3 .*monitorx.*
-.*:[0-9]*: Error: .*r14.* 1 .*mwaitx.*
-.*:[0-9]*: Error: .*r14.* 2 .*mwaitx.*
-.*:[0-9]*: Error: .*r14.* 3 .*mwaitx.*
+.*:[0-9]*: Error: .*monitorx.*
+.*:[0-9]*: Error: .*monitorx.*
+.*:[0-9]*: Error: .*monitorx.*
+.*:[0-9]*: Error: .*mwaitx.*
+.*:[0-9]*: Error: .*mwaitx.*
+.*:[0-9]*: Error: .*mwaitx.*
 
 #r15
-.*:[0-9]*: Error: .*r15.* 1 .*monitorx.*
-.*:[0-9]*: Error: .*r15.* 2 .*monitorx.*
-.*:[0-9]*: Error: .*r15.* 3 .*monitorx.*
-.*:[0-9]*: Error: .*r15.* 1 .*mwaitx.*
-.*:[0-9]*: Error: .*r15.* 2 .*mwaitx.*
-.*:[0-9]*: Error: .*r15.* 3 .*mwaitx.*
+.*:[0-9]*: Error: .*monitorx.*
+.*:[0-9]*: Error: .*monitorx.*
+.*:[0-9]*: Error: .*monitorx.*
+.*:[0-9]*: Error: .*mwaitx.*
+.*:[0-9]*: Error: .*mwaitx.*
+.*:[0-9]*: Error: .*mwaitx.*
--- a/gas/testsuite/gas/i386/x86-64-specific-reg.l
+++ b/gas/testsuite/gas/i386/x86-64-specific-reg.l
@@ -9,10 +9,10 @@ 
 .*:[0-9]*: Warning: .*rax.*rdi.*
 .*:[0-9]*: Warning: .*rax.*rdi.*
 .*:[0-9]*: Warning: .*rax.*rsi.*
-.*:[0-9]*: Error: .*rax.* 2 .*mwait.*
-.*:[0-9]*: Error: .*rax.* 2 .*monitor.*
-.*:[0-9]*: Error: .*rax.* 3 .*monitor.*
-.*:[0-9]*: Error: .*eax.* 2 .*invlpga.*
+.*:[0-9]*: Error: .*mwait.*
+.*:[0-9]*: Error: .*monitor.*
+.*:[0-9]*: Error: .*monitor.*
+.*:[0-9]*: Error: .*invlpga.*
 .*:[0-9]*: Warning: .*rcx.*rsi.*
 .*:[0-9]*: Warning: .*rcx.*rdi.*
 .*:[0-9]*: Warning: .*rcx.*rdi.*
@@ -23,14 +23,14 @@ 
 .*:[0-9]*: Warning: .*rcx.*rdi.*
 .*:[0-9]*: Warning: .*rcx.*rdi.*
 .*:[0-9]*: Warning: .*rcx.*rsi.*
-.*:[0-9]*: Error: .*rcx.* 1 .*mwait.*
-.*:[0-9]*: Error: .*rcx.* 1 .*monitor.*
-.*:[0-9]*: Error: .*rcx.* 3 .*monitor.*
-.*:[0-9]*: Error: .*rcx.* 1 .*vmload.*
-.*:[0-9]*: Error: .*rcx.* 1 .*vmrun.*
-.*:[0-9]*: Error: .*rcx.* 1 .*vmsave.*
-.*:[0-9]*: Error: .*rcx.* 1 .*invlpga.*
-.*:[0-9]*: Error: .*ecx.* 1 .*skinit.*
+.*:[0-9]*: Error: .*mwait.*
+.*:[0-9]*: Error: .*monitor.*
+.*:[0-9]*: Error: .*monitor.*
+.*:[0-9]*: Error: .*vmload.*
+.*:[0-9]*: Error: .*vmrun.*
+.*:[0-9]*: Error: .*vmsave.*
+.*:[0-9]*: Error: .*invlpga.*
+.*:[0-9]*: Error: .*skinit.*
 .*:[0-9]*: Warning: .*rdx.*rsi.*
 .*:[0-9]*: Warning: .*rdx.*rdi.*
 .*:[0-9]*: Warning: .*rdx.*rdi.*
@@ -41,16 +41,16 @@ 
 .*:[0-9]*: Warning: .*rdx.*rdi.*
 .*:[0-9]*: Warning: .*rdx.*rdi.*
 .*:[0-9]*: Warning: .*rdx.*rsi.*
-.*:[0-9]*: Error: .*rdx.* 1 .*mwait.*
-.*:[0-9]*: Error: .*rdx.* 2 .*mwait.*
-.*:[0-9]*: Error: .*rdx.* 1 .*monitor.*
-.*:[0-9]*: Error: .*rdx.* 2 .*monitor.*
-.*:[0-9]*: Error: .*rdx.* 1 .*vmload.*
-.*:[0-9]*: Error: .*rdx.* 1 .*vmrun.*
-.*:[0-9]*: Error: .*rdx.* 1 .*vmsave.*
-.*:[0-9]*: Error: .*rdx.* 1 .*invlpga.*
-.*:[0-9]*: Error: .*edx.* 2 .*invlpga.*
-.*:[0-9]*: Error: .*edx.* 1 .*skinit.*
+.*:[0-9]*: Error: .*mwait.*
+.*:[0-9]*: Error: .*mwait.*
+.*:[0-9]*: Error: .*monitor.*
+.*:[0-9]*: Error: .*monitor.*
+.*:[0-9]*: Error: .*vmload.*
+.*:[0-9]*: Error: .*vmrun.*
+.*:[0-9]*: Error: .*vmsave.*
+.*:[0-9]*: Error: .*invlpga.*
+.*:[0-9]*: Error: .*invlpga.*
+.*:[0-9]*: Error: .*skinit.*
 .*:[0-9]*: Warning: .*rbx.*rsi.*
 .*:[0-9]*: Warning: .*rbx.*rdi.*
 .*:[0-9]*: Warning: .*rbx.*rdi.*
@@ -60,17 +60,17 @@ 
 .*:[0-9]*: Warning: .*rbx.*rdi.*
 .*:[0-9]*: Warning: .*rbx.*rdi.*
 .*:[0-9]*: Warning: .*rbx.*rsi.*
-.*:[0-9]*: Error: .*rbx.* 1 .*mwait.*
-.*:[0-9]*: Error: .*rbx.* 2 .*mwait.*
-.*:[0-9]*: Error: .*rbx.* 1 .*monitor.*
-.*:[0-9]*: Error: .*rbx.* 2 .*monitor.*
-.*:[0-9]*: Error: .*rbx.* 3 .*monitor.*
-.*:[0-9]*: Error: .*rbx.* 1 .*vmload.*
-.*:[0-9]*: Error: .*rbx.* 1 .*vmrun.*
-.*:[0-9]*: Error: .*rbx.* 1 .*vmsave.*
-.*:[0-9]*: Error: .*rbx.* 1 .*invlpga.*
-.*:[0-9]*: Error: .*ebx.* 2 .*invlpga.*
-.*:[0-9]*: Error: .*ebx.* 1 .*skinit.*
+.*:[0-9]*: Error: .*mwait.*
+.*:[0-9]*: Error: .*mwait.*
+.*:[0-9]*: Error: .*monitor.*
+.*:[0-9]*: Error: .*monitor.*
+.*:[0-9]*: Error: .*monitor.*
+.*:[0-9]*: Error: .*vmload.*
+.*:[0-9]*: Error: .*vmrun.*
+.*:[0-9]*: Error: .*vmsave.*
+.*:[0-9]*: Error: .*invlpga.*
+.*:[0-9]*: Error: .*invlpga.*
+.*:[0-9]*: Error: .*skinit.*
 .*:[0-9]*: Warning: .*rsp.*rsi.*
 .*:[0-9]*: Warning: .*rsp.*rdi.*
 .*:[0-9]*: Warning: .*rsp.*rdi.*
@@ -81,17 +81,17 @@ 
 .*:[0-9]*: Warning: .*rsp.*rdi.*
 .*:[0-9]*: Warning: .*rsp.*rdi.*
 .*:[0-9]*: Warning: .*rsp.*rsi.*
-.*:[0-9]*: Error: .*rsp.* 1 .*mwait.*
-.*:[0-9]*: Error: .*rsp.* 2 .*mwait.*
-.*:[0-9]*: Error: .*rsp.* 1 .*monitor.*
-.*:[0-9]*: Error: .*rsp.* 2 .*monitor.*
-.*:[0-9]*: Error: .*rsp.* 3 .*monitor.*
-.*:[0-9]*: Error: .*rsp.* 1 .*vmload.*
-.*:[0-9]*: Error: .*rsp.* 1 .*vmrun.*
-.*:[0-9]*: Error: .*rsp.* 1 .*vmsave.*
-.*:[0-9]*: Error: .*rsp.* 1 .*invlpga.*
-.*:[0-9]*: Error: .*esp.* 2 .*invlpga.*
-.*:[0-9]*: Error: .*esp.* 1 .*skinit.*
+.*:[0-9]*: Error: .*mwait.*
+.*:[0-9]*: Error: .*mwait.*
+.*:[0-9]*: Error: .*monitor.*
+.*:[0-9]*: Error: .*monitor.*
+.*:[0-9]*: Error: .*monitor.*
+.*:[0-9]*: Error: .*vmload.*
+.*:[0-9]*: Error: .*vmrun.*
+.*:[0-9]*: Error: .*vmsave.*
+.*:[0-9]*: Error: .*invlpga.*
+.*:[0-9]*: Error: .*invlpga.*
+.*:[0-9]*: Error: .*skinit.*
 .*:[0-9]*: Warning: .*rbp.*rsi.*
 .*:[0-9]*: Warning: .*rbp.*rdi.*
 .*:[0-9]*: Warning: .*rbp.*rdi.*
@@ -102,50 +102,50 @@ 
 .*:[0-9]*: Warning: .*rbp.*rdi.*
 .*:[0-9]*: Warning: .*rbp.*rdi.*
 .*:[0-9]*: Warning: .*rbp.*rsi.*
-.*:[0-9]*: Error: .*rbp.* 1 .*mwait.*
-.*:[0-9]*: Error: .*rbp.* 2 .*mwait.*
-.*:[0-9]*: Error: .*rbp.* 1 .*monitor.*
-.*:[0-9]*: Error: .*rbp.* 2 .*monitor.*
-.*:[0-9]*: Error: .*rbp.* 3 .*monitor.*
-.*:[0-9]*: Error: .*rbp.* 1 .*vmload.*
-.*:[0-9]*: Error: .*rbp.* 1 .*vmrun.*
-.*:[0-9]*: Error: .*rbp.* 1 .*vmsave.*
-.*:[0-9]*: Error: .*rbp.* 1 .*invlpga.*
-.*:[0-9]*: Error: .*ebp.* 2 .*invlpga.*
-.*:[0-9]*: Error: .*ebp.* 1 .*skinit.*
+.*:[0-9]*: Error: .*mwait.*
+.*:[0-9]*: Error: .*mwait.*
+.*:[0-9]*: Error: .*monitor.*
+.*:[0-9]*: Error: .*monitor.*
+.*:[0-9]*: Error: .*monitor.*
+.*:[0-9]*: Error: .*vmload.*
+.*:[0-9]*: Error: .*vmrun.*
+.*:[0-9]*: Error: .*vmsave.*
+.*:[0-9]*: Error: .*invlpga.*
+.*:[0-9]*: Error: .*invlpga.*
+.*:[0-9]*: Error: .*skinit.*
 .*:[0-9]*: Warning: .*rsi.*rdi.*
 .*:[0-9]*: Warning: .*rsi.*rdi.*
 .*:[0-9]*: Warning: .*rsi.*rdi.*
 .*:[0-9]*: Warning: .*rsi.*rbx.*
 .*:[0-9]*: Warning: .*rsi.*rdi.*
 .*:[0-9]*: Warning: .*rsi.*rdi.*
-.*:[0-9]*: Error: .*rsi.* 1 .*mwait.*
-.*:[0-9]*: Error: .*rsi.* 2 .*mwait.*
-.*:[0-9]*: Error: .*rsi.* 1 .*monitor.*
-.*:[0-9]*: Error: .*rsi.* 2 .*monitor.*
-.*:[0-9]*: Error: .*rsi.* 3 .*monitor.*
-.*:[0-9]*: Error: .*rsi.* 1 .*vmload.*
-.*:[0-9]*: Error: .*rsi.* 1 .*vmrun.*
-.*:[0-9]*: Error: .*rsi.* 1 .*vmsave.*
-.*:[0-9]*: Error: .*rsi.* 1 .*invlpga.*
-.*:[0-9]*: Error: .*esi.* 2 .*invlpga.*
-.*:[0-9]*: Error: .*esi.* 1 .*skinit.*
+.*:[0-9]*: Error: .*mwait.*
+.*:[0-9]*: Error: .*mwait.*
+.*:[0-9]*: Error: .*monitor.*
+.*:[0-9]*: Error: .*monitor.*
+.*:[0-9]*: Error: .*monitor.*
+.*:[0-9]*: Error: .*vmload.*
+.*:[0-9]*: Error: .*vmrun.*
+.*:[0-9]*: Error: .*vmsave.*
+.*:[0-9]*: Error: .*invlpga.*
+.*:[0-9]*: Error: .*invlpga.*
+.*:[0-9]*: Error: .*skinit.*
 .*:[0-9]*: Warning: .*rdi.*rsi.*
 .*:[0-9]*: Warning: .*rdi.*rsi.*
 .*:[0-9]*: Warning: .*rdi.*rbx.*
 .*:[0-9]*: Warning: .*rdi.*rsi.*
 .*:[0-9]*: Warning: .*rdi.*rsi.*
-.*:[0-9]*: Error: .*rdi.* 1 .*mwait.*
-.*:[0-9]*: Error: .*rdi.* 2 .*mwait.*
-.*:[0-9]*: Error: .*rdi.* 1 .*monitor.*
-.*:[0-9]*: Error: .*rdi.* 2 .*monitor.*
-.*:[0-9]*: Error: .*rdi.* 3 .*monitor.*
-.*:[0-9]*: Error: .*rdi.* 1 .*vmload.*
-.*:[0-9]*: Error: .*rdi.* 1 .*vmrun.*
-.*:[0-9]*: Error: .*rdi.* 1 .*vmsave.*
-.*:[0-9]*: Error: .*rdi.* 1 .*invlpga.*
-.*:[0-9]*: Error: .*edi.* 2 .*invlpga.*
-.*:[0-9]*: Error: .*edi.* 1 .*skinit.*
+.*:[0-9]*: Error: .*mwait.*
+.*:[0-9]*: Error: .*mwait.*
+.*:[0-9]*: Error: .*monitor.*
+.*:[0-9]*: Error: .*monitor.*
+.*:[0-9]*: Error: .*monitor.*
+.*:[0-9]*: Error: .*vmload.*
+.*:[0-9]*: Error: .*vmrun.*
+.*:[0-9]*: Error: .*vmsave.*
+.*:[0-9]*: Error: .*invlpga.*
+.*:[0-9]*: Error: .*invlpga.*
+.*:[0-9]*: Error: .*skinit.*
 .*:[0-9]*: Warning: .*r8.*rsi.*
 .*:[0-9]*: Warning: .*r8.*rdi.*
 .*:[0-9]*: Warning: .*r8.*rdi.*
@@ -156,17 +156,17 @@ 
 .*:[0-9]*: Warning: .*r8.*rdi.*
 .*:[0-9]*: Warning: .*r8.*rdi.*
 .*:[0-9]*: Warning: .*r8.*rsi.*
-.*:[0-9]*: Error: .*r8.* 1 .*mwait.*
-.*:[0-9]*: Error: .*r8.* 2 .*mwait.*
-.*:[0-9]*: Error: .*r8.* 1 .*monitor.*
-.*:[0-9]*: Error: .*r8.* 2 .*monitor.*
-.*:[0-9]*: Error: .*r8.* 3 .*monitor.*
-.*:[0-9]*: Error: .*r8.* 1 .*vmload.*
-.*:[0-9]*: Error: .*r8.* 1 .*vmrun.*
-.*:[0-9]*: Error: .*r8.* 1 .*vmsave.*
-.*:[0-9]*: Error: .*r8.* 1 .*invlpga.*
-.*:[0-9]*: Error: .*r8.* 2 .*invlpga.*
-.*:[0-9]*: Error: .*r8.* 1 .*skinit.*
+.*:[0-9]*: Error: .*mwait.*
+.*:[0-9]*: Error: .*mwait.*
+.*:[0-9]*: Error: .*monitor.*
+.*:[0-9]*: Error: .*monitor.*
+.*:[0-9]*: Error: .*monitor.*
+.*:[0-9]*: Error: .*vmload.*
+.*:[0-9]*: Error: .*vmrun.*
+.*:[0-9]*: Error: .*vmsave.*
+.*:[0-9]*: Error: .*invlpga.*
+.*:[0-9]*: Error: .*invlpga.*
+.*:[0-9]*: Error: .*skinit.*
 .*:[0-9]*: Warning: .*r9.*rsi.*
 .*:[0-9]*: Warning: .*r9.*rdi.*
 .*:[0-9]*: Warning: .*r9.*rdi.*
@@ -177,17 +177,17 @@ 
 .*:[0-9]*: Warning: .*r9.*rdi.*
 .*:[0-9]*: Warning: .*r9.*rdi.*
 .*:[0-9]*: Warning: .*r9.*rsi.*
-.*:[0-9]*: Error: .*r9.* 1 .*mwait.*
-.*:[0-9]*: Error: .*r9.* 2 .*mwait.*
-.*:[0-9]*: Error: .*r9.* 1 .*monitor.*
-.*:[0-9]*: Error: .*r9.* 2 .*monitor.*
-.*:[0-9]*: Error: .*r9.* 3 .*monitor.*
-.*:[0-9]*: Error: .*r9.* 1 .*vmload.*
-.*:[0-9]*: Error: .*r9.* 1 .*vmrun.*
-.*:[0-9]*: Error: .*r9.* 1 .*vmsave.*
-.*:[0-9]*: Error: .*r9.* 1 .*invlpga.*
-.*:[0-9]*: Error: .*r9.* 2 .*invlpga.*
-.*:[0-9]*: Error: .*r9.* 1 .*skinit.*
+.*:[0-9]*: Error: .*mwait.*
+.*:[0-9]*: Error: .*mwait.*
+.*:[0-9]*: Error: .*monitor.*
+.*:[0-9]*: Error: .*monitor.*
+.*:[0-9]*: Error: .*monitor.*
+.*:[0-9]*: Error: .*vmload.*
+.*:[0-9]*: Error: .*vmrun.*
+.*:[0-9]*: Error: .*vmsave.*
+.*:[0-9]*: Error: .*invlpga.*
+.*:[0-9]*: Error: .*invlpga.*
+.*:[0-9]*: Error: .*skinit.*
 .*:[0-9]*: Warning: .*r10.*rsi.*
 .*:[0-9]*: Warning: .*r10.*rdi.*
 .*:[0-9]*: Warning: .*r10.*rdi.*
@@ -198,17 +198,17 @@ 
 .*:[0-9]*: Warning: .*r10.*rdi.*
 .*:[0-9]*: Warning: .*r10.*rdi.*
 .*:[0-9]*: Warning: .*r10.*rsi.*
-.*:[0-9]*: Error: .*r10.* 1 .*mwait.*
-.*:[0-9]*: Error: .*r10.* 2 .*mwait.*
-.*:[0-9]*: Error: .*r10.* 1 .*monitor.*
-.*:[0-9]*: Error: .*r10.* 2 .*monitor.*
-.*:[0-9]*: Error: .*r10.* 3 .*monitor.*
-.*:[0-9]*: Error: .*r10.* 1 .*vmload.*
-.*:[0-9]*: Error: .*r10.* 1 .*vmrun.*
-.*:[0-9]*: Error: .*r10.* 1 .*vmsave.*
-.*:[0-9]*: Error: .*r10.* 1 .*invlpga.*
-.*:[0-9]*: Error: .*r10.* 2 .*invlpga.*
-.*:[0-9]*: Error: .*r10.* 1 .*skinit.*
+.*:[0-9]*: Error: .*mwait.*
+.*:[0-9]*: Error: .*mwait.*
+.*:[0-9]*: Error: .*monitor.*
+.*:[0-9]*: Error: .*monitor.*
+.*:[0-9]*: Error: .*monitor.*
+.*:[0-9]*: Error: .*vmload.*
+.*:[0-9]*: Error: .*vmrun.*
+.*:[0-9]*: Error: .*vmsave.*
+.*:[0-9]*: Error: .*invlpga.*
+.*:[0-9]*: Error: .*invlpga.*
+.*:[0-9]*: Error: .*skinit.*
 .*:[0-9]*: Warning: .*r11.*rsi.*
 .*:[0-9]*: Warning: .*r11.*rdi.*
 .*:[0-9]*: Warning: .*r11.*rdi.*
@@ -219,17 +219,17 @@ 
 .*:[0-9]*: Warning: .*r11.*rdi.*
 .*:[0-9]*: Warning: .*r11.*rdi.*
 .*:[0-9]*: Warning: .*r11.*rsi.*
-.*:[0-9]*: Error: .*r11.* 1 .*mwait.*
-.*:[0-9]*: Error: .*r11.* 2 .*mwait.*
-.*:[0-9]*: Error: .*r11.* 1 .*monitor.*
-.*:[0-9]*: Error: .*r11.* 2 .*monitor.*
-.*:[0-9]*: Error: .*r11.* 3 .*monitor.*
-.*:[0-9]*: Error: .*r11.* 1 .*vmload.*
-.*:[0-9]*: Error: .*r11.* 1 .*vmrun.*
-.*:[0-9]*: Error: .*r11.* 1 .*vmsave.*
-.*:[0-9]*: Error: .*r11.* 1 .*invlpga.*
-.*:[0-9]*: Error: .*r11.* 2 .*invlpga.*
-.*:[0-9]*: Error: .*r11.* 1 .*skinit.*
+.*:[0-9]*: Error: .*mwait.*
+.*:[0-9]*: Error: .*mwait.*
+.*:[0-9]*: Error: .*monitor.*
+.*:[0-9]*: Error: .*monitor.*
+.*:[0-9]*: Error: .*monitor.*
+.*:[0-9]*: Error: .*vmload.*
+.*:[0-9]*: Error: .*vmrun.*
+.*:[0-9]*: Error: .*vmsave.*
+.*:[0-9]*: Error: .*invlpga.*
+.*:[0-9]*: Error: .*invlpga.*
+.*:[0-9]*: Error: .*skinit.*
 .*:[0-9]*: Warning: .*r12.*rsi.*
 .*:[0-9]*: Warning: .*r12.*rdi.*
 .*:[0-9]*: Warning: .*r12.*rdi.*
@@ -240,17 +240,17 @@ 
 .*:[0-9]*: Warning: .*r12.*rdi.*
 .*:[0-9]*: Warning: .*r12.*rdi.*
 .*:[0-9]*: Warning: .*r12.*rsi.*
-.*:[0-9]*: Error: .*r12.* 1 .*mwait.*
-.*:[0-9]*: Error: .*r12.* 2 .*mwait.*
-.*:[0-9]*: Error: .*r12.* 1 .*monitor.*
-.*:[0-9]*: Error: .*r12.* 2 .*monitor.*
-.*:[0-9]*: Error: .*r12.* 3 .*monitor.*
-.*:[0-9]*: Error: .*r12.* 1 .*vmload.*
-.*:[0-9]*: Error: .*r12.* 1 .*vmrun.*
-.*:[0-9]*: Error: .*r12.* 1 .*vmsave.*
-.*:[0-9]*: Error: .*r12.* 1 .*invlpga.*
-.*:[0-9]*: Error: .*r12.* 2 .*invlpga.*
-.*:[0-9]*: Error: .*r12.* 1 .*skinit.*
+.*:[0-9]*: Error: .*mwait.*
+.*:[0-9]*: Error: .*mwait.*
+.*:[0-9]*: Error: .*monitor.*
+.*:[0-9]*: Error: .*monitor.*
+.*:[0-9]*: Error: .*monitor.*
+.*:[0-9]*: Error: .*vmload.*
+.*:[0-9]*: Error: .*vmrun.*
+.*:[0-9]*: Error: .*vmsave.*
+.*:[0-9]*: Error: .*invlpga.*
+.*:[0-9]*: Error: .*invlpga.*
+.*:[0-9]*: Error: .*skinit.*
 .*:[0-9]*: Warning: .*r13.*rsi.*
 .*:[0-9]*: Warning: .*r13.*rdi.*
 .*:[0-9]*: Warning: .*r13.*rdi.*
@@ -261,17 +261,17 @@ 
 .*:[0-9]*: Warning: .*r13.*rdi.*
 .*:[0-9]*: Warning: .*r13.*rdi.*
 .*:[0-9]*: Warning: .*r13.*rsi.*
-.*:[0-9]*: Error: .*r13.* 1 .*mwait.*
-.*:[0-9]*: Error: .*r13.* 2 .*mwait.*
-.*:[0-9]*: Error: .*r13.* 1 .*monitor.*
-.*:[0-9]*: Error: .*r13.* 2 .*monitor.*
-.*:[0-9]*: Error: .*r13.* 3 .*monitor.*
-.*:[0-9]*: Error: .*r13.* 1 .*vmload.*
-.*:[0-9]*: Error: .*r13.* 1 .*vmrun.*
-.*:[0-9]*: Error: .*r13.* 1 .*vmsave.*
-.*:[0-9]*: Error: .*r13.* 1 .*invlpga.*
-.*:[0-9]*: Error: .*r13.* 2 .*invlpga.*
-.*:[0-9]*: Error: .*r13.* 1 .*skinit.*
+.*:[0-9]*: Error: .*mwait.*
+.*:[0-9]*: Error: .*mwait.*
+.*:[0-9]*: Error: .*monitor.*
+.*:[0-9]*: Error: .*monitor.*
+.*:[0-9]*: Error: .*monitor.*
+.*:[0-9]*: Error: .*vmload.*
+.*:[0-9]*: Error: .*vmrun.*
+.*:[0-9]*: Error: .*vmsave.*
+.*:[0-9]*: Error: .*invlpga.*
+.*:[0-9]*: Error: .*invlpga.*
+.*:[0-9]*: Error: .*skinit.*
 .*:[0-9]*: Warning: .*r14.*rsi.*
 .*:[0-9]*: Warning: .*r14.*rdi.*
 .*:[0-9]*: Warning: .*r14.*rdi.*
@@ -282,17 +282,17 @@ 
 .*:[0-9]*: Warning: .*r14.*rdi.*
 .*:[0-9]*: Warning: .*r14.*rdi.*
 .*:[0-9]*: Warning: .*r14.*rsi.*
-.*:[0-9]*: Error: .*r14.* 1 .*mwait.*
-.*:[0-9]*: Error: .*r14.* 2 .*mwait.*
-.*:[0-9]*: Error: .*r14.* 1 .*monitor.*
-.*:[0-9]*: Error: .*r14.* 2 .*monitor.*
-.*:[0-9]*: Error: .*r14.* 3 .*monitor.*
-.*:[0-9]*: Error: .*r14.* 1 .*vmload.*
-.*:[0-9]*: Error: .*r14.* 1 .*vmrun.*
-.*:[0-9]*: Error: .*r14.* 1 .*vmsave.*
-.*:[0-9]*: Error: .*r14.* 1 .*invlpga.*
-.*:[0-9]*: Error: .*r14.* 2 .*invlpga.*
-.*:[0-9]*: Error: .*r14.* 1 .*skinit.*
+.*:[0-9]*: Error: .*mwait.*
+.*:[0-9]*: Error: .*mwait.*
+.*:[0-9]*: Error: .*monitor.*
+.*:[0-9]*: Error: .*monitor.*
+.*:[0-9]*: Error: .*monitor.*
+.*:[0-9]*: Error: .*vmload.*
+.*:[0-9]*: Error: .*vmrun.*
+.*:[0-9]*: Error: .*vmsave.*
+.*:[0-9]*: Error: .*invlpga.*
+.*:[0-9]*: Error: .*invlpga.*
+.*:[0-9]*: Error: .*skinit.*
 .*:[0-9]*: Warning: .*r15.*rsi.*
 .*:[0-9]*: Warning: .*r15.*rdi.*
 .*:[0-9]*: Warning: .*r15.*rdi.*
@@ -303,17 +303,17 @@ 
 .*:[0-9]*: Warning: .*r15.*rdi.*
 .*:[0-9]*: Warning: .*r15.*rdi.*
 .*:[0-9]*: Warning: .*r15.*rsi.*
-.*:[0-9]*: Error: .*r15.* 1 .*mwait.*
-.*:[0-9]*: Error: .*r15.* 2 .*mwait.*
-.*:[0-9]*: Error: .*r15.* 1 .*monitor.*
-.*:[0-9]*: Error: .*r15.* 2 .*monitor.*
-.*:[0-9]*: Error: .*r15.* 3 .*monitor.*
-.*:[0-9]*: Error: .*r15.* 1 .*vmload.*
-.*:[0-9]*: Error: .*r15.* 1 .*vmrun.*
-.*:[0-9]*: Error: .*r15.* 1 .*vmsave.*
-.*:[0-9]*: Error: .*r15.* 1 .*invlpga.*
-.*:[0-9]*: Error: .*r15.* 2 .*invlpga.*
-.*:[0-9]*: Error: .*r15.* 1 .*skinit.*
+.*:[0-9]*: Error: .*mwait.*
+.*:[0-9]*: Error: .*mwait.*
+.*:[0-9]*: Error: .*monitor.*
+.*:[0-9]*: Error: .*monitor.*
+.*:[0-9]*: Error: .*monitor.*
+.*:[0-9]*: Error: .*vmload.*
+.*:[0-9]*: Error: .*vmrun.*
+.*:[0-9]*: Error: .*vmsave.*
+.*:[0-9]*: Error: .*invlpga.*
+.*:[0-9]*: Error: .*invlpga.*
+.*:[0-9]*: Error: .*skinit.*
 # xmm1
 .*:[0-9]*: Error: .*blendvpd.*
 .*:[0-9]*: Error: .*blendvps.*
--- a/gas/testsuite/gas/i386/x86-64-specific-reg.s
+++ b/gas/testsuite/gas/i386/x86-64-specific-reg.s
@@ -28,20 +28,15 @@  special:
 	monitor	%rax, %r\reg1, %rdx
 	monitor	%rax, %rcx, %r\reg1
 
-# FIXME: Need to ensure only "vmload %[re]ax" is accepted.
 	vmload	%r\reg1
 
-# FIXME: Need to ensure only "vmrun %[re]ax" is accepted.
 	vmrun	%r\reg1
 
-# FIXME: Need to ensure only "vmsave %[re]ax" is accepted.
 	vmsave	%r\reg1
 
-# FIXME: Need to ensure only "invlpga %[re]ax,%ecx" is accepted.
 	invlpga	%r\reg1, %ecx
 	invlpga	%rax, %e\reg1
 
-# FIXME: Need to ensure only "skinit %eax" is accepted.
 	skinit	%e\reg1
 .endr
 
--- a/opcodes/i386-gen.c
+++ b/opcodes/i386-gen.c
@@ -697,6 +697,7 @@  static const struct {
     INSTANCE (Accum),
     INSTANCE (RegC),
     INSTANCE (RegD),
+    INSTANCE (RegB),
 };
 
 #undef INSTANCE
--- a/opcodes/i386-opc.h
+++ b/opcodes/i386-opc.h
@@ -717,8 +717,9 @@  enum operand_instance
 {
   InstanceNone,
   Accum, /* Accumulator %al/%ax/%eax/%rax/%st(0)/%xmm0 */
-  RegC,  /* Register to hold shift count = %cl */
-  RegD,  /* Register to hold in/out port addr = %dx */
+  RegC,  /* %cl / %cx / %ecx / %rcx, e.g. register to hold shift count */
+  RegD,  /* %dl / %dx / %edx / %rdx, e.g. register to hold I/O port addr */
+  RegB,  /* %bl / %bx / %ebx / %rbx */
 };
 
 /* Position of operand_type bits.  */
--- a/opcodes/i386-opc.tbl
+++ b/opcodes/i386-opc.tbl
@@ -27,9 +27,13 @@ 
 #define Reg32 Class=Reg|Dword
 #define Reg64 Class=Reg|Qword
 
-#define Acc          Instance=Accum
-#define ShiftCount   Instance=RegC|Byte
-#define InOutPortReg Instance=RegD|Word
+#define Acc  Instance=Accum
+#define RegC Instance=RegC
+#define RegD Instance=RegD
+#define RegB Instance=RegB
+
+#define ShiftCount   RegC|Byte
+#define InOutPortReg RegD|Word
 
 #define FloatAcc Acc|Tbyte
 #define FloatReg Class=Reg|Tbyte
@@ -1547,11 +1551,10 @@  monitor, 0, 0xf01c8, None, 3, CpuSSE3, N
 // monitor is very special. CX and DX are always 32 bits. The
 // address size override prefix can be used to overrride the AX size in
 // all modes.
-// Need to ensure only "monitor %rax/%eax/%ax,%ecx,%edx" is accepted.
-monitor, 3, 0xf01, 0xc8, 2, CpuSSE3|CpuNo64, No_bSuf|No_wSuf|No_lSuf|No_sSuf|No_qSuf|No_ldSuf|ImmExt|AddrPrefixOpReg|NoAVX, { Reg16|Reg32, Reg32, Reg32 }
-monitor, 3, 0xf01, 0xc8, 2, CpuSSE3|Cpu64, No_bSuf|No_wSuf|No_lSuf|No_sSuf|No_qSuf|No_ldSuf|ImmExt|AddrPrefixOpReg|NoRex64|NoAVX, { Reg32|Reg64, Reg32, Reg32 }
+monitor, 3, 0xf01c8, None, 3, CpuSSE3|CpuNo64, No_bSuf|No_wSuf|No_lSuf|No_sSuf|No_qSuf|No_ldSuf|AddrPrefixOpReg|NoAVX, { Acc|Word|Dword, RegC|Dword, RegD|Dword }
+monitor, 3, 0xf01c8, None, 3, CpuSSE3|Cpu64, No_bSuf|No_wSuf|No_lSuf|No_sSuf|No_qSuf|No_ldSuf|AddrPrefixOpReg|NoRex64|NoAVX, { Acc|Dword|Qword, RegC|Dword, RegD|Dword }
 // The 64-bit form exists only for compatibility with older gas.
-monitor, 3, 0xf01, 0xc8, 2, CpuSSE3|Cpu64, No_bSuf|No_wSuf|No_lSuf|No_sSuf|No_qSuf|No_ldSuf|ImmExt|AddrPrefixOpReg|NoRex64|NoAVX, { Reg32|Reg64, Reg64, Reg64 }
+monitor, 3, 0xf01c8, None, 3, CpuSSE3|Cpu64, No_bSuf|No_wSuf|No_lSuf|No_sSuf|No_qSuf|No_ldSuf|AddrPrefixOpReg|NoRex64|NoAVX, { Acc|Dword|Qword, RegC|Qword, RegD|Qword }
 movddup, 2, 0xf212, None, 1, CpuAVX, Modrm|Vex|VexOpcode=0|VexW=1|IgnoreSize|No_bSuf|No_wSuf|No_lSuf|No_sSuf|No_qSuf|No_ldSuf|SSE2AVX, { Qword|Unspecified|BaseIndex|RegXMM, RegXMM }
 movddup, 2, 0xf20f12, None, 2, CpuSSE3, Modrm|IgnoreSize|No_bSuf|No_wSuf|No_lSuf|No_sSuf|No_qSuf|No_ldSuf, { Qword|Unspecified|BaseIndex|RegXMM, RegXMM }
 movshdup, 2, 0xf316, None, 1, CpuAVX, Modrm|Vex|VexOpcode=0|VexW=1|No_bSuf|No_wSuf|No_lSuf|No_sSuf|No_qSuf|No_ldSuf|SSE2AVX, { RegXMM|Unspecified|BaseIndex, RegXMM }
@@ -1560,9 +1563,8 @@  movsldup, 2, 0xf312, None, 1, CpuAVX, Mo
 movsldup, 2, 0xf30f12, None, 2, CpuSSE3, Modrm|No_bSuf|No_wSuf|No_lSuf|No_sSuf|No_qSuf|No_ldSuf, { RegXMM|Unspecified|BaseIndex, RegXMM }
 mwait, 0, 0xf01c9, None, 3, CpuSSE3, No_bSuf|No_wSuf|No_lSuf|No_sSuf|No_qSuf|No_ldSuf|NoAVX, { 0 }
 // mwait is very special. AX and CX are always 32 bits.
-// Need to ensure only "mwait %eax,%ecx" is accepted.
 // The 64-bit form exists only for compatibility with older gas.
-mwait, 2, 0xf01, 0xc9, 2, CpuSSE3, CheckRegSize|No_bSuf|No_wSuf|No_lSuf|No_sSuf|No_qSuf|No_ldSuf|ImmExt|NoRex64|NoAVX, { Reg32|Reg64, Reg32|Reg64 }
+mwait, 2, 0xf01c9, None, 3, CpuSSE3, CheckRegSize|No_bSuf|No_wSuf|No_lSuf|No_sSuf|No_qSuf|No_ldSuf|NoRex64|NoAVX, { Acc|Dword|Qword, RegC|Dword|Qword }
 
 // VMX instructions.
 
@@ -2806,17 +2808,21 @@  rdtscp, 0, 0xf01f9, None, 3, CpuRdtscp,
 // AMD Pacifica additions.
 clgi, 0, 0xf01dd, None, 3, CpuSVME, No_bSuf|No_wSuf|No_lSuf|No_sSuf|No_qSuf|No_ldSuf, { 0 }
 invlpga, 0, 0xf01df, None, 3, CpuSVME, No_bSuf|No_wSuf|No_lSuf|No_sSuf|No_qSuf|No_ldSuf, { 0 }
-invlpga, 2, 0xf01, 0xdf, 2, CpuSVME, No_bSuf|No_wSuf|No_lSuf|No_sSuf|No_qSuf|No_ldSuf|ImmExt|AddrPrefixOpReg|NoRex64, { Reg32|Reg64, Reg32 }
+invlpga, 2, 0xf01df, None, 3, CpuSVME|CpuNo64, No_bSuf|No_wSuf|No_lSuf|No_sSuf|No_qSuf|No_ldSuf|AddrPrefixOpReg, { Acc|Word|Dword, RegC|Dword }
+invlpga, 2, 0xf01df, None, 3, CpuSVME|Cpu64, No_bSuf|No_wSuf|No_lSuf|No_sSuf|No_qSuf|No_ldSuf|AddrPrefixOpReg|NoRex64, { Acc|Dword|Qword, RegC|Dword }
 skinit, 0, 0xf01de, None, 3, CpuSVME, No_bSuf|No_wSuf|No_lSuf|No_sSuf|No_qSuf|No_ldSuf, { 0 }
-skinit, 1, 0xf01, 0xde, 2, CpuSVME, No_bSuf|No_wSuf|No_lSuf|No_sSuf|No_qSuf|No_ldSuf|ImmExt, { Reg32 }
+skinit, 1, 0xf01de, None, 3, CpuSVME, No_bSuf|No_wSuf|No_lSuf|No_sSuf|No_qSuf|No_ldSuf, { Acc|Dword }
 stgi, 0, 0xf01dc, None, 3, CpuSVME, No_bSuf|No_wSuf|No_lSuf|No_sSuf|No_qSuf|No_ldSuf, { 0 }
 vmload, 0, 0xf01da, None, 3, CpuSVME, No_bSuf|No_wSuf|No_lSuf|No_sSuf|No_qSuf|No_ldSuf, { 0 }
-vmload, 1, 0xf01, 0xda, 2, CpuSVME, No_bSuf|No_wSuf|No_lSuf|No_sSuf|No_qSuf|No_ldSuf|ImmExt|AddrPrefixOpReg|NoRex64, { Reg32|Reg64 }
+vmload, 1, 0xf01da, None, 3, CpuSVME|CpuNo64, No_bSuf|No_wSuf|No_lSuf|No_sSuf|No_qSuf|No_ldSuf|AddrPrefixOpReg, { Acc|Word|Dword }
+vmload, 1, 0xf01da, None, 3, CpuSVME|Cpu64, No_bSuf|No_wSuf|No_lSuf|No_sSuf|No_qSuf|No_ldSuf|AddrPrefixOpReg|NoRex64, { Acc|Dword|Qword }
 vmmcall, 0, 0xf01d9, None, 3, CpuSVME, No_bSuf|No_wSuf|No_lSuf|No_sSuf|No_qSuf|No_ldSuf, { 0 }
 vmrun, 0, 0xf01d8, None, 3, CpuSVME, No_bSuf|No_wSuf|No_lSuf|No_sSuf|No_qSuf|No_ldSuf, { 0 }
-vmrun, 1, 0xf01, 0xd8, 2, CpuSVME, No_bSuf|No_wSuf|No_lSuf|No_sSuf|No_qSuf|No_ldSuf|ImmExt|AddrPrefixOpReg|NoRex64, { Reg32|Reg64 }
+vmrun, 1, 0xf01d8, None, 3, CpuSVME|CpuNo64, No_bSuf|No_wSuf|No_lSuf|No_sSuf|No_qSuf|No_ldSuf|AddrPrefixOpReg, { Acc|Word|Dword }
+vmrun, 1, 0xf01d8, None, 3, CpuSVME|Cpu64, No_bSuf|No_wSuf|No_lSuf|No_sSuf|No_qSuf|No_ldSuf|AddrPrefixOpReg|NoRex64, { Acc|Dword|Qword }
 vmsave, 0, 0xf01db, None, 3, CpuSVME, No_bSuf|No_wSuf|No_lSuf|No_sSuf|No_qSuf|No_ldSuf, { 0 }
-vmsave, 1, 0xf01, 0xdb, 2, CpuSVME, No_bSuf|No_wSuf|No_lSuf|No_sSuf|No_qSuf|No_ldSuf|ImmExt|AddrPrefixOpReg|NoRex64, { Reg32|Reg64 }
+vmsave, 1, 0xf01db, None, 3, CpuSVME|CpuNo64, No_bSuf|No_wSuf|No_lSuf|No_sSuf|No_qSuf|No_ldSuf|AddrPrefixOpReg, { Acc|Word|Dword }
+vmsave, 1, 0xf01db, None, 3, CpuSVME|Cpu64, No_bSuf|No_wSuf|No_lSuf|No_sSuf|No_qSuf|No_ldSuf|AddrPrefixOpReg|NoRex64, { Acc|Dword|Qword }
 
 
 // SSE4a instructions
@@ -4651,21 +4657,23 @@  vpclmulhqhqdq, 3, 0x6644, 0x11, 1, CpuVP
 // CLZERO instructions
 
 clzero, 0, 0xf01fc, None, 3, CpuCLZERO, No_bSuf|No_wSuf|No_lSuf|No_sSuf|No_qSuf|No_ldSuf, { 0 }
+clzero, 1, 0xf01fc, None, 3, CpuCLZERO|CpuNo64, No_bSuf|No_wSuf|No_lSuf|No_sSuf|No_qSuf|No_ldSuf|AddrPrefixOpReg, { Acc|Word|Dword }
+clzero, 1, 0xf01fc, None, 3, CpuCLZERO|Cpu64, No_bSuf|No_wSuf|No_lSuf|No_sSuf|No_qSuf|No_ldSuf|AddrPrefixOpReg|NoRex64, { Acc|Dword|Qword }
 
 // CLZERO instructions end
 
 // MONITORX/MWAITX instructions
+
 monitorx, 0, 0xf01fa, None, 3, CpuMWAITX, No_bSuf|No_wSuf|No_lSuf|No_sSuf|No_qSuf|No_ldSuf, { 0 }
-// Need to ensure only "monitorx %rax/%eax/%ax,%ecx,%edx" is accepted.
-monitorx, 3, 0xf01, 0xfa, 2, CpuMWAITX|CpuNo64, No_bSuf|No_wSuf|No_lSuf|No_sSuf|No_qSuf|No_ldSuf|ImmExt|AddrPrefixOpReg, { Reg16|Reg32, Reg32, Reg32 }
-monitorx, 3, 0xf01, 0xfa, 2, CpuMWAITX|Cpu64,   No_bSuf|No_wSuf|No_lSuf|No_sSuf|No_qSuf|No_ldSuf|ImmExt|AddrPrefixOpReg|NoRex64, { Reg32|Reg64, Reg32, Reg32 }
+monitorx, 3, 0xf01fa, None, 3, CpuMWAITX|CpuNo64, No_bSuf|No_wSuf|No_lSuf|No_sSuf|No_qSuf|No_ldSuf|AddrPrefixOpReg, { Acc|Word|Dword, RegC|Dword, RegD|Dword }
+monitorx, 3, 0xf01fa, None, 3, CpuMWAITX|Cpu64, No_bSuf|No_wSuf|No_lSuf|No_sSuf|No_qSuf|No_ldSuf|AddrPrefixOpReg|NoRex64, { Acc|Dword|Qword, RegC|Dword, RegD|Dword }
 // The 64-bit form exists only for compatibility with older gas.
-monitorx, 3, 0xf01, 0xfa, 2, CpuMWAITX|Cpu64,   No_bSuf|No_wSuf|No_lSuf|No_sSuf|No_qSuf|No_ldSuf|ImmExt|AddrPrefixOpReg|NoRex64, { Reg32|Reg64, Reg64, Reg64 }
+monitorx, 3, 0xf01fa, None, 3, CpuMWAITX|Cpu64, No_bSuf|No_wSuf|No_lSuf|No_sSuf|No_qSuf|No_ldSuf|AddrPrefixOpReg|NoRex64, { Acc|Dword|Qword, RegC|Qword, RegD|Qword }
 
 mwaitx, 0, 0xf01fb, None, 3, CpuMWAITX, No_bSuf|No_wSuf|No_lSuf|No_sSuf|No_qSuf|No_ldSuf, { 0 }
-// Need to ensure only "mwaitx %eax,%ecx,%ebx" is accepted.
 // The 64-bit form exists only for compatibility with older gas.
-mwaitx, 3, 0xf01, 0xfb, 2, CpuMWAITX, CheckRegSize|No_bSuf|No_wSuf|No_lSuf|No_sSuf|No_qSuf|No_ldSuf|ImmExt|NoRex64, { Reg32|Reg64, Reg32|Reg64, Reg32|Reg64 }
+mwaitx, 3, 0xf01fb, None, 3, CpuMWAITX, CheckRegSize|No_bSuf|No_wSuf|No_lSuf|No_sSuf|No_qSuf|No_ldSuf|NoRex64, { Acc|Dword|Qword, RegC|Dword|Qword, RegB|Dword|Qword }
+
 // MONITORX/MWAITX instructions end
 
 // OSPKE instructions.
--- a/opcodes/i386-reg.tbl
+++ b/opcodes/i386-reg.tbl
@@ -64,9 +64,9 @@  r14w, Class=Reg|Word, RegRex, 6, Dw2Inva
 r15w, Class=Reg|Word, RegRex, 7, Dw2Inval, Dw2Inval
 // 32 bit regs
 eax, Class=Reg|Instance=Accum|Dword|BaseIndex, 0, 0, 0, Dw2Inval
-ecx, Class=Reg|Dword|BaseIndex, 0, 1, 1, Dw2Inval
-edx, Class=Reg|Dword|BaseIndex, 0, 2, 2, Dw2Inval
-ebx, Class=Reg|Dword|BaseIndex, 0, 3, 3, Dw2Inval
+ecx, Class=Reg|Instance=RegC|Dword|BaseIndex, 0, 1, 1, Dw2Inval
+edx, Class=Reg|Instance=RegD|Dword|BaseIndex, 0, 2, 2, Dw2Inval
+ebx, Class=Reg|Instance=RegB|Dword|BaseIndex, 0, 3, 3, Dw2Inval
 esp, Class=Reg|Dword, 0, 4, 4, Dw2Inval
 ebp, Class=Reg|Dword|BaseIndex, 0, 5, 5, Dw2Inval
 esi, Class=Reg|Dword|BaseIndex, 0, 6, 6, Dw2Inval
@@ -80,9 +80,9 @@  r13d, Class=Reg|Dword|BaseIndex, RegRex,
 r14d, Class=Reg|Dword|BaseIndex, RegRex, 6, Dw2Inval, Dw2Inval
 r15d, Class=Reg|Dword|BaseIndex, RegRex, 7, Dw2Inval, Dw2Inval
 rax, Class=Reg|Instance=Accum|Qword|BaseIndex, 0, 0, Dw2Inval, 0
-rcx, Class=Reg|Qword|BaseIndex, 0, 1, Dw2Inval, 2
-rdx, Class=Reg|Qword|BaseIndex, 0, 2, Dw2Inval, 1
-rbx, Class=Reg|Qword|BaseIndex, 0, 3, Dw2Inval, 3
+rcx, Class=Reg|Instance=RegC|Qword|BaseIndex, 0, 1, Dw2Inval, 2
+rdx, Class=Reg|Instance=RegD|Qword|BaseIndex, 0, 2, Dw2Inval, 1
+rbx, Class=Reg|Instance=RegB|Qword|BaseIndex, 0, 3, Dw2Inval, 3
 rsp, Class=Reg|Qword, 0, 4, Dw2Inval, 7
 rbp, Class=Reg|Qword|BaseIndex, 0, 5, Dw2Inval, 6
 rsi, Class=Reg|Qword|BaseIndex, 0, 6, Dw2Inval, 4