[v2,2/9] x86: slightly rearrange struct insn_template

Message ID 46504780-0bf3-9f56-dc38-47cec5cff8fa@suse.com
State New
Headers show
Series
  • x86: operand size handling improvements
Related show

Commit Message

Jan Beulich Oct. 28, 2019, 8:03 a.m.
This avoids holes between the individual fields, (potentially) shrinking
the overall template table size by 4 bytes per entry.

opcodes/
2019-10-XX  Jan Beulich  <jbeulich@suse.com>

	* i386-gen.c (output_i386_opcode): Change order of fields
	emitted to output.
	* i386-opc.h (struct insn_template): Move operands field.
	Convert extension_opcode field to unsigned short.
	* i386-tbl.h: Re-generate.

---
v2: New.

Comments

H.J. Lu Oct. 29, 2019, 5:31 p.m. | #1
On Mon, Oct 28, 2019 at 1:03 AM Jan Beulich <jbeulich@suse.com> wrote:
>

> This avoids holes between the individual fields, (potentially) shrinking

> the overall template table size by 4 bytes per entry.

>

> opcodes/

> 2019-10-XX  Jan Beulich  <jbeulich@suse.com>

>

>         * i386-gen.c (output_i386_opcode): Change order of fields

>         emitted to output.

>         * i386-opc.h (struct insn_template): Move operands field.

>         Convert extension_opcode field to unsigned short.

>         * i386-tbl.h: Re-generate.


OK.

Thanks.

-- 
H.J.

Patch

--- a/opcodes/i386-gen.c
+++ b/opcodes/i386-gen.c
@@ -1294,8 +1294,7 @@  output_i386_opcode (FILE *table, const c
     }
 
   fprintf (table, "  { \"%s\", %s, %s, %s, %s,\n",
-	   name, operands, base_opcode, extension_opcode,
-	   opcode_length);
+	   name, base_opcode, extension_opcode, opcode_length, operands);
 
   process_i386_cpu_flag (table, cpu_flags, 0, ",", "    ", lineno);
 
--- a/opcodes/i386-opc.h
+++ b/opcodes/i386-opc.h
@@ -852,9 +852,6 @@  typedef struct insn_template
   /* instruction name sans width suffix ("mov" for movl insns) */
   char *name;
 
-  /* how many operands */
-  unsigned int operands;
-
   /* base_opcode is the fundamental opcode byte without optional
      prefix(es).  */
   unsigned int base_opcode;
@@ -871,12 +868,15 @@  typedef struct insn_template
      AMD 3DNow! instructions.
      If this template has no extension opcode (the usual case) use None
      Instructions */
-  unsigned int extension_opcode;
+  unsigned short extension_opcode;
 #define None 0xffff		/* If no extension_opcode is possible.  */
 
   /* Opcode length.  */
   unsigned char opcode_length;
 
+  /* how many operands */
+  unsigned char operands;
+
   /* cpu feature flags */
   i386_cpu_flags cpu_flags;