[wwwdocs] Update gcc-10/changes.html re Intel ISA (was: gcc-wwwdocs branch master updated. 63fbcfeaf27d9dd2083ccbd34bdff8fccb63949c)

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  • [wwwdocs] Update gcc-10/changes.html re Intel ISA (was: gcc-wwwdocs branch master updated. 63fbcfeaf27d9dd2083ccbd34bdff8fccb63949c)
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Commit Message

Gerald Pfeifer Oct. 20, 2019, 5:15 p.m.
On Fri, 11 Oct 2019, liuhongt@gcc.gnu.org wrote:
> commit 63fbcfeaf27d9dd2083ccbd34bdff8fccb63949c

> Author: liuhongt <hongtao.liu@intel.com>

> Date:   Fri Oct 11 14:27:47 2019 +0800

> 

>     Update gcc10 changes with new intel ISA.


I just applied this follow-up patch which adds markup.  Usually we
also refer to "command-line option" or similar, but I leave it up
to you whether you want to do this here.

Gerald

- Log -----------------------------------------------------------------
commit 403208f04a685071344227d54127664e6894ee0a
Author: Gerald Pfeifer <gerald@pfeifer.com>
Date:   Sun Oct 20 19:11:06 2019 +0200

    Properly mark up command-line options re the new Intel ISA.

Comments

Hongtao Liu Oct. 21, 2019, 2:42 a.m. | #1
On Mon, Oct 21, 2019 at 1:15 AM Gerald Pfeifer <gerald@pfeifer.com> wrote:
>

> On Fri, 11 Oct 2019, liuhongt@gcc.gnu.org wrote:

> > commit 63fbcfeaf27d9dd2083ccbd34bdff8fccb63949c

> > Author: liuhongt <hongtao.liu@intel.com>

> > Date:   Fri Oct 11 14:27:47 2019 +0800

> >

> >     Update gcc10 changes with new intel ISA.

>

> I just applied this follow-up patch which adds markup.  Usually we

> also refer to "command-line option" or similar, but I leave it up

> to you whether you want to do this here.

>

> Gerald

>

> - Log -----------------------------------------------------------------

> commit 403208f04a685071344227d54127664e6894ee0a

> Author: Gerald Pfeifer <gerald@pfeifer.com>

> Date:   Sun Oct 20 19:11:06 2019 +0200

>

>     Properly mark up command-line options re the new Intel ISA.

>

> diff --git a/htdocs/gcc-10/changes.html b/htdocs/gcc-10/changes.html

> index 478436d..7e7b666 100644

> --- a/htdocs/gcc-10/changes.html

> +++ b/htdocs/gcc-10/changes.html

> @@ -193,10 +193,12 @@ a work-in-progress.</p>

>    <li>Support to expand <code>__builtin_roundeven</code> into the appropriate

>      SSE 4.1 instruction has been added.

>    </li>

> -  <li>GCC now supports the Intel CPU named Cooperlake through -march=cooperlake.

> +  <li>GCC now supports the Intel CPU named Cooperlake through

> +    <code>-march=cooperlake</code>.

>      The switch enables the AVX512BF16 ISA extensions.

>    </li>

> -  <li>GCC now supports the Intel CPU named Tigerlake through -march=tigerlake.

> +  <li>GCC now supports the Intel CPU named Tigerlake through

> +    <code>-march=tigerlake</code>.

>      The switch enables the MOVDIRI MOVDIR64B AVX512VP2INTERSECT ISA extensions.

>    </li>

>  </ul>


Thanks, I will watch out for this next time.

-- 
BR,
Hongtao

Patch

diff --git a/htdocs/gcc-10/changes.html b/htdocs/gcc-10/changes.html
index 478436d..7e7b666 100644
--- a/htdocs/gcc-10/changes.html
+++ b/htdocs/gcc-10/changes.html
@@ -193,10 +193,12 @@  a work-in-progress.</p>
   <li>Support to expand <code>__builtin_roundeven</code> into the appropriate
     SSE 4.1 instruction has been added.
   </li>
-  <li>GCC now supports the Intel CPU named Cooperlake through -march=cooperlake.
+  <li>GCC now supports the Intel CPU named Cooperlake through
+    <code>-march=cooperlake</code>.
     The switch enables the AVX512BF16 ISA extensions.
   </li>
-  <li>GCC now supports the Intel CPU named Tigerlake through -march=tigerlake.
+  <li>GCC now supports the Intel CPU named Tigerlake through
+    <code>-march=tigerlake</code>.
     The switch enables the MOVDIRI MOVDIR64B AVX512VP2INTERSECT ISA extensions.
   </li>
 </ul>