patch to fix PR91102

Message ID 17bbebe2-944c-be19-cd15-4b0eb809d1e0@redhat.com
State New
Headers show
Series
  • patch to fix PR91102
Related show

Commit Message

Vladimir Makarov July 10, 2019, 4:14 p.m.
The following patch fixes

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=91102

   The patch was bootstrapped and tested on x86-64

Committed as rev. 273357

Patch

Index: ChangeLog
===================================================================
--- ChangeLog	(revision 273356)
+++ ChangeLog	(working copy)
@@ -1,3 +1,9 @@ 
+2019-07-10  Vladimir Makarov  <vmakarov@redhat.com>
+
+	PR target/91102
+	* lra-constraints.c (process_alt_operands): Don't match user
+	defined regs only if they are early clobbers.
+
 2019-07-10  Marc Glisse  <marc.glisse@inria.fr>
 
 	* wide-int.h (wi::lshift): Reject negative values for the fast path.
Index: lra-constraints.c
===================================================================
--- lra-constraints.c	(revision 273356)
+++ lra-constraints.c	(working copy)
@@ -2172,8 +2172,9 @@  process_alt_operands (int only_alternati
 		    else
 		      {
 			/* Operands don't match.  If the operands are
-			   different user defined explicit hard registers,
-			   then we cannot make them match.  */
+			   different user defined explicit hard
+			   registers, then we cannot make them match
+			   when one is early clobber operand.  */
 			if ((REG_P (*curr_id->operand_loc[nop])
 			     || SUBREG_P (*curr_id->operand_loc[nop]))
 			    && (REG_P (*curr_id->operand_loc[m])
@@ -2192,9 +2193,17 @@  process_alt_operands (int only_alternati
 				&& REG_P (m_reg)
 				&& HARD_REGISTER_P (m_reg)
 				&& REG_USERVAR_P (m_reg))
-			      break;
+			      {
+				int i;
+				
+				for (i = 0; i < early_clobbered_regs_num; i++)
+				  if (m == early_clobbered_nops[i])
+				    break;
+				if (i < early_clobbered_regs_num
+				    || early_clobber_p)
+				  break;
+			      }
 			  }
-
 			/* Both operands must allow a reload register,
 			   otherwise we cannot make them match.  */
 			if (curr_alt[m] == NO_REGS)
Index: testsuite/ChangeLog
===================================================================
--- testsuite/ChangeLog	(revision 273356)
+++ testsuite/ChangeLog	(working copy)
@@ -1,3 +1,8 @@ 
+2019-07-10  Vladimir Makarov  <vmakarov@redhat.com>
+
+	PR target/91102
+	* gcc.target/aarch64/pr91102.c: New test.
+
 2019-07-10  Richard Biener  <rguenther@suse.de>
 
 	PR tree-optimization/91126
Index: testsuite/gcc.target/aarch64/pr91102.c
===================================================================
--- testsuite/gcc.target/aarch64/pr91102.c	(nonexistent)
+++ testsuite/gcc.target/aarch64/pr91102.c	(working copy)
@@ -0,0 +1,26 @@ 
+/* PR target/91102 */
+/* { dg-do compile } */
+/* { dg-options "-O2" } */
+
+int
+foo (long d, long l)
+{
+  register long e asm ("x1") = d;
+  register long f asm("x2") = l;
+  asm ("" : : "r" (e), "r" (f));
+  return 3;
+}
+
+struct T { int i; int j; };
+union S { long h; struct T t; };
+
+void
+bar (union S b)
+{
+  while (1)
+    {
+      union S c = b;
+      c.t.j++;
+      b.h = foo (b.h, c.h);
+    }
+}