[02/11,arm] Fix ambiguous .md attribute uses

Message ID mpto928y0tw.fsf@arm.com
State New
Headers show
Series
  • Diagnose ambiguous .md attribute uses
Related show

Commit Message

Richard Sandiford July 5, 2019, 3:10 p.m.
This patch is part of a series that fixes ambiguous attribute
uses in .md files, i.e. cases in which attributes didn't use
<ITER:ATTR> to specify an iterator, and in which <ATTR> could
have different values depending on the iterator chosen.

I think this is a genuine bugfix for Thumb-1, since previously the
LDREX width was taken from the SImode success result rather than the
memory mode:

-#define HAVE_atomic_compare_and_swapt1qi_1 ((TARGET_HAVE_LDREX && TARGET_HAVE_MEMORY_BARRIER) && (TARGET_THUMB1))
-#define HAVE_atomic_compare_and_swapt1hi_1 ((TARGET_HAVE_LDREX && TARGET_HAVE_MEMORY_BARRIER) && (TARGET_THUMB1))
-#define HAVE_atomic_compare_and_swapt1di_1 ((TARGET_HAVE_LDREX && TARGET_HAVE_MEMORY_BARRIER) && (TARGET_THUMB1))
+#define HAVE_atomic_compare_and_swapt1qi_1 ((TARGET_HAVE_LDREXBH && TARGET_HAVE_MEMORY_BARRIER) && (TARGET_THUMB1))
+#define HAVE_atomic_compare_and_swapt1hi_1 ((TARGET_HAVE_LDREXBH && TARGET_HAVE_MEMORY_BARRIER) && (TARGET_THUMB1))
+#define HAVE_atomic_compare_and_swapt1di_1 ((TARGET_HAVE_LDREXD && ARM_DOUBLEWORD_ALIGN \
+       && TARGET_HAVE_MEMORY_BARRIER) && (TARGET_THUMB1))

The same goes for the predicate and constraints in
@atomic_compare_and_swapt1di_1, which previously used the
SI values from the success result.


2019-07-05  Richard Sandiford  <richard.sandiford@arm.com>

gcc/
	* config/arm/sync.md
	(@atomic_compare_and_swap<CCSI:arch><NARROW:mode>_1): Use
	<NARROW:sync_predtab> instead of (implicitly) <CCSI:sync_predtab>.
	(@atomic_compare_and_swap<CCSI:arch><SIDI:mode>_1): Likewise
	<SIDI:sync_predtab>.  Use <SIDI:cas_cmp_operand> and
	<SIDI:cas_cmp_str>.

Comments

Kyrill Tkachov July 5, 2019, 3:45 p.m. | #1
Hi Richard,

On 7/5/19 4:10 PM, Richard Sandiford wrote:
> This patch is part of a series that fixes ambiguous attribute

> uses in .md files, i.e. cases in which attributes didn't use

> <ITER:ATTR> to specify an iterator, and in which <ATTR> could

> have different values depending on the iterator chosen.

>

> I think this is a genuine bugfix for Thumb-1, since previously the

> LDREX width was taken from the SImode success result rather than the

> memory mode:

>

> -#define HAVE_atomic_compare_and_swapt1qi_1 ((TARGET_HAVE_LDREX && 

> TARGET_HAVE_MEMORY_BARRIER) && (TARGET_THUMB1))

> -#define HAVE_atomic_compare_and_swapt1hi_1 ((TARGET_HAVE_LDREX && 

> TARGET_HAVE_MEMORY_BARRIER) && (TARGET_THUMB1))

> -#define HAVE_atomic_compare_and_swapt1di_1 ((TARGET_HAVE_LDREX && 

> TARGET_HAVE_MEMORY_BARRIER) && (TARGET_THUMB1))

> +#define HAVE_atomic_compare_and_swapt1qi_1 ((TARGET_HAVE_LDREXBH && 

> TARGET_HAVE_MEMORY_BARRIER) && (TARGET_THUMB1))

> +#define HAVE_atomic_compare_and_swapt1hi_1 ((TARGET_HAVE_LDREXBH && 

> TARGET_HAVE_MEMORY_BARRIER) && (TARGET_THUMB1))

> +#define HAVE_atomic_compare_and_swapt1di_1 ((TARGET_HAVE_LDREXD && 

> ARM_DOUBLEWORD_ALIGN \

> +       && TARGET_HAVE_MEMORY_BARRIER) && (TARGET_THUMB1))

>

> The same goes for the predicate and constraints in

> @atomic_compare_and_swapt1di_1, which previously used the

> SI values from the success result.

>

>

Ok.

Thanks,

Kyrill

> 2019-07-05  Richard Sandiford <richard.sandiford@arm.com>

>

> gcc/

>         * config/arm/sync.md

> (@atomic_compare_and_swap<CCSI:arch><NARROW:mode>_1): Use

>         <NARROW:sync_predtab> instead of (implicitly) <CCSI:sync_predtab>.

> (@atomic_compare_and_swap<CCSI:arch><SIDI:mode>_1): Likewise

>         <SIDI:sync_predtab>.  Use <SIDI:cas_cmp_operand> and

>         <SIDI:cas_cmp_str>.

>

> Index: gcc/config/arm/sync.md

> ===================================================================

> --- gcc/config/arm/sync.md      2019-07-01 09:37:07.224524452 +0100

> +++ gcc/config/arm/sync.md      2019-07-05 15:05:09.088609956 +0100

> @@ -201,7 +201,7 @@ (define_insn_and_split "@atomic_compare_

>             (match_operand:SI 7 "const_int_operand")]             ;; mod_f

>            VUNSPEC_ATOMIC_CAS))

>     (clobber (match_scratch:SI 8 "=&r,X,X,X"))]

> -  "<sync_predtab>"

> +  "<NARROW:sync_predtab>"

>    "#"

>    "&& reload_completed"

>    [(const_int 0)]

> @@ -225,14 +225,14 @@ (define_insn_and_split "@atomic_compare_

>          (match_operand:SIDI 2 "mem_noofs_operand" 

> "+Ua,Ua,Ua,Ua"))      ;; memory

>     (set (match_dup 2)

>          (unspec_volatile:SIDI

> -         [(match_operand:SIDI 3 "<cas_cmp_operand>" 

> "<cas_cmp_str>,lIL*h,J,*r") ;; expect

> +         [(match_operand:SIDI 3 "<SIDI:cas_cmp_operand>" 

> "<SIDI:cas_cmp_str>,lIL*h,J,*r") ;; expect

>             (match_operand:SIDI 4 "s_register_operand" "r,r,r,r") ;; 

> desired

>             (match_operand:SI 5 "const_int_operand")              ;; 

> is_weak

>             (match_operand:SI 6 "const_int_operand")              ;; mod_s

>             (match_operand:SI 7 "const_int_operand")]             ;; mod_f

>            VUNSPEC_ATOMIC_CAS))

>     (clobber (match_scratch:SI 8 "=&r,X,X,X"))]

> -  "<sync_predtab>"

> +  "<SIDI:sync_predtab>"

>    "#"

>    "&& reload_completed"

>    [(const_int 0)]

Patch

Index: gcc/config/arm/sync.md
===================================================================
--- gcc/config/arm/sync.md	2019-07-01 09:37:07.224524452 +0100
+++ gcc/config/arm/sync.md	2019-07-05 15:05:09.088609956 +0100
@@ -201,7 +201,7 @@  (define_insn_and_split "@atomic_compare_
 	   (match_operand:SI 7 "const_int_operand")]		;; mod_f
 	  VUNSPEC_ATOMIC_CAS))
    (clobber (match_scratch:SI 8 "=&r,X,X,X"))]
-  "<sync_predtab>"
+  "<NARROW:sync_predtab>"
   "#"
   "&& reload_completed"
   [(const_int 0)]
@@ -225,14 +225,14 @@  (define_insn_and_split "@atomic_compare_
 	(match_operand:SIDI 2 "mem_noofs_operand" "+Ua,Ua,Ua,Ua"))	;; memory
    (set (match_dup 2)
 	(unspec_volatile:SIDI
-	  [(match_operand:SIDI 3 "<cas_cmp_operand>" "<cas_cmp_str>,lIL*h,J,*r") ;; expect
+	  [(match_operand:SIDI 3 "<SIDI:cas_cmp_operand>" "<SIDI:cas_cmp_str>,lIL*h,J,*r") ;; expect
 	   (match_operand:SIDI 4 "s_register_operand" "r,r,r,r")	;; desired
 	   (match_operand:SI 5 "const_int_operand")		;; is_weak
 	   (match_operand:SI 6 "const_int_operand")		;; mod_s
 	   (match_operand:SI 7 "const_int_operand")]		;; mod_f
 	  VUNSPEC_ATOMIC_CAS))
    (clobber (match_scratch:SI 8 "=&r,X,X,X"))]
-  "<sync_predtab>"
+  "<SIDI:sync_predtab>"
   "#"
   "&& reload_completed"
   [(const_int 0)]