x86: correct / adjust debug printing

Message ID 5D10F152020000780023AB5D@prv1-mh.provo.novell.com
State New
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Series
  • x86: correct / adjust debug printing
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Commit Message

Jan Beulich June 24, 2019, 3:50 p.m.
For quite some time we've been using combinations of bits for
specifying various registers in operands and templates. I think it was
Alan who had indicated that likely the debug printing would need
adjustment as a result. Here we go.

Accumulator handling for GPRs gets changed to match that for FPU regs.
For this to work, OPERAND_TYPE_ACC{32,64} get repurposed, with their
original uses replaced by direct checks of the two bits of interest,
which is cheaper than operand_type_equal() invocations.

For SIMD registers nothing similar appears to be needed, as respective
operands get stripped from the (copy of the) template before pt() is
reached.

The type change on pi() is to silence a compiler diagnostic. Arguably
its other parameter could also be const-qualified.

gas/
2019-06-24  Jan Beulich  <jbeulich@suse.com>

	* tc-i386.c (acc32, acc64): Delete.
	(pi): Make first parameter pinter-to-const.
	(type_names): Remove Acc. Add acc8, acc16, acc32, and acc64.
	(pt): Use operand_type_equal().
	(match_template): Replace use of acc32.
	(process_suffix): Replace use of acc64.

opcodes/
2019-06-24  Jan Beulich  <jbeulich@suse.com>

	* i386-gen.c (operand_type_init): Correct OPERAND_TYPE_DEBUG
	entry. Drop OPERAND_TYPE_ACC entry. Add OPERAND_TYPE_ACC8 and
	OPERAND_TYPE_ACC16 entries. Adjust OPERAND_TYPE_ACC32 and
	OPERAND_TYPE_ACC64 entries.
	* i386-init.h: Re-generate.

Comments

H.J. Lu June 24, 2019, 4:32 p.m. | #1
On Mon, Jun 24, 2019 at 8:50 AM Jan Beulich <JBeulich@suse.com> wrote:
>

> For quite some time we've been using combinations of bits for

> specifying various registers in operands and templates. I think it was

> Alan who had indicated that likely the debug printing would need

> adjustment as a result. Here we go.

>

> Accumulator handling for GPRs gets changed to match that for FPU regs.

> For this to work, OPERAND_TYPE_ACC{32,64} get repurposed, with their

> original uses replaced by direct checks of the two bits of interest,

> which is cheaper than operand_type_equal() invocations.

>

> For SIMD registers nothing similar appears to be needed, as respective

> operands get stripped from the (copy of the) template before pt() is

> reached.

>

> The type change on pi() is to silence a compiler diagnostic. Arguably

> its other parameter could also be const-qualified.

>

> gas/

> 2019-06-24  Jan Beulich  <jbeulich@suse.com>

>

>         * tc-i386.c (acc32, acc64): Delete.

>         (pi): Make first parameter pinter-to-const.

>         (type_names): Remove Acc. Add acc8, acc16, acc32, and acc64.

>         (pt): Use operand_type_equal().

>         (match_template): Replace use of acc32.

>         (process_suffix): Replace use of acc64.

>

> opcodes/

> 2019-06-24  Jan Beulich  <jbeulich@suse.com>

>

>         * i386-gen.c (operand_type_init): Correct OPERAND_TYPE_DEBUG

>         entry. Drop OPERAND_TYPE_ACC entry. Add OPERAND_TYPE_ACC8 and

>         OPERAND_TYPE_ACC16 entries. Adjust OPERAND_TYPE_ACC32 and

>         OPERAND_TYPE_ACC64 entries.

>         * i386-init.h: Re-generate.

>


OK.

Thanks.

-- 
H.J.

Patch

--- a/gas/config/tc-i386.c
+++ b/gas/config/tc-i386.c
@@ -1895,8 +1895,6 @@  operand_type_xor (i386_operand_type x, i
   return x;
 }
 
-static const i386_operand_type acc32 = OPERAND_TYPE_ACC32;
-static const i386_operand_type acc64 = OPERAND_TYPE_ACC64;
 static const i386_operand_type disp16 = OPERAND_TYPE_DISP16;
 static const i386_operand_type disp32 = OPERAND_TYPE_DISP32;
 static const i386_operand_type disp32s = OPERAND_TYPE_DISP32S;
@@ -3004,7 +3002,7 @@  static void pe (expressionS *);
 static void ps (symbolS *);
 
 static void
-pi (char *line, i386_insn *x)
+pi (const char *line, i386_insn *x)
 {
   unsigned int j;
 
@@ -3105,6 +3103,10 @@  const type_names[] =
   { OPERAND_TYPE_REG16, "r16" },
   { OPERAND_TYPE_REG32, "r32" },
   { OPERAND_TYPE_REG64, "r64" },
+  { OPERAND_TYPE_ACC8, "acc8" },
+  { OPERAND_TYPE_ACC16, "acc16" },
+  { OPERAND_TYPE_ACC32, "acc32" },
+  { OPERAND_TYPE_ACC64, "acc64" },
   { OPERAND_TYPE_IMM8, "i8" },
   { OPERAND_TYPE_IMM8, "i8s" },
   { OPERAND_TYPE_IMM16, "i16" },
@@ -3127,7 +3129,6 @@  const type_names[] =
   { OPERAND_TYPE_FLOATACC, "FAcc" },
   { OPERAND_TYPE_SREG2, "SReg2" },
   { OPERAND_TYPE_SREG3, "SReg3" },
-  { OPERAND_TYPE_ACC, "Acc" },
   { OPERAND_TYPE_JUMPABSOLUTE, "Jump Absolute" },
   { OPERAND_TYPE_REGMMX, "rMMX" },
   { OPERAND_TYPE_REGXMM, "rXMM" },
@@ -3146,7 +3147,7 @@  pt (i386_operand_type t)
   for (j = 0; j < ARRAY_SIZE (type_names); j++)
     {
       a = operand_type_and (t, type_names[j].mask);
-      if (!operand_type_all_zero (&a))
+      if (operand_type_equal (&a, &type_names[j].mask))
 	fprintf (stdout, "%s, ",  type_names[j].name);
     }
   fflush (stdout);
@@ -5814,8 +5815,8 @@  match_template (char mnem_suffix)
 	     zero-extend %eax to %rax.  */
 	  if (flag_code == CODE_64BIT
 	      && t->base_opcode == 0x90
-	      && operand_type_equal (&i.types [0], &acc32)
-	      && operand_type_equal (&i.types [1], &acc32))
+	      && i.types[0].bitfield.acc && i.types[0].bitfield.dword
+	      && i.types[1].bitfield.acc && i.types[1].bitfield.dword)
 	    continue;
 	  /* xrelease mov %eax, <disp> is another special case. It must not
 	     match the accumulator-only encoding of mov.  */
@@ -6409,8 +6410,8 @@  process_suffix (void)
 	  && ! (i.operands == 2
 		&& i.tm.base_opcode == 0x90
 		&& i.tm.extension_opcode == None
-		&& operand_type_equal (&i.types [0], &acc64)
-		&& operand_type_equal (&i.types [1], &acc64)))
+		&& i.types[0].bitfield.acc && i.types[0].bitfield.qword
+		&& i.types[1].bitfield.acc && i.types[1].bitfield.qword))
 	i.rex |= REX_W;
 
       break;
--- a/opcodes/i386-gen.c
+++ b/opcodes/i386-gen.c
@@ -435,7 +435,7 @@  static initializer operand_type_init[] =
   { "OPERAND_TYPE_TEST",
     "Test" },
   { "OPERAND_TYPE_DEBUG",
-    "FloatReg" },
+    "Debug" },
   { "OPERAND_TYPE_FLOATREG",
     "FloatReg" },
   { "OPERAND_TYPE_FLOATACC",
@@ -444,8 +444,6 @@  static initializer operand_type_init[] =
     "SReg2" },
   { "OPERAND_TYPE_SREG3",
     "SReg3" },
-  { "OPERAND_TYPE_ACC",
-    "Acc" },
   { "OPERAND_TYPE_JUMPABSOLUTE",
     "JumpAbsolute" },
   { "OPERAND_TYPE_REGMMX",
@@ -460,10 +458,14 @@  static initializer operand_type_init[] =
     "RegMask" },
   { "OPERAND_TYPE_ESSEG",
     "EsSeg" },
+  { "OPERAND_TYPE_ACC8",
+    "Acc|Byte" },
+  { "OPERAND_TYPE_ACC16",
+    "Acc|Word" },
   { "OPERAND_TYPE_ACC32",
-    "Reg32|Acc|Dword" },
+    "Acc|Dword" },
   { "OPERAND_TYPE_ACC64",
-    "Reg64|Acc|Qword" },
+    "Acc|Qword" },
   { "OPERAND_TYPE_DISP16_32",
     "Disp16|Disp32" },
   { "OPERAND_TYPE_ANYDISP",