x86: fold AVX scalar to/from int conversion insns

Message ID 5D10D9B7020000780023AAB4@prv1-mh.provo.novell.com
State New
Headers show
Series
  • x86: fold AVX scalar to/from int conversion insns
Related show

Commit Message

Jan Beulich June 24, 2019, 2:09 p.m.
There's no point doing a separate decode of the VEX.L bit - both decoded
forms are identical.

opcodes/
2019-06-24  Jan Beulich  <jbeulich@suse.com>

	* i386-dis.c (VEX_LEN_0F2A_P_1, VEX_LEN_0F2A_P_3,
	VEX_LEN_0F2C_P_1, VEX_LEN_0F2C_P_3, VEX_LEN_0F2D_P_1,
	VEX_LEN_0F2D_P_3): Delete.
	(vex_len_table): Move vcvtsi2ss, vcvtsi2sd, vcvttss2si,
	vcvttsd2si, vcvtss2si, and vcvtsd2si leaf entries ...
	(prefix_table): ... here.

---
Note that this goes on top of "x86: allow VEX et al encodings in 16-bit
(protected) mode".

Comments

H.J. Lu June 24, 2019, 4:31 p.m. | #1
On Mon, Jun 24, 2019 at 7:10 AM Jan Beulich <JBeulich@suse.com> wrote:
>

> There's no point doing a separate decode of the VEX.L bit - both decoded

> forms are identical.

>

> opcodes/

> 2019-06-24  Jan Beulich  <jbeulich@suse.com>

>

>         * i386-dis.c (VEX_LEN_0F2A_P_1, VEX_LEN_0F2A_P_3,

>         VEX_LEN_0F2C_P_1, VEX_LEN_0F2C_P_3, VEX_LEN_0F2D_P_1,

>         VEX_LEN_0F2D_P_3): Delete.

>         (vex_len_table): Move vcvtsi2ss, vcvtsi2sd, vcvttss2si,

>         vcvttsd2si, vcvtss2si, and vcvtsd2si leaf entries ...

>         (prefix_table): ... here.

>


OK.

Thanks.

-- 
H.J.

Patch

--- a/opcodes/i386-dis.c
+++ b/opcodes/i386-dis.c
@@ -1818,12 +1818,6 @@  enum
   VEX_LEN_0F16_P_0_M_1,
   VEX_LEN_0F16_P_2,
   VEX_LEN_0F17_M_0,
-  VEX_LEN_0F2A_P_1,
-  VEX_LEN_0F2A_P_3,
-  VEX_LEN_0F2C_P_1,
-  VEX_LEN_0F2C_P_3,
-  VEX_LEN_0F2D_P_1,
-  VEX_LEN_0F2D_P_3,
   VEX_LEN_0F41_P_0,
   VEX_LEN_0F41_P_2,
   VEX_LEN_0F42_P_0,
@@ -4696,25 +4690,25 @@  static const struct dis386 prefix_table[
   /* PREFIX_VEX_0F2A */
   {
     { Bad_Opcode },
-    { VEX_LEN_TABLE (VEX_LEN_0F2A_P_1) },
+    { "vcvtsi2ss%LQ",	{ XMScalar, VexScalar, Edq }, 0 },
     { Bad_Opcode },
-    { VEX_LEN_TABLE (VEX_LEN_0F2A_P_3) },
+    { "vcvtsi2sd%LQ",	{ XMScalar, VexScalar, Edq }, 0 },
   },
 
   /* PREFIX_VEX_0F2C */
   {
     { Bad_Opcode },
-    { VEX_LEN_TABLE (VEX_LEN_0F2C_P_1) },
+    { "vcvttss2si",	{ Gdq, EXdScalar }, 0 },
     { Bad_Opcode },
-    { VEX_LEN_TABLE (VEX_LEN_0F2C_P_3) },
+    { "vcvttsd2si",	{ Gdq, EXqScalar }, 0 },
   },
 
   /* PREFIX_VEX_0F2D */
   {
     { Bad_Opcode },
-    { VEX_LEN_TABLE (VEX_LEN_0F2D_P_1) },
+    { "vcvtss2si",	{ Gdq, EXdScalar }, 0 },
     { Bad_Opcode },
-    { VEX_LEN_TABLE (VEX_LEN_0F2D_P_3) },
+    { "vcvtsd2si",	{ Gdq, EXqScalar }, 0 },
   },
 
   /* PREFIX_VEX_0F2E */
@@ -9341,42 +9335,6 @@  static const struct dis386 vex_len_table
     { "vmovhpX",	{ EXq, XM }, 0 },
   },
 
-  /* VEX_LEN_0F2A_P_1 */
-  {
-    { "vcvtsi2ss%LQ",	{ XMScalar, VexScalar, Edq }, 0 },
-    { "vcvtsi2ss%LQ",	{ XMScalar, VexScalar, Edq }, 0 },
-  },
-
-  /* VEX_LEN_0F2A_P_3 */
-  {
-    { "vcvtsi2sd%LQ",	{ XMScalar, VexScalar, Edq }, 0 },
-    { "vcvtsi2sd%LQ",	{ XMScalar, VexScalar, Edq }, 0 },
-  },
-
-  /* VEX_LEN_0F2C_P_1 */
-  {
-    { "vcvttss2si",	{ Gdq, EXdScalar }, 0 },
-    { "vcvttss2si",	{ Gdq, EXdScalar }, 0 },
-  },
-
-  /* VEX_LEN_0F2C_P_3 */
-  {
-    { "vcvttsd2si",	{ Gdq, EXqScalar }, 0 },
-    { "vcvttsd2si",	{ Gdq, EXqScalar }, 0 },
-  },
-
-  /* VEX_LEN_0F2D_P_1 */
-  {
-    { "vcvtss2si",	{ Gdq, EXdScalar }, 0 },
-    { "vcvtss2si",	{ Gdq, EXdScalar }, 0 },
-  },
-
-  /* VEX_LEN_0F2D_P_3 */
-  {
-    { "vcvtsd2si",	{ Gdq, EXqScalar }, 0 },
-    { "vcvtsd2si",	{ Gdq, EXqScalar }, 0 },
-  },
-
   /* VEX_LEN_0F41_P_0 */
   {
     { Bad_Opcode },