x86: drop dqa_mode

Message ID 5D10D2A9020000780023AA5A@prv1-mh.provo.novell.com
State New
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Series
  • x86: drop dqa_mode
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Commit Message

Jan Beulich June 24, 2019, 1:39 p.m.
I assume this mode was needed when EVEX.W handling wasn't really correct
yet for other than 64-bit mode. It's clearly not needed anymore. Its
elimination also allows dropping the EVEX.W split of VCVT{,U}SI2SS. (For
the record, the dropped mode would have been wrong if used in any table
entry not already guaranteeing EVEX.W=1.)

opcodes/
2019-06-24  Jan Beulich  <jbeulich@suse.com>

	* i386-dis.c (Edqa, dqa_mode, EVEX_W_0F2A_P_1, EVEX_W_0F7B_P_1):
	Delete.
	(intel_operand_size, OP_E_register, OP_E_memory): Drop handling
	of dqa_mode.
	* i386-dis-evex-prefix.h: Move vcvtsi2ss and vcvtusi2ss leaf
	entries here.
	* i386-dis-evex-w.h: Drop EVEX_W_0F2A_P_1 and EVEX_W_0F7B_P_1
	entries. Use Edq for vcvtsi2sd and vcvtusi2sd.

Comments

H.J. Lu June 24, 2019, 4:20 p.m. | #1
On Mon, Jun 24, 2019 at 6:39 AM Jan Beulich <JBeulich@suse.com> wrote:
>

> I assume this mode was needed when EVEX.W handling wasn't really correct

> yet for other than 64-bit mode. It's clearly not needed anymore. Its

> elimination also allows dropping the EVEX.W split of VCVT{,U}SI2SS. (For

> the record, the dropped mode would have been wrong if used in any table

> entry not already guaranteeing EVEX.W=1.)

>

> opcodes/

> 2019-06-24  Jan Beulich  <jbeulich@suse.com>

>

>         * i386-dis.c (Edqa, dqa_mode, EVEX_W_0F2A_P_1, EVEX_W_0F7B_P_1):

>         Delete.

>         (intel_operand_size, OP_E_register, OP_E_memory): Drop handling

>         of dqa_mode.

>         * i386-dis-evex-prefix.h: Move vcvtsi2ss and vcvtusi2ss leaf

>         entries here.

>         * i386-dis-evex-w.h: Drop EVEX_W_0F2A_P_1 and EVEX_W_0F7B_P_1

>         entries. Use Edq for vcvtsi2sd and vcvtusi2sd.

>


OK.

Thanks.

-- 
H.J.

Patch

--- a/opcodes/i386-dis-evex-prefix.h
+++ b/opcodes/i386-dis-evex-prefix.h
@@ -64,7 +64,7 @@ 
   /* PREFIX_EVEX_0F2A */
   {
     { Bad_Opcode },
-    { VEX_W_TABLE (EVEX_W_0F2A_P_1) },
+    { "vcvtsi2ss%LQ",	{ XMScalar, VexScalar, EXxEVexR, Edq }, 0 },
     { Bad_Opcode },
     { VEX_W_TABLE (EVEX_W_0F2A_P_3) },
   },
@@ -404,7 +404,7 @@ 
   /* PREFIX_EVEX_0F7B */
   {
     { Bad_Opcode },
-    { VEX_W_TABLE (EVEX_W_0F7B_P_1) },
+    { "vcvtusi2ss%LQ",	{ XMScalar, VexScalar, EXxEVexR, Edq }, 0 },
     { VEX_W_TABLE (EVEX_W_0F7B_P_2) },
     { VEX_W_TABLE (EVEX_W_0F7B_P_3) },
   },
--- a/opcodes/i386-dis-evex-w.h
+++ b/opcodes/i386-dis-evex-w.h
@@ -145,15 +145,10 @@ 
     { Bad_Opcode },
     { "vmovapd",	{ EXxS, XM }, 0 },
   },
-  /* EVEX_W_0F2A_P_1 */
-  {
-    { "vcvtsi2ss%LQ",	{ XMScalar, VexScalar, EXxEVexR, Ed }, 0 },
-    { "vcvtsi2ss%LQ",	{ XMScalar, VexScalar, EXxEVexR, Edqa }, 0 },
-  },
   /* EVEX_W_0F2A_P_3 */
   {
     { "vcvtsi2sd%LQ",	{ XMScalar, VexScalar, Ed }, 0 },
-    { "vcvtsi2sd%LQ",	{ XMScalar, VexScalar, EXxEVexR64, Edqa }, 0 },
+    { "vcvtsi2sd%LQ",	{ XMScalar, VexScalar, EXxEVexR64, Edq }, 0 },
   },
   /* EVEX_W_0F2B_P_0 */
   {
@@ -477,11 +472,6 @@ 
     { "vcvtudq2ps",	{ XM, EXx, EXxEVexR }, 0 },
     { "vcvtuqq2ps%XY",	{ XMxmmq, EXx, EXxEVexR }, 0 },
   },
-  /* EVEX_W_0F7B_P_1 */
-  {
-    { "vcvtusi2ss%LQ",	{ XMScalar, VexScalar, EXxEVexR, Ed }, 0 },
-    { "vcvtusi2ss%LQ",	{ XMScalar, VexScalar, EXxEVexR, Edqa }, 0 },
-  },
   /* EVEX_W_0F7B_P_2 */
   {
     { "vcvtps2qq",	{ XM, EXEvexHalfBcstXmmq, EXxEVexR }, 0 },
@@ -490,7 +480,7 @@ 
   /* EVEX_W_0F7B_P_3 */
   {
     { "vcvtusi2sd%LQ",	{ XMScalar, VexScalar, Ed }, 0 },
-    { "vcvtusi2sd%LQ",	{ XMScalar, VexScalar, EXxEVexR64, Edqa }, 0 },
+    { "vcvtusi2sd%LQ",	{ XMScalar, VexScalar, EXxEVexR64, Edq }, 0 },
   },
   /* EVEX_W_0F7E_P_1 */
   {
--- a/opcodes/i386-dis.c
+++ b/opcodes/i386-dis.c
@@ -259,7 +259,6 @@  fetch_data (struct disassemble_info *inf
 #define Edb { OP_E, db_mode }
 #define Edw { OP_E, dw_mode }
 #define Edqd { OP_E, dqd_mode }
-#define Edqa { OP_E, dqa_mode }
 #define Eq { OP_E, q_mode }
 #define indirEv { OP_indirE, indir_v_mode }
 #define indirEp { OP_indirE, f_mode }
@@ -591,8 +590,6 @@  enum
   dw_mode,
   /* registers like dq_mode, memory like d_mode.  */
   dqd_mode,
-  /* operand size depends on the W bit as well as address mode.  */
-  dqa_mode,
   /* normal vex mode */
   vex_mode,
   /* 128bit vex mode */
@@ -2076,7 +2073,6 @@  enum
   EVEX_W_0F28_P_2,
   EVEX_W_0F29_P_0,
   EVEX_W_0F29_P_2,
-  EVEX_W_0F2A_P_1,
   EVEX_W_0F2A_P_3,
   EVEX_W_0F2B_P_0,
   EVEX_W_0F2B_P_2,
@@ -2149,7 +2145,6 @@  enum
   EVEX_W_0F7A_P_1,
   EVEX_W_0F7A_P_2,
   EVEX_W_0F7A_P_3,
-  EVEX_W_0F7B_P_1,
   EVEX_W_0F7B_P_2,
   EVEX_W_0F7B_P_3,
   EVEX_W_0F7E_P_1,
@@ -13522,7 +13517,6 @@  intel_operand_size (int bytemode, int si
     case q_swap_mode:
       oappend ("QWORD PTR ");
       break;
-    case dqa_mode:
     case m_mode:
       if (address_mode == mode_64bit)
 	oappend ("QWORD PTR ");
@@ -13881,7 +13875,6 @@  OP_E_register (int bytemode, int sizefla
     case dqb_mode:
     case dqd_mode:
     case dqw_mode:
-    case dqa_mode:
       USED_REX (REX_W);
       if (rex & REX_W)
 	names = names64;
@@ -14031,9 +14024,6 @@  OP_E_memory (int bytemode, int sizeflag)
 	case xmm_mb_mode:
 	  shift = 0;
 	  break;
-	case dqa_mode:
-	  shift = address_mode == mode_64bit ? 3 : 2;
-	  break;
 	default:
 	  abort ();
 	}