Add R_AARCH64_P32_MOVW_PREL_* ELF32 relocs

Message ID 69637a42-1944-906a-b0fe-00c1e2b3c396@arm.com
State New
Headers show
Series
  • Add R_AARCH64_P32_MOVW_PREL_* ELF32 relocs
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Commit Message

Szabolcs Nagy June 11, 2019, 9:53 a.m.
These ilp32 relocations were missing for some reason.

bfd/ChangeLog:

2019-06-11  Szabolcs Nagy  <szabolcs.nagy@arm.com>

	* elfnn-aarch64.c: Enable MOVW_PREL relocs for ELF32.

include/ChangeLog:

2019-06-11  Szabolcs Nagy  <szabolcs.nagy@arm.com>

	* elf/aarch64.h (R_AARCH64_P32_MOVW_PREL_G0): Define.
	(R_AARCH64_P32_MOVW_PREL_G0_NC): Define.
	(R_AARCH64_P32_MOVW_PREL_G1): Define.

ld/ChangeLog:

2019-06-11  Szabolcs Nagy  <szabolcs.nagy@arm.com>

	* testsuite/ld-aarch64/aarch64-elf.exp: Add emit-relocs-22 and -23.
	* testsuite/ld-aarch64/emit-relocs-22.d: New test.
	* testsuite/ld-aarch64/emit-relocs-22.s: New test.
	* testsuite/ld-aarch64/emit-relocs-23.d: New test.
	* testsuite/ld-aarch64/emit-relocs-23.s: New test.

Comments

Tamar Christina June 14, 2019, 10:35 a.m. | #1
Hi Szabolcs,

The patch looks OK to me but I'm not a maintainer so you still require approval to commit.

Cheers,
Tamar

> -----Original Message-----

> From: binutils-owner@sourceware.org <binutils-owner@sourceware.org>

> On Behalf Of Szabolcs Nagy

> Sent: Tuesday, June 11, 2019 10:54

> To: Binutils <binutils@sourceware.org>

> Cc: nd <nd@arm.com>

> Subject: [PATCH] Add R_AARCH64_P32_MOVW_PREL_* ELF32 relocs

> 

> These ilp32 relocations were missing for some reason.

> 

> bfd/ChangeLog:

> 

> 2019-06-11  Szabolcs Nagy  <szabolcs.nagy@arm.com>

> 

> 	* elfnn-aarch64.c: Enable MOVW_PREL relocs for ELF32.

> 

> include/ChangeLog:

> 

> 2019-06-11  Szabolcs Nagy  <szabolcs.nagy@arm.com>

> 

> 	* elf/aarch64.h (R_AARCH64_P32_MOVW_PREL_G0): Define.

> 	(R_AARCH64_P32_MOVW_PREL_G0_NC): Define.

> 	(R_AARCH64_P32_MOVW_PREL_G1): Define.

> 

> ld/ChangeLog:

> 

> 2019-06-11  Szabolcs Nagy  <szabolcs.nagy@arm.com>

> 

> 	* testsuite/ld-aarch64/aarch64-elf.exp: Add emit-relocs-22 and -23.

> 	* testsuite/ld-aarch64/emit-relocs-22.d: New test.

> 	* testsuite/ld-aarch64/emit-relocs-22.s: New test.

> 	* testsuite/ld-aarch64/emit-relocs-23.d: New test.

> 	* testsuite/ld-aarch64/emit-relocs-23.s: New test.
Nick Clifton June 14, 2019, 10:39 a.m. | #2
Hi Szabolcs,

> bfd/ChangeLog:

> 2019-06-11  Szabolcs Nagy  <szabolcs.nagy@arm.com>

> 

> 	* elfnn-aarch64.c: Enable MOVW_PREL relocs for ELF32.

> 

> include/ChangeLog:

> 2019-06-11  Szabolcs Nagy  <szabolcs.nagy@arm.com>

> 

> 	* elf/aarch64.h (R_AARCH64_P32_MOVW_PREL_G0): Define.

> 	(R_AARCH64_P32_MOVW_PREL_G0_NC): Define.

> 	(R_AARCH64_P32_MOVW_PREL_G1): Define.

> 

> ld/ChangeLog:

> 2019-06-11  Szabolcs Nagy  <szabolcs.nagy@arm.com>

> 

> 	* testsuite/ld-aarch64/aarch64-elf.exp: Add emit-relocs-22 and -23.

> 	* testsuite/ld-aarch64/emit-relocs-22.d: New test.

> 	* testsuite/ld-aarch64/emit-relocs-22.s: New test.

> 	* testsuite/ld-aarch64/emit-relocs-23.d: New test.

> 	* testsuite/ld-aarch64/emit-relocs-23.s: New test.


Approved - please apply.

Cheers
  Nick

Patch

diff --git a/bfd/elfnn-aarch64.c b/bfd/elfnn-aarch64.c
index 761e6b92b5..f23ae4d0b3 100644
--- a/bfd/elfnn-aarch64.c
+++ b/bfd/elfnn-aarch64.c
@@ -717,7 +717,7 @@  static reloc_howto_type elfNN_aarch64_howto_table[] =
      PC relative address inline.  */
 
   /* MOV[NZ]:   ((S+A-P) >>  0) & 0xffff */
-  HOWTO64 (AARCH64_R (MOVW_PREL_G0),	/* type */
+  HOWTO (AARCH64_R (MOVW_PREL_G0),	/* type */
 	 0,			/* rightshift */
 	 2,			/* size (0 = byte, 1 = short, 2 = long) */
 	 17,			/* bitsize */
@@ -732,7 +732,7 @@  static reloc_howto_type elfNN_aarch64_howto_table[] =
 	 TRUE),		/* pcrel_offset */
 
   /* MOVK:   ((S+A-P) >>  0) & 0xffff [no overflow check] */
-  HOWTO64 (AARCH64_R (MOVW_PREL_G0_NC),	/* type */
+  HOWTO (AARCH64_R (MOVW_PREL_G0_NC),	/* type */
 	 0,			/* rightshift */
 	 2,			/* size (0 = byte, 1 = short, 2 = long) */
 	 16,			/* bitsize */
@@ -747,7 +747,7 @@  static reloc_howto_type elfNN_aarch64_howto_table[] =
 	 TRUE),		/* pcrel_offset */
 
   /* MOV[NZ]:   ((S+A-P) >> 16) & 0xffff */
-  HOWTO64 (AARCH64_R (MOVW_PREL_G1),	/* type */
+  HOWTO (AARCH64_R (MOVW_PREL_G1),	/* type */
 	 16,			/* rightshift */
 	 2,			/* size (0 = byte, 1 = short, 2 = long) */
 	 17,			/* bitsize */
diff --git a/include/elf/aarch64.h b/include/elf/aarch64.h
index 721378abf8..16abd86423 100644
--- a/include/elf/aarch64.h
+++ b/include/elf/aarch64.h
@@ -128,6 +128,10 @@  RELOC_NUMBER (R_AARCH64_P32_JUMP26, 20)
 /* BL:     ((S+A-P) >> 2) & 0x3ffffff.  */
 RELOC_NUMBER (R_AARCH64_P32_CALL26, 21)
 
+/* Group relocations to create a 16 or 32 bit PC-relative offset inline.  */
+RELOC_NUMBER (R_AARCH64_P32_MOVW_PREL_G0, 22)
+RELOC_NUMBER (R_AARCH64_P32_MOVW_PREL_G0_NC, 23)
+RELOC_NUMBER (R_AARCH64_P32_MOVW_PREL_G1, 24)
 
 RELOC_NUMBER (R_AARCH64_P32_GOT_LD_PREL19, 25)
 RELOC_NUMBER (R_AARCH64_P32_ADR_GOT_PAGE, 26)
diff --git a/ld/testsuite/ld-aarch64/aarch64-elf.exp b/ld/testsuite/ld-aarch64/aarch64-elf.exp
index c1a94957aa..777a6e1b3a 100644
--- a/ld/testsuite/ld-aarch64/aarch64-elf.exp
+++ b/ld/testsuite/ld-aarch64/aarch64-elf.exp
@@ -96,6 +96,8 @@  run_dump_test "erratum843419-no-args"
 
 # Relocation Tests
 run_dump_test_lp64 "weak-undefined"
+run_dump_test "emit-relocs-22"
+run_dump_test "emit-relocs-23"
 run_dump_test "emit-relocs-28"
 run_dump_test "emit-relocs-86"
 run_dump_test "emit-relocs-86-overflow"
diff --git a/ld/testsuite/ld-aarch64/emit-relocs-22.d b/ld/testsuite/ld-aarch64/emit-relocs-22.d
new file mode 100644
index 0000000000..b1e69e06d7
--- /dev/null
+++ b/ld/testsuite/ld-aarch64/emit-relocs-22.d
@@ -0,0 +1,15 @@ 
+#source: emit-relocs-22.s
+#as: -mabi=ilp32
+#ld: -m [aarch64_choose_ilp32_emul] -T relocs-ilp32.ld --defsym foo1=0x12345 --defsym foo2=0x1234 -e0 --emit-relocs
+#objdump: -dr
+
+.*: +file format .*
+
+
+Disassembly of section \.text:
+
+.* <\.text>:
+ +10000:	528468ad 	mov	w13, #0x2345                	// #9029
+	+10000: R_AARCH64_P32_MOVW_PREL_G0	foo1
+ +10004:	129db9f1 	mov	w17, #0xffff1230            	// #-60880
+	+10004: R_AARCH64_P32_MOVW_PREL_G0	foo2
diff --git a/ld/testsuite/ld-aarch64/emit-relocs-22.s b/ld/testsuite/ld-aarch64/emit-relocs-22.s
new file mode 100644
index 0000000000..1b7870bd5c
--- /dev/null
+++ b/ld/testsuite/ld-aarch64/emit-relocs-22.s
@@ -0,0 +1,3 @@ 
+.text
+	movz w13, :prel_g0:foo1
+	movz w17, :prel_g0:foo2
diff --git a/ld/testsuite/ld-aarch64/emit-relocs-23.d b/ld/testsuite/ld-aarch64/emit-relocs-23.d
new file mode 100644
index 0000000000..abb939d48b
--- /dev/null
+++ b/ld/testsuite/ld-aarch64/emit-relocs-23.d
@@ -0,0 +1,15 @@ 
+#source: emit-relocs-23.s
+#as: -mabi=ilp32
+#ld: -m [aarch64_choose_ilp32_emul] -T relocs-ilp32.ld --defsym foo=0x12345678 -e0 --emit-relocs
+#objdump: -dr
+
+.*: +file format .*
+
+
+Disassembly of section \.text:
+
+.* <\.text>:
+ +10000:	728acf0d 	movk	w13, #0x5678
+	+10000: R_AARCH64_P32_MOVW_PREL_G0_NC	foo
+ +10004:	52a24671 	mov	w17, #0x12330000            	// #305332224
+	+10004: R_AARCH64_P32_MOVW_PREL_G1	foo
diff --git a/ld/testsuite/ld-aarch64/emit-relocs-23.s b/ld/testsuite/ld-aarch64/emit-relocs-23.s
new file mode 100644
index 0000000000..f9c5869337
--- /dev/null
+++ b/ld/testsuite/ld-aarch64/emit-relocs-23.s
@@ -0,0 +1,3 @@ 
+.text
+	movk w13, :prel_g0_nc:foo
+	movz w17, :prel_g1:foo