[10/12] rs6000: Add p9kf and p9tf isa values

Message ID 6e338bc3fdc4ce342292f3771c7bab2968024ebd.1559685816.git.segher@kernel.crashing.org
State New
Headers show
Series
  • rs6000: Another batch of constraint simplification
Related show

Commit Message

Segher Boessenkool June 4, 2019, 11:20 p.m.
This adds "p9kf" and "p9tf" isa values, to be used for instruction
alternatives where KFmode resp. TFmode is used.


2019-06-04  Segher Boessenkool  <segher@kernel.crashing.org>

	* config/rs6000/rs6000.md (define_attr "isa"): Add p9kf and p9tf.
	(define_attr "enabled"): Handle those new isa values.

---
 gcc/config/rs6000/rs6000.md | 10 +++++++++-
 1 file changed, 9 insertions(+), 1 deletion(-)

-- 
1.8.3.1

Patch

diff --git a/gcc/config/rs6000/rs6000.md b/gcc/config/rs6000/rs6000.md
index b8b246a..b1f3bc3 100644
--- a/gcc/config/rs6000/rs6000.md
+++ b/gcc/config/rs6000/rs6000.md
@@ -267,7 +267,7 @@  (define_attr "cpu"
   (const (symbol_ref "(enum attr_cpu) rs6000_tune")))
 
 ;; The ISA we implement.
-(define_attr "isa" "any,p5,p6,p7,p7v,p8v,p9v" (const_string "any"))
+(define_attr "isa" "any,p5,p6,p7,p7v,p8v,p9v,p9kf,p9tf" (const_string "any"))
 
 ;; Is this alternative enabled for the current CPU/ISA/etc.?
 (define_attr "enabled" ""
@@ -298,6 +298,14 @@  (define_attr "enabled" ""
      (and (eq_attr "isa" "p9v")
 	  (match_test "TARGET_P9_VECTOR"))
      (const_int 1)
+
+     (and (eq_attr "isa" "p9kf")
+	  (match_test "TARGET_FLOAT128_TYPE"))
+     (const_int 1)
+
+     (and (eq_attr "isa" "p9tf")
+	  (match_test "FLOAT128_VECTOR_P (TFmode)"))
+     (const_int 1)
     ] (const_int 0)))
 
 ;; If this instruction is microcoded on the CELL processor