rs6000: Infrastructure for future arch

Message ID 5e03aba4-9de1-2f65-9455-4851522cac3e@linux.ibm.com
State Superseded
Headers show
Series
  • rs6000: Infrastructure for future arch
Related show

Commit Message

Bill Schmidt May 22, 2019, 5:51 p.m.
Hi,

This patch introduces the infrastructure to support -mcpu=future, used for features
in a future architecture, as yet unnamed.

Bootstrapped and tested on powerpc64le-unknown-linux-gnu with no regressions.  Is
this okay for trunk?

Thanks,
Bill


Add infrastructure to support -mcpu=future to represent a future
architecture level, as yet unnamed.

[gcc]

2019-05-22  Bill Schmidt  <wschmidt@linux.ibm.com>
	    Michael Meissner  <meissner@linux.ibm.com>
	    Segher Boessenkool  <segher@kernel.crashing.org>

	* config.gcc: Add future cpu.
	* config.in (HAVE_AS_FUTURE): New #define.
	* config/rs6000/driver-rs6000.c (asm_names): Add future cpu.
	* config/rs6000/rs6000-cpus.def (ISA_FUTURE_MASKS_SERVER): New
	#define.
	(OTHER_P9_VECTOR_MASKS): Add OPTION_MASK_FUTURE.
	(POWERPC_MASKS): Add OPTION_MASK_FUTURE.
	(RS6000_CPU): New instantiation for future cpu.
	* config/rs6000/rs6000-opts.h (enum processor_type): Add
	PROCESSOR_FUTURE.
	* config/rs6000/rs6000-string.c (expand_compare_loop): Treat
	PROCESSOR_FUTURE like PROCESSOR_POWER9 for now.
	* config/rs6000/rs6000-tables.opt: Regenerate.
	* config/rs6000/rs6000.c (rs6000_option_override_internal): Treat
	PROCESSOR_FUTURE similarly to PROCESSOR_POWER9 for now.
	(rs6000_machine_from_flags): Handle future cpu.
	(rs6000_reassociation_width): Treat PROCESSOR_FUTURE like
	PROCESSOR_POWER9 for now.
	(rs6000_adjust_cost): Likewise.
	(rs6000_issue_rate): Likewise.
	(rs6000_opt_mask): Add entry for future.
	* config/rs6000/rs6000.h (ASM_CPU_SPEC): Add future cpu.
	(MASK_FUTURE): New #define.
	* config/rs6000/rs6000.md (define_attr "cpu"): Add future cpu.
	* config/rs6000/rs6000.opt (mfuture): New target option.
	* doc/invoke.texi (mcpu): Add future cpu.

[gcc/testsuite]

2019-05-22  Bill Schmidt  <wschmidt@linux.ibm.com>

	* gcc.target/powerpc/cpu-future.c: New test.

Comments

Segher Boessenkool May 22, 2019, 11:05 p.m. | #1
Hi Bill,

On Wed, May 22, 2019 at 12:51:50PM -0500, Bill Schmidt wrote:
> +/* Define if your assembler supports FUTURE instructions.  */

> +#ifndef USED_FOR_TARGET

> +#undef HAVE_AS_FUTURE

> +#endif


Let's not use that?  I removed HAVE_AS_* (for ISA version support) in
r264675:

"""
rs6000: Delete many HAVE_AS_* (PR87149)

This deletes most HAVE_AS_* that determine if the assembler supports
some ISA level (and also HAVE_AS_MFPGPR and HAVE_AS_DFP).

These are not useful: we will only generate an instruction that requires
some newer ISA if the user specifically asked for it (with -mcpu=, say).
If the assembler cannot handle that, it is fine if it gives an error.

They also hurt: it increases the number of possible situations that all
need handling and all need testing.  We do not handle all cases, and
obviously do not test all either.
"""

So, just generate FUTURE insns when the user asked for that, don't worry
about checking if the assembler can handle that -- the user will find out
soon enough if not, and on any normal install everything will work fine.

>  /* Flags that need to be turned off if -mno-power9-vector.  */

>  #define OTHER_P9_VECTOR_MASKS	(OPTION_MASK_FLOAT128_HW		\

> +				 | OPTION_MASK_FUTURE			\

>  				 | OPTION_MASK_P9_MINMAX)


Why this?

> @@ -134,7 +139,8 @@

>  				 | OPTION_MASK_RECIP_PRECISION		\

>  				 | OPTION_MASK_SOFT_FLOAT		\

>  				 | OPTION_MASK_STRICT_ALIGN_OPTIONAL	\

> -				 | OPTION_MASK_VSX)

> +				 | OPTION_MASK_VSX			\

> +				 | OPTION_MASK_FUTURE)


This list is alphabetic.  Well, was alphabetic :-)

> -RS6000_CPU ("powerpc64le", PROCESSOR_POWER8, MASK_POWERPC64 | ISA_2_7_MASKS_SERVER)

> +RS6000_CPU ("powerpc64le", PROCESSOR_POWER8, MASK_POWERPC64

> +	    | ISA_2_7_MASKS_SERVER)


Please don't reformat mixed with other (non-random) changes.

> -@samp{power9}, @samp{powerpc}, @samp{powerpc64}, @samp{powerpc64le},

> -@samp{rs64}, and @samp{native}.

> +@samp{power9}, @samp{future}, @samp{powerpc}, @samp{powerpc64},

> +@samp{powerpc64le}, @samp{rs64}, and @samp{native}.


Maybe *not* documenting this would be less confusing?

> diff --git a/gcc/testsuite/gcc.target/powerpc/cpu-future.c b/gcc/testsuite/gcc.target/powerpc/cpu-future.c

> new file mode 100644

> index 00000000000..b62d40341d1

> --- /dev/null

> +++ b/gcc/testsuite/gcc.target/powerpc/cpu-future.c

> @@ -0,0 +1,7 @@

> +/* { dg-do compile } */

> +/* { dg-options "-mcpu=future -O2" } */

> +/* { dg-skip-if "do not override -mcpu" { powerpc*-*-* } { "-mcpu=*" } { "-mcpu=future" } } */


Drop this last line, use -mdejagnu-cpu=future instead?


Segher
Bill Schmidt May 22, 2019, 11:56 p.m. | #2
On 5/22/19 6:05 PM, Segher Boessenkool wrote:
> Hi Bill,

>

> On Wed, May 22, 2019 at 12:51:50PM -0500, Bill Schmidt wrote:

>> +/* Define if your assembler supports FUTURE instructions.  */

>> +#ifndef USED_FOR_TARGET

>> +#undef HAVE_AS_FUTURE

>> +#endif

> Let's not use that?  I removed HAVE_AS_* (for ISA version support) in

> r264675:

Yep, agreed.  This was refactored from old patches prior to that.
>

> """

> rs6000: Delete many HAVE_AS_* (PR87149)

>

> This deletes most HAVE_AS_* that determine if the assembler supports

> some ISA level (and also HAVE_AS_MFPGPR and HAVE_AS_DFP).

>

> These are not useful: we will only generate an instruction that requires

> some newer ISA if the user specifically asked for it (with -mcpu=, say).

> If the assembler cannot handle that, it is fine if it gives an error.

>

> They also hurt: it increases the number of possible situations that all

> need handling and all need testing.  We do not handle all cases, and

> obviously do not test all either.

> """

>

> So, just generate FUTURE insns when the user asked for that, don't worry

> about checking if the assembler can handle that -- the user will find out

> soon enough if not, and on any normal install everything will work fine.

>

>>  /* Flags that need to be turned off if -mno-power9-vector.  */

>>  #define OTHER_P9_VECTOR_MASKS	(OPTION_MASK_FLOAT128_HW		\

>> +				 | OPTION_MASK_FUTURE			\

>>  				 | OPTION_MASK_P9_MINMAX)

> Why this?

I agree that this seems wrong.  Will remove.
>

>> @@ -134,7 +139,8 @@

>>  				 | OPTION_MASK_RECIP_PRECISION		\

>>  				 | OPTION_MASK_SOFT_FLOAT		\

>>  				 | OPTION_MASK_STRICT_ALIGN_OPTIONAL	\

>> -				 | OPTION_MASK_VSX)

>> +				 | OPTION_MASK_VSX			\

>> +				 | OPTION_MASK_FUTURE)

> This list is alphabetic.  Well, was alphabetic :-)

OK.
>

>> -RS6000_CPU ("powerpc64le", PROCESSOR_POWER8, MASK_POWERPC64 | ISA_2_7_MASKS_SERVER)

>> +RS6000_CPU ("powerpc64le", PROCESSOR_POWER8, MASK_POWERPC64

>> +	    | ISA_2_7_MASKS_SERVER)

> Please don't reformat mixed with other (non-random) changes.

OK.
>

>> -@samp{power9}, @samp{powerpc}, @samp{powerpc64}, @samp{powerpc64le},

>> -@samp{rs64}, and @samp{native}.

>> +@samp{power9}, @samp{future}, @samp{powerpc}, @samp{powerpc64},

>> +@samp{powerpc64le}, @samp{rs64}, and @samp{native}.

> Maybe *not* documenting this would be less confusing?

Well, this was refactored from your patch. ;-)

I disagree, simply because at some point this will be renamed, and
having the place-holder will ensure we don't forget to add the new
name.  So I'd like to keep this.
>

>> diff --git a/gcc/testsuite/gcc.target/powerpc/cpu-future.c b/gcc/testsuite/gcc.target/powerpc/cpu-future.c

>> new file mode 100644

>> index 00000000000..b62d40341d1

>> --- /dev/null

>> +++ b/gcc/testsuite/gcc.target/powerpc/cpu-future.c

>> @@ -0,0 +1,7 @@

>> +/* { dg-do compile } */

>> +/* { dg-options "-mcpu=future -O2" } */

>> +/* { dg-skip-if "do not override -mcpu" { powerpc*-*-* } { "-mcpu=*" } { "-mcpu=future" } } */

> Drop this last line, use -mdejagnu-cpu=future instead?

OK.

Thanks for the quick review!
Bill
>

>

> Segher

>
Alan Modra May 23, 2019, 1:54 a.m. | #3
On Wed, May 22, 2019 at 12:51:50PM -0500, Bill Schmidt wrote:
> 	* config/rs6000/rs6000.c (rs6000_option_override_internal): Treat

> 	PROCESSOR_FUTURE similarly to PROCESSOR_POWER9 for now.

> 	(rs6000_machine_from_flags): Handle future cpu.

> 	(rs6000_reassociation_width): Treat PROCESSOR_FUTURE like

> 	PROCESSOR_POWER9 for now.

> 	(rs6000_adjust_cost): Likewise.

> 	(rs6000_issue_rate): Likewise.


rs6000_register_move_cost needs similar tweaks.

-- 
Alan Modra
Australia Development Lab, IBM
Bill Schmidt May 23, 2019, 3:34 a.m. | #4
On 5/22/19 8:54 PM, Alan Modra wrote:
> On Wed, May 22, 2019 at 12:51:50PM -0500, Bill Schmidt wrote:

>> 	* config/rs6000/rs6000.c (rs6000_option_override_internal): Treat

>> 	PROCESSOR_FUTURE similarly to PROCESSOR_POWER9 for now.

>> 	(rs6000_machine_from_flags): Handle future cpu.

>> 	(rs6000_reassociation_width): Treat PROCESSOR_FUTURE like

>> 	PROCESSOR_POWER9 for now.

>> 	(rs6000_adjust_cost): Likewise.

>> 	(rs6000_issue_rate): Likewise.

> rs6000_register_move_cost needs similar tweaks.

>

Does it?  I don't believe the slow LR/CTR move applies.  However, the cost
for direct moves probably should be treated the same as POWER9, I think...
I will plan to make that change.

Thanks!
Bill

Patch

diff --git a/gcc/config.gcc b/gcc/config.gcc
index 76bb316942d..af5cd77f84c 100644
--- a/gcc/config.gcc
+++ b/gcc/config.gcc
@@ -506,7 +506,7 @@  powerpc*-*-*)
 	extra_headers="${extra_headers} ppu_intrinsics.h spu2vmx.h vec_types.h si2vmx.h"
 	extra_headers="${extra_headers} amo.h"
 	case x$with_cpu in
-	    xpowerpc64|xdefault64|x6[23]0|x970|xG5|xpower[3456789]|xpower6x|xrs64a|xcell|xa2|xe500mc64|xe5500|xe6500)
+	    xpowerpc64|xdefault64|x6[23]0|x970|xG5|xpower[3456789]|xpower6x|xrs64a|xcell|xa2|xe500mc64|xe5500|xe6500|xfuture)
 		cpu_is_64bit=yes
 		;;
 	esac
diff --git a/gcc/config.in b/gcc/config.in
index a718ceaf3da..c2f056710ba 100644
--- a/gcc/config.in
+++ b/gcc/config.in
@@ -358,6 +358,12 @@ 
 #endif
 
 
+/* Define if your assembler supports FUTURE instructions.  */
+#ifndef USED_FOR_TARGET
+#undef HAVE_AS_FUTURE
+#endif
+
+
 /* Define if your assembler supports explicit relocations. */
 #ifndef USED_FOR_TARGET
 #undef HAVE_AS_EXPLICIT_RELOCS
diff --git a/gcc/config/rs6000/driver-rs6000.c b/gcc/config/rs6000/driver-rs6000.c
index fde2a127ef1..cd6c889e368 100644
--- a/gcc/config/rs6000/driver-rs6000.c
+++ b/gcc/config/rs6000/driver-rs6000.c
@@ -457,6 +457,7 @@  static const struct asm_name asm_names[] = {
   { "630",	"-m620" },
   { "970",	"-m970" },
   { "G5",	"-m970" },
+  { "future",	"-mfuture" },
   { NULL,	"\
   %{mvsx: -mpwr6; \
     maltivec: -m970; \
@@ -520,6 +521,7 @@  static const struct asm_name asm_names[] = {
   { "e5500",	"-me5500" },
   { "e6500",	"-me6500" },
   { "titan",	"-mtitan" },
+  { "future",	"-mfuture" },
   { NULL,	"\
 %{mpower9-vector: -mpower9; \
   mpower8-vector|mcrypto|mdirect-move|mhtm: -mpower8; \
diff --git a/gcc/config/rs6000/rs6000-cpus.def b/gcc/config/rs6000/rs6000-cpus.def
index d0d69beafd4..f32da25930d 100644
--- a/gcc/config/rs6000/rs6000-cpus.def
+++ b/gcc/config/rs6000/rs6000-cpus.def
@@ -72,8 +72,13 @@ 
 				 | OPTION_MASK_P9_VECTOR		\
 				 | OPTION_MASK_DIRECT_MOVE)
 
+/* Support for a future processor's features.  */
+#define ISA_FUTURE_MASKS_SERVER	(ISA_3_0_MASKS_SERVER			\
+				 | OPTION_MASK_FUTURE)
+
 /* Flags that need to be turned off if -mno-power9-vector.  */
 #define OTHER_P9_VECTOR_MASKS	(OPTION_MASK_FLOAT128_HW		\
+				 | OPTION_MASK_FUTURE			\
 				 | OPTION_MASK_P9_MINMAX)
 
 /* Flags that need to be turned off if -mno-power8-vector.  */
@@ -134,7 +139,8 @@ 
 				 | OPTION_MASK_RECIP_PRECISION		\
 				 | OPTION_MASK_SOFT_FLOAT		\
 				 | OPTION_MASK_STRICT_ALIGN_OPTIONAL	\
-				 | OPTION_MASK_VSX)
+				 | OPTION_MASK_VSX			\
+				 | OPTION_MASK_FUTURE)
 
 #endif
 
@@ -225,5 +231,8 @@  RS6000_CPU ("power8", PROCESSOR_POWER8, MASK_POWERPC64 | ISA_2_7_MASKS_SERVER)
 RS6000_CPU ("power9", PROCESSOR_POWER9, MASK_POWERPC64 | ISA_3_0_MASKS_SERVER)
 RS6000_CPU ("powerpc", PROCESSOR_POWERPC, 0)
 RS6000_CPU ("powerpc64", PROCESSOR_POWERPC64, MASK_PPC_GFXOPT | MASK_POWERPC64)
-RS6000_CPU ("powerpc64le", PROCESSOR_POWER8, MASK_POWERPC64 | ISA_2_7_MASKS_SERVER)
+RS6000_CPU ("powerpc64le", PROCESSOR_POWER8, MASK_POWERPC64
+	    | ISA_2_7_MASKS_SERVER)
 RS6000_CPU ("rs64", PROCESSOR_RS64A, MASK_PPC_GFXOPT | MASK_POWERPC64)
+RS6000_CPU ("future", PROCESSOR_FUTURE, MASK_POWERPC64
+	    | ISA_FUTURE_MASKS_SERVER)
diff --git a/gcc/config/rs6000/rs6000-opts.h b/gcc/config/rs6000/rs6000-opts.h
index 6adbf80b334..ae877bc550c 100644
--- a/gcc/config/rs6000/rs6000-opts.h
+++ b/gcc/config/rs6000/rs6000-opts.h
@@ -62,6 +62,8 @@  enum processor_type
    PROCESSOR_POWER8,
    PROCESSOR_POWER9,
 
+   PROCESSOR_FUTURE,
+
    PROCESSOR_RS64A,
    PROCESSOR_MPCCORE,
    PROCESSOR_CELL,
diff --git a/gcc/config/rs6000/rs6000-string.c b/gcc/config/rs6000/rs6000-string.c
index 560ecbaccc7..b9391855e16 100644
--- a/gcc/config/rs6000/rs6000-string.c
+++ b/gcc/config/rs6000/rs6000-string.c
@@ -963,6 +963,7 @@  expand_compare_loop (rtx operands[])
 	  max_bytes = 64;
       break;
     case PROCESSOR_POWER9:
+    case PROCESSOR_FUTURE:
       if (bytes_is_const)
 	max_bytes = 191;
       else
diff --git a/gcc/config/rs6000/rs6000-tables.opt b/gcc/config/rs6000/rs6000-tables.opt
index fa2e66bfdb7..911ed0923b9 100644
--- a/gcc/config/rs6000/rs6000-tables.opt
+++ b/gcc/config/rs6000/rs6000-tables.opt
@@ -194,3 +194,6 @@  Enum(rs6000_cpu_opt_value) String(powerpc64le) Value(54)
 EnumValue
 Enum(rs6000_cpu_opt_value) String(rs64) Value(55)
 
+EnumValue
+Enum(rs6000_cpu_opt_value) String(future) Value(56)
+
diff --git a/gcc/config/rs6000/rs6000.c b/gcc/config/rs6000/rs6000.c
index d08ba6c2d01..57c9eae8208 100644
--- a/gcc/config/rs6000/rs6000.c
+++ b/gcc/config/rs6000/rs6000.c
@@ -4436,6 +4436,7 @@  rs6000_option_override_internal (bool global_init_p)
 			&& rs6000_tune != PROCESSOR_POWER7
 			&& rs6000_tune != PROCESSOR_POWER8
 			&& rs6000_tune != PROCESSOR_POWER9
+			&& rs6000_tune != PROCESSOR_FUTURE
 			&& rs6000_tune != PROCESSOR_PPCA2
 			&& rs6000_tune != PROCESSOR_CELL
 			&& rs6000_tune != PROCESSOR_PPC476);
@@ -4449,6 +4450,7 @@  rs6000_option_override_internal (bool global_init_p)
 				 || rs6000_tune == PROCESSOR_POWER7
 				 || rs6000_tune == PROCESSOR_POWER8
 				 || rs6000_tune == PROCESSOR_POWER9
+				 || rs6000_tune == PROCESSOR_FUTURE
 				 || rs6000_tune == PROCESSOR_PPCE500MC
 				 || rs6000_tune == PROCESSOR_PPCE500MC64
 				 || rs6000_tune == PROCESSOR_PPCE5500
@@ -4749,6 +4751,7 @@  rs6000_option_override_internal (bool global_init_p)
 	break;
 
       case PROCESSOR_POWER9:
+      case PROCESSOR_FUTURE:
 	rs6000_cost = &power9_cost;
 	break;
 
@@ -5638,6 +5641,9 @@  static const char *rs6000_machine;
 static const char *
 rs6000_machine_from_flags (void)
 {
+  if ((rs6000_isa_flags & (ISA_FUTURE_MASKS_SERVER & ~ISA_3_0_MASKS_SERVER))
+      != 0)
+    return "future";
   if ((rs6000_isa_flags & (ISA_3_0_MASKS_SERVER & ~ISA_2_7_MASKS_SERVER)) != 0)
     return "power9";
   if ((rs6000_isa_flags & (ISA_2_7_MASKS_SERVER & ~ISA_2_6_MASKS_SERVER)) != 0)
@@ -9109,6 +9115,7 @@  rs6000_reassociation_width (unsigned int opc ATTRIBUTE_UNUSED,
     {
     case PROCESSOR_POWER8:
     case PROCESSOR_POWER9:
+    case PROCESSOR_FUTURE:
       if (DECIMAL_FLOAT_MODE_P (mode))
 	return 1;
       if (VECTOR_MODE_P (mode))
@@ -30183,7 +30190,8 @@  rs6000_adjust_cost (rtx_insn *insn, int dep_type, rtx_insn *dep_insn, int cost,
 	   some cycles later.  */
 
 	/* Separate a load from a narrower, dependent store.  */
-	if ((rs6000_sched_groups || rs6000_tune == PROCESSOR_POWER9)
+	if ((rs6000_sched_groups || rs6000_tune == PROCESSOR_POWER9
+	     || rs6000_tune == PROCESSOR_FUTURE)
 	    && GET_CODE (PATTERN (insn)) == SET
 	    && GET_CODE (PATTERN (dep_insn)) == SET
 	    && MEM_P (XEXP (PATTERN (insn), 1))
@@ -30221,6 +30229,7 @@  rs6000_adjust_cost (rtx_insn *insn, int dep_type, rtx_insn *dep_insn, int cost,
 		 || rs6000_tune == PROCESSOR_POWER7
 		 || rs6000_tune == PROCESSOR_POWER8
 		 || rs6000_tune == PROCESSOR_POWER9
+		 || rs6000_tune == PROCESSOR_FUTURE
                  || rs6000_tune == PROCESSOR_CELL)
                 && recog_memoized (dep_insn)
                 && (INSN_CODE (dep_insn) >= 0))
@@ -30800,6 +30809,7 @@  rs6000_issue_rate (void)
   case PROCESSOR_POWER8:
     return 7;
   case PROCESSOR_POWER9:
+  case PROCESSOR_FUTURE:
     return 6;
   default:
     return 1;
@@ -36254,6 +36264,7 @@  static struct rs6000_opt_mask const rs6000_opt_masks[] =
   { "float128",			OPTION_MASK_FLOAT128_KEYWORD,	false, true  },
   { "float128-hardware",	OPTION_MASK_FLOAT128_HW,	false, true  },
   { "fprnd",			OPTION_MASK_FPRND,		false, true  },
+  { "future",			OPTION_MASK_FUTURE,		false, true  },
   { "hard-dfp",			OPTION_MASK_DFP,		false, true  },
   { "htm",			OPTION_MASK_HTM,		false, true  },
   { "isel",			OPTION_MASK_ISEL,		false, true  },
diff --git a/gcc/config/rs6000/rs6000.h b/gcc/config/rs6000/rs6000.h
index 98a15854b42..335d75ae85f 100644
--- a/gcc/config/rs6000/rs6000.h
+++ b/gcc/config/rs6000/rs6000.h
@@ -138,6 +138,7 @@ 
   mcpu=e5500: -me5500; \
   mcpu=e6500: -me6500; \
   mcpu=titan: -mtitan; \
+  mcpu=future: -mfuture; \
   !mcpu*: %{mpower9-vector: -mpower9; \
 	    mpower8-vector|mcrypto|mdirect-move|mhtm: -mpower8; \
 	    mvsx: -mpower7; \
@@ -524,6 +525,7 @@  extern int rs6000_vector_align[];
 #define MASK_STRICT_ALIGN		OPTION_MASK_STRICT_ALIGN
 #define MASK_UPDATE			OPTION_MASK_UPDATE
 #define MASK_VSX			OPTION_MASK_VSX
+#define MASK_FUTURE			OPTION_MASK_FUTURE
 
 #ifndef IN_LIBGCC2
 #define MASK_POWERPC64			OPTION_MASK_POWERPC64
diff --git a/gcc/config/rs6000/rs6000.md b/gcc/config/rs6000/rs6000.md
index 32c41f37127..71613e21384 100644
--- a/gcc/config/rs6000/rs6000.md
+++ b/gcc/config/rs6000/rs6000.md
@@ -261,7 +261,7 @@ 
    ppc750,ppc7400,ppc7450,
    ppc403,ppc405,ppc440,ppc476,
    ppc8540,ppc8548,ppce300c2,ppce300c3,ppce500mc,ppce500mc64,ppce5500,ppce6500,
-   power4,power5,power6,power7,power8,power9,
+   power4,power5,power6,power7,power8,power9,future,
    rs64a,mpccore,cell,ppca2,titan"
   (const (symbol_ref "(enum attr_cpu) rs6000_tune")))
 
diff --git a/gcc/config/rs6000/rs6000.opt b/gcc/config/rs6000/rs6000.opt
index f4b5c91e11f..196e75d7009 100644
--- a/gcc/config/rs6000/rs6000.opt
+++ b/gcc/config/rs6000/rs6000.opt
@@ -569,3 +569,7 @@  long rs6000_stack_protector_guard_offset = 0
 ;; branches via the CTR.
 mspeculate-indirect-jumps
 Target Undocumented Var(rs6000_speculate_indirect_jumps) Init(1) Save
+
+mfuture
+Target Report Mask(FUTURE) Var(rs6000_isa_flags)
+Use instructions for a future architecture.
diff --git a/gcc/doc/invoke.texi b/gcc/doc/invoke.texi
index 5e3e8873d35..fbbc4f829b7 100644
--- a/gcc/doc/invoke.texi
+++ b/gcc/doc/invoke.texi
@@ -24077,8 +24077,8 @@  Supported values for @var{cpu_type} are @samp{401}, @samp{403},
 @samp{e6500}, @samp{ec603e}, @samp{G3}, @samp{G4}, @samp{G5},
 @samp{titan}, @samp{power3}, @samp{power4}, @samp{power5}, @samp{power5+},
 @samp{power6}, @samp{power6x}, @samp{power7}, @samp{power8},
-@samp{power9}, @samp{powerpc}, @samp{powerpc64}, @samp{powerpc64le},
-@samp{rs64}, and @samp{native}.
+@samp{power9}, @samp{future}, @samp{powerpc}, @samp{powerpc64},
+@samp{powerpc64le}, @samp{rs64}, and @samp{native}.
 
 @option{-mcpu=powerpc}, @option{-mcpu=powerpc64}, and
 @option{-mcpu=powerpc64le} specify pure 32-bit PowerPC (either
diff --git a/gcc/testsuite/gcc.target/powerpc/cpu-future.c b/gcc/testsuite/gcc.target/powerpc/cpu-future.c
new file mode 100644
index 00000000000..b62d40341d1
--- /dev/null
+++ b/gcc/testsuite/gcc.target/powerpc/cpu-future.c
@@ -0,0 +1,7 @@ 
+/* { dg-do compile } */
+/* { dg-options "-mcpu=future -O2" } */
+/* { dg-skip-if "do not override -mcpu" { powerpc*-*-* } { "-mcpu=*" } { "-mcpu=future" } } */
+
+/* Ensure -mcpu=future compiles cleanly.  */
+
+void x (void) { }