Fix PR90502

Message ID alpine.LSU.2.20.1905161111110.10704@zhemvz.fhfr.qr
State New
Headers show
Series
  • Fix PR90502
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Commit Message

Richard Biener May 16, 2019, 9:12 a.m.
I forgot to update a testcase.

Committed.

Richard.

2019-05-16  Richard Biener  <rguenther@suse.de>

	PR testsuite/90502
	* gcc.dg/tree-ssa/vector-6.c: Adjust for half of the
	transforms happening earlier now.

Patch

Index: gcc/testsuite/gcc.dg/tree-ssa/vector-6.c
===================================================================
--- gcc/testsuite/gcc.dg/tree-ssa/vector-6.c	(revision 271280)
+++ gcc/testsuite/gcc.dg/tree-ssa/vector-6.c	(working copy)
@@ -1,5 +1,5 @@ 
 /* { dg-do compile } */
-/* { dg-options "-O -fdump-tree-ccp1 -Wno-psabi -w" } */
+/* { dg-options "-O -fdump-tree-ssa -fdump-tree-ccp1 -Wno-psabi -w" } */
 /* { dg-additional-options "-msse2" { target i?86-*-* x86_64-*-* } } */
 /* { dg-additional-options "-maltivec" { target powerpc_altivec_ok } } */
 
@@ -32,4 +32,5 @@  v4si test4 (v4si v, int i)
   return v;
 }
 
-/* { dg-final { scan-tree-dump-times "Now a gimple register: v" 4 "ccp1" { target { { i?86-*-* x86_64-*-* aarch64*-*-* spu*-*-* } || { powerpc_altivec_ok } } } } } */
+/* { dg-final { scan-tree-dump-times "Now a gimple register: v" 2 "ssa" { target { { i?86-*-* x86_64-*-* aarch64*-*-* spu*-*-* } || { powerpc_altivec_ok } } } } } */
+/* { dg-final { scan-tree-dump-times "Now a gimple register: v" 2 "ccp1" { target { { i?86-*-* x86_64-*-* aarch64*-*-* spu*-*-* } || { powerpc_altivec_ok } } } } } */