[AArch64] Add SVE DWARF registers

Message ID 20190514113014.GA13338@arm.com
State New
Headers show
Series
  • [AArch64] Add SVE DWARF registers
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Commit Message

Tamar Christina May 14, 2019, 11:30 a.m.
Hi All,

The SVE DRAWF register names are missing from binutils, this may cause objdump
and readelf to ignore certain DRAWF output as the registers are unknown (most
notably CIEs).

This patch adds the registers in accordance to the "DWARF for ARM(r) 64-bit
Architecture (AARch64) with SVE support" documentation [1].

[1] https://developer.arm.com/docs/100985/latest/dwarf-for-the-arm-64-bit-architecture-aarch64-with-sve-support

build on native hardware and regtested on
  aarch64-none-elf, aarch64-none-elf (32 bit host),
  aarch64-none-linux-gnu, aarch64-none-linux-gnu (32 bit host)

Cross-compiled and regtested on
  aarch64-none-linux-gnu, aarch64_be-none-linux-gnu

and no issues.

Ok for master? and for backport to binutils-2.32?

Thanks,
Tamar

binutils/ChangeLog:

2019-05-14  Tamar Christina  <tamar.christina@arm.com>

	* dwarf.c (dwarf_regnames_aarch64): Add SVE registers.
	* testsuite/binutils-all/aarch64/sve-dwarf-registers.d: New test.
	* testsuite/binutils-all/aarch64/sve-dwarf-registers.s: New test.

--

Comments

Nick Clifton May 20, 2019, 3:41 p.m. | #1
Hi Tamar,

> binutils/ChangeLog:

> 2019-05-14  Tamar Christina  <tamar.christina@arm.com>

> 

> 	* dwarf.c (dwarf_regnames_aarch64): Add SVE registers.

> 	* testsuite/binutils-all/aarch64/sve-dwarf-registers.d: New test.

> 	* testsuite/binutils-all/aarch64/sve-dwarf-registers.s: New test.


Approved - please apply.

Cheers
  Nick
Tamar Christina May 20, 2019, 3:59 p.m. | #2
Hi Nick,

Thanks for the review! Just to check, is the backport to 2.32 also approved?

Thanks,
Tamar

> -----Original Message-----

> From: Nick Clifton <nickc@redhat.com>

> Sent: Monday, May 20, 2019 16:42

> To: Tamar Christina <Tamar.Christina@arm.com>; binutils@sourceware.org

> Cc: nd <nd@arm.com>; Richard Earnshaw <Richard.Earnshaw@arm.com>;

> Marcus Shawcroft <Marcus.Shawcroft@arm.com>

> Subject: Re: [PATCH][Binutils][AArch64] Add SVE DWARF registers

> 

> Hi Tamar,

> 

> > binutils/ChangeLog:

> > 2019-05-14  Tamar Christina  <tamar.christina@arm.com>

> >

> > 	* dwarf.c (dwarf_regnames_aarch64): Add SVE registers.

> > 	* testsuite/binutils-all/aarch64/sve-dwarf-registers.d: New test.

> > 	* testsuite/binutils-all/aarch64/sve-dwarf-registers.s: New test.

> 

> Approved - please apply.

> 

> Cheers

>   Nick

>
Nick Clifton May 20, 2019, 4:22 p.m. | #3
Hi Tamar,

> Thanks for the review! Just to check, is the backport to 2.32 also approved?


Yes indeed.  Please do.

Cheers
  Nick

Patch

diff --git a/binutils/dwarf.c b/binutils/dwarf.c
index 9f17af9ff823bc1517118c8d58b9cc42431bcbad..f86e20db40fd7d47500b47f8d7569a952f154e56 100644
--- a/binutils/dwarf.c
+++ b/binutils/dwarf.c
@@ -7175,13 +7175,17 @@  static const char *const dwarf_regnames_aarch64[] =
   "x16", "x17", "x18", "x19", "x20", "x21", "x22", "x23",
   "x24", "x25", "x26", "x27", "x28", "x29", "x30", "sp",
    NULL, "elr",  NULL,  NULL,  NULL,  NULL,  NULL,  NULL,
-   NULL,  NULL,  NULL,  NULL,  NULL,  NULL,  NULL,  NULL,
-   NULL,  NULL,  NULL,  NULL,  NULL,  NULL,  NULL,  NULL,
-   NULL,  NULL,  NULL,  NULL,  NULL,  NULL,  NULL,  NULL,
+   NULL,  NULL,  NULL,  NULL,  NULL,  NULL,  "vg", "ffr",
+   "p0",  "p1",  "p2",  "p3",  "p4",  "p5",  "p6",  "p7",
+   "p8",  "p9", "p10", "p11", "p12", "p13", "p14", "p15",
    "v0",  "v1",  "v2",  "v3",  "v4",  "v5",  "v6",  "v7",
    "v8",  "v9", "v10", "v11", "v12", "v13", "v14", "v15",
   "v16", "v17", "v18", "v19", "v20", "v21", "v22", "v23",
   "v24", "v25", "v26", "v27", "v28", "v29", "v30", "v31",
+   "z0",  "z1",  "z2",  "z3",  "z4",  "z5",  "z6",  "z7",
+   "z8",  "z9", "z10", "z11", "z12", "z13", "z14", "z15",
+  "z16", "z17", "z18", "z19", "z20", "z21", "z22", "z23",
+  "z24", "z25", "z26", "z27", "z28", "z29", "z30", "z31",
 };
 
 void
diff --git a/binutils/testsuite/binutils-all/aarch64/sve-dwarf-registers.d b/binutils/testsuite/binutils-all/aarch64/sve-dwarf-registers.d
new file mode 100644
index 0000000000000000000000000000000000000000..84613668d2983f664be4b05773e7c8eda16277d5
--- /dev/null
+++ b/binutils/testsuite/binutils-all/aarch64/sve-dwarf-registers.d
@@ -0,0 +1,25 @@ 
+#PROG: objcopy
+#readelf: --debug-dump=frames
+
+Contents of the .eh_frame section:
+
+
+00000000 0000000000000018 00000000 CIE
+  Version:               1
+  Augmentation:          "zR"
+  Code alignment factor: 4
+  Data alignment factor: -8
+  Return address column: 30
+  Augmentation data:     1b
+  DW_CFA_def_cfa: r31 \(sp\) ofs 0
+  DW_CFA_def_cfa_register: r96 \(z0\)
+  DW_CFA_def_cfa_offset: 5
+  DW_CFA_restore_extended: r96 \(z0\)
+  DW_CFA_nop
+  DW_CFA_nop
+
+0000001c 0000000000000010 00000020 FDE cie=00000000 pc=0000000000000000..0000000000000000
+  DW_CFA_nop
+  DW_CFA_nop
+  DW_CFA_nop
+
diff --git a/binutils/testsuite/binutils-all/aarch64/sve-dwarf-registers.s b/binutils/testsuite/binutils-all/aarch64/sve-dwarf-registers.s
new file mode 100644
index 0000000000000000000000000000000000000000..69f17f5eb38b854d96136b0a6e2a2452c738e6b7
--- /dev/null
+++ b/binutils/testsuite/binutils-all/aarch64/sve-dwarf-registers.s
@@ -0,0 +1,6 @@ 
+	.arch armv8-a+sve
+	.cfi_startproc
+	.cfi_def_cfa_register 96
+	.cfi_adjust_cfa_offset 5
+	.cfi_restore 96
+	.cfi_endproc