RISC-V: Fix relocation failure with zero address sections.

Message ID 20180215214944.27171-1-jimw@sifive.com
State New
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Series
  • RISC-V: Fix relocation failure with zero address sections.
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Commit Message

Jim Wilson Feb. 15, 2018, 9:49 p.m.
This fixes a bug that has been reported twice recently.
  https://github.com/riscv/riscv-gcc/issues/120
  https://github.com/riscv/riscv-gnu-toolchain/issues/322

There is a check to ignore symbols whose section address is zero.  This breaks
embedded development using a linker script that assigns a section to address 0.
I've tried instrumenting the code and building lots of stuff, and I haven't
been able to find any reason for this code.  My best guess at the moment is
that it was added before the SHN_UNDEF section support was added, and hence is
no longer necessary.  But since I'm not sure, I'm ifdefing it out instead of
removing it in case we find a reason for it later.

This has been tested with binutils/gcc builds and checks, and a linux/buildroot
build and boot.  There were no regressions.

Committed.

Jim

	bfd/
	* elfnn-riscv.c (_bfd_riscv_relax_section): Ifdef out check to ignore
	symbols whose section address is zero.
---
 bfd/elfnn-riscv.c | 6 ++++++
 1 file changed, 6 insertions(+)

-- 
2.14.1

Patch

diff --git a/bfd/elfnn-riscv.c b/bfd/elfnn-riscv.c
index 931bd1d89d..0530532eec 100644
--- a/bfd/elfnn-riscv.c
+++ b/bfd/elfnn-riscv.c
@@ -3399,8 +3399,14 @@  _bfd_riscv_relax_section (bfd *abfd, asection *sec,
 	    {
 	      BFD_ASSERT (isym->st_shndx < elf_numsections (abfd));
 	      sym_sec = elf_elfsections (abfd)[isym->st_shndx]->bfd_section;
+#if 0
+	      /* The purpose of this code is unknown.  It breaks linker scripts
+		 for embedded development that place sections at address zero.
+		 This code is believed to be unnecessary.  Disabling it but not
+		 yet removing it, in case something breaks.  */
 	      if (sec_addr (sym_sec) == 0)
 		continue;
+#endif
 	      symval = sec_addr (sym_sec) + isym->st_value;
 	    }
 	}