[38/57,Arm,OBJDUMP] Disable the use of MVE reserved coproc numbers in coprocessor instructions

Message ID ea46304f-c03d-9a0b-e306-281d0804a553@arm.com
State New
Headers show
Series
  • : Add support for Armv8.1-M Mainline MVE instructions
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Commit Message

Andre Vieira (lists) May 1, 2019, 5:38 p.m.
Hi,

This patch disables the use of coprocessor numbers 8, 14 and 15 in 
coprocessor instructions for Armv8.1-M Mainline, adding to the already 
disabled 9, 10 and 11, as mandated by the architecture.

opcodes/ChangeLog:

2019-05-01  Andre Vieira  <andre.simoesdiasvieira@arm.com>

	* arm-dis.c (print_insn_coprocessor_1): Disable the use of coprocessors
         8, 14 and 15 for Armv8.1-M Mainline.

Patch

diff --git a/opcodes/arm-dis.c b/opcodes/arm-dis.c
index 28c7f16de4b39f6aa580a0a9f4d4d775e1c4b768..8cd3514e7e53fc3a61ee97c7df1988c11a8143d0 100644
--- a/opcodes/arm-dis.c
+++ b/opcodes/arm-dis.c
@@ -3782,6 +3782,13 @@  print_insn_coprocessor_1 (const struct sopcode32 *opcodes,
 	{
 	  if (cp_num == 9 || cp_num == 10 || cp_num == 11)
 	    is_unpredictable = TRUE;
+
+	  /* Armv8.1-M Mainline FP & MVE instructions.  */
+	  if (ARM_CPU_HAS_FEATURE (arm_ext_v8_1m_main, allowed_arches)
+	      && !ARM_CPU_IS_ANY (allowed_arches)
+	      && (cp_num == 8 || cp_num == 14 || cp_num == 15))
+	    continue;
+
 	}
       else if (insn->value == 0x0e000000     /* cdp  */
 	       || insn->value == 0xfe000000  /* cdp2  */