[26/57,Arm,GAS] Add support for MVE instructions: vpnot and vpsel

Message ID ccfefa20-86ea-0624-df9c-a5f97b54a6d6@arm.com
State New
Headers show
Series
  • : Add support for Armv8.1-M Mainline MVE instructions
Related show

Commit Message

Andre Vieira (lists) May 1, 2019, 5:17 p.m.
Hi,

This patch adds support for MVE instructions VPNOT and VPSEL.

gas/ChangeLog:

2019-05-01  Andre Vieira  <andre.simoesdiasvieira@arm.com>

	* config/tc-arm.c (do_mve_vpsel): New encoding function.
	(do_mve_vpnot): Likewise.
         (insns): Add entries for MVE mnemonics.
	* testsuite/gas/arm/mve-vpnot-bad.d: New test.
	* testsuite/gas/arm/mve-vpnot-bad.l: New test.
	* testsuite/gas/arm/mve-vpnot-bad.s: New test.
	* testsuite/gas/arm/mve-vpsel-bad.d: New test.
	* testsuite/gas/arm/mve-vpsel-bad.l: New test.
	* testsuite/gas/arm/mve-vpsel-bad.s: New test.

Patch

diff --git a/gas/config/tc-arm.c b/gas/config/tc-arm.c
index 4615f10246ca227257d76962a0e86557d9d9186f..b5c263688134bcd733c5ba8f93fe003268859abd 100644
--- a/gas/config/tc-arm.c
+++ b/gas/config/tc-arm.c
@@ -15734,6 +15734,34 @@  do_mve_vmlas (void)
   inst.is_neon = 1;
 }
 
+static void
+do_mve_vpsel (void)
+{
+  neon_select_shape (NS_QQQ, NS_NULL);
+
+  if (inst.cond > COND_ALWAYS)
+    inst.pred_insn_type = INSIDE_VPT_INSN;
+  else
+    inst.pred_insn_type = MVE_OUTSIDE_PRED_INSN;
+
+  inst.instruction |= HI1 (inst.operands[0].reg) << 22;
+  inst.instruction |= LOW4 (inst.operands[1].reg) << 16;
+  inst.instruction |= LOW4 (inst.operands[0].reg) << 12;
+  inst.instruction |= HI1 (inst.operands[1].reg) << 7;
+  inst.instruction |= HI1 (inst.operands[2].reg) << 5;
+  inst.instruction |= LOW4 (inst.operands[2].reg);
+  inst.is_neon = 1;
+}
+
+static void
+do_mve_vpnot (void)
+{
+  if (inst.cond > COND_ALWAYS)
+    inst.pred_insn_type = INSIDE_VPT_INSN;
+  else
+    inst.pred_insn_type = MVE_OUTSIDE_PRED_INSN;
+}
+
 static void
 do_mve_vmaxnma_vminnma (void)
 {
@@ -24715,6 +24743,8 @@  static const struct asm_opcode insns[] =
  mToC("vmlas",	  ee011e40,	3, (RMQ, RMQ, RR),		mve_vmlas),
  mToC("vmulh",	  ee010e01,	3, (RMQ, RMQ, RMQ),		mve_vmulh),
  mToC("vrmulh",	  ee011e01,	3, (RMQ, RMQ, RMQ),		mve_vmulh),
+ mToC("vpnot",	  fe310f4d,	0, (),				mve_vpnot),
+ mToC("vpsel",	  fe310f01,	3, (RMQ, RMQ, RMQ),		mve_vpsel),
 
 #undef THUMB_VARIANT
 #define THUMB_VARIANT & mve_fp_ext
diff --git a/gas/testsuite/gas/arm/mve-vpnot-bad.d b/gas/testsuite/gas/arm/mve-vpnot-bad.d
new file mode 100644
index 0000000000000000000000000000000000000000..6aab2c47c1ddf3102ed172efad8d70c2fe98a4f8
--- /dev/null
+++ b/gas/testsuite/gas/arm/mve-vpnot-bad.d
@@ -0,0 +1,5 @@ 
+#name: bad MVE VPNOT instructions
+#as: -march=armv8.1-m.main+mve.fp
+#error_output: mve-vpnot-bad.l
+
+.*: +file format .*arm.*
diff --git a/gas/testsuite/gas/arm/mve-vpnot-bad.l b/gas/testsuite/gas/arm/mve-vpnot-bad.l
new file mode 100644
index 0000000000000000000000000000000000000000..2ba96c6ddda767f039586f6117243dce78fc2bad
--- /dev/null
+++ b/gas/testsuite/gas/arm/mve-vpnot-bad.l
@@ -0,0 +1,12 @@ 
+[^:]*: Assembler messages:
+[^:]*:10: Warning: instruction is UNPREDICTABLE in an IT block
+[^:]*:10: Warning: instruction is UNPREDICTABLE in an IT block
+[^:]*:10: Warning: instruction is UNPREDICTABLE in an IT block
+[^:]*:10: Warning: instruction is UNPREDICTABLE in an IT block
+[^:]*:10: Warning: instruction is UNPREDICTABLE in an IT block
+[^:]*:10: Warning: instruction is UNPREDICTABLE in an IT block
+[^:]*:12: Error: syntax error -- `vpnoteq'
+[^:]*:13: Error: syntax error -- `vpnoteq'
+[^:]*:15: Error: syntax error -- `vpnoteq'
+[^:]*:16: Error: vector predicated instruction should be in VPT/VPST block -- `vpnott'
+[^:]*:18: Error: instruction missing MVE vector predication code -- `vpnot'
diff --git a/gas/testsuite/gas/arm/mve-vpnot-bad.s b/gas/testsuite/gas/arm/mve-vpnot-bad.s
new file mode 100644
index 0000000000000000000000000000000000000000..3588f60bda8db2327ce55220072cd8a6836423bd
--- /dev/null
+++ b/gas/testsuite/gas/arm/mve-vpnot-bad.s
@@ -0,0 +1,18 @@ 
+.macro cond
+.irp cond, eq, ne, gt, ge, lt, le
+it \cond
+vpnot
+.endr
+.endm
+
+.syntax unified
+.thumb
+cond
+it eq
+vpnoteq
+vpnoteq
+vpst
+vpnoteq
+vpnott
+vpst
+vpnot
diff --git a/gas/testsuite/gas/arm/mve-vpsel-bad.d b/gas/testsuite/gas/arm/mve-vpsel-bad.d
new file mode 100644
index 0000000000000000000000000000000000000000..b8a602a6b1d03bf87765d09d382ccc20288d7c84
--- /dev/null
+++ b/gas/testsuite/gas/arm/mve-vpsel-bad.d
@@ -0,0 +1,5 @@ 
+#name: bad MVE VPSEL instructions
+#as: -march=armv8.1-m.main+mve.fp
+#error_output: mve-vpsel-bad.l
+
+.*: +file format .*arm.*
diff --git a/gas/testsuite/gas/arm/mve-vpsel-bad.l b/gas/testsuite/gas/arm/mve-vpsel-bad.l
new file mode 100644
index 0000000000000000000000000000000000000000..d2b2890d287669ace51675d20797f27cf7708eac
--- /dev/null
+++ b/gas/testsuite/gas/arm/mve-vpsel-bad.l
@@ -0,0 +1,12 @@ 
+[^:]*: Assembler messages:
+[^:]*:10: Warning: instruction is UNPREDICTABLE in an IT block
+[^:]*:10: Warning: instruction is UNPREDICTABLE in an IT block
+[^:]*:10: Warning: instruction is UNPREDICTABLE in an IT block
+[^:]*:10: Warning: instruction is UNPREDICTABLE in an IT block
+[^:]*:10: Warning: instruction is UNPREDICTABLE in an IT block
+[^:]*:10: Warning: instruction is UNPREDICTABLE in an IT block
+[^:]*:12: Error: syntax error -- `vpseleq.i16 q0,q1,q2'
+[^:]*:13: Error: syntax error -- `vpseleq.i16 q0,q1,q2'
+[^:]*:15: Error: syntax error -- `vpseleq.i16 q0,q1,q2'
+[^:]*:16: Error: vector predicated instruction should be in VPT/VPST block -- `vpselt.i16 q0,q1,q2'
+[^:]*:18: Error: instruction missing MVE vector predication code -- `vpsel.i16 q0,q1,q2'
diff --git a/gas/testsuite/gas/arm/mve-vpsel-bad.s b/gas/testsuite/gas/arm/mve-vpsel-bad.s
new file mode 100644
index 0000000000000000000000000000000000000000..fc14fdc3d316c2869c3fe8b0295a05dbbc22f664
--- /dev/null
+++ b/gas/testsuite/gas/arm/mve-vpsel-bad.s
@@ -0,0 +1,19 @@ 
+.macro cond
+.irp cond, eq, ne, gt, ge, lt, le
+it \cond
+vpsel.i16 q0, q1, q2
+.endr
+.endm
+
+.syntax unified
+.thumb
+cond
+it eq
+vpseleq.i16 q0, q1, q2
+vpseleq.i16 q0, q1, q2
+vpst
+vpseleq.i16 q0, q1, q2
+vpselt.i16 q0, q1, q2
+vpst
+vpsel.i16 q0, q1, q2
+