[09/16,aarch64] New sve_size_013 iclass.

Message ID 1556721866-21052-10-git-send-email-matthew.malcomson@arm.com
State New
Headers show
Series
  • SVE2 binutils instructions for aarch64
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Commit Message

Matthew Malcomson May 1, 2019, 2:44 p.m.
Add sve_size_013 instruction class

This new iclass handles instructions such as pmullb whose size specifier
can only be encoded as 0, 1, or 3.

include/ChangeLog:

2019-04-04  Matthew Malcomson  <matthew.malcomson@arm.com>

	* opcode/aarch64.h (enum aarch64_insn_class): Add sve_size_013 iclass.

opcodes/ChangeLog:

2019-04-04  Matthew Malcomson  <matthew.malcomson@arm.com>

	* aarch64-asm.c (aarch64_encode_variant_using_iclass): Handle
	sve_size_013 iclass encode.
	* aarch64-dis.c (aarch64_decode_variant_using_iclass): Handle
	sve_size_013 iclass decode.
---
 include/opcode/aarch64.h |  1 +
 opcodes/aarch64-asm.c    |  8 ++++++++
 opcodes/aarch64-dis.c    | 10 ++++++++++
 3 files changed, 19 insertions(+)

-- 
2.7.4

Patch

diff --git a/include/opcode/aarch64.h b/include/opcode/aarch64.h
index d1d4a23..f46e378 100644
--- a/include/opcode/aarch64.h
+++ b/include/opcode/aarch64.h
@@ -592,6 +592,7 @@  enum aarch64_insn_class
   sve_size_sd,
   sve_size_bh,
   sve_size_sd2,
+  sve_size_013,
   testbranch,
   cryptosm3,
   cryptosm4,
diff --git a/opcodes/aarch64-asm.c b/opcodes/aarch64-asm.c
index 674eba5..0ec27b2 100644
--- a/opcodes/aarch64-asm.c
+++ b/opcodes/aarch64-asm.c
@@ -1613,6 +1613,7 @@  do_special_encoding (struct aarch64_inst *inst)
 static void
 aarch64_encode_variant_using_iclass (struct aarch64_inst *inst)
 {
+  int variant = 0;
   switch (inst->opcode->iclass)
     {
     case sve_cpy:
@@ -1669,6 +1670,13 @@  aarch64_encode_variant_using_iclass (struct aarch64_inst *inst)
 		    aarch64_get_variant (inst) + 1, 0);
       break;
 
+    case sve_size_013:
+      variant = aarch64_get_variant (inst);
+      if (variant == 2)
+	  variant = 3;
+      insert_field (FLD_size, &inst->value, variant, 0);
+      break;
+
     default:
       break;
     }
diff --git a/opcodes/aarch64-dis.c b/opcodes/aarch64-dis.c
index bfc47b4..1a727a4 100644
--- a/opcodes/aarch64-dis.c
+++ b/opcodes/aarch64-dis.c
@@ -2822,6 +2822,16 @@  aarch64_decode_variant_using_iclass (aarch64_inst *inst)
       variant = i - 1;
       break;
 
+    case sve_size_013:
+      i = extract_field (FLD_size, inst->value, 0);
+      if (i == 2)
+	return FALSE;
+      if (i == 3)
+	variant = 2;
+      else
+	variant = i;
+      break;
+
     default:
       /* No mapping between instruction class and qualifiers.  */
       return TRUE;