[08/16,aarch64] New sve_size_bh iclass.

Message ID 1556721866-21052-9-git-send-email-matthew.malcomson@arm.com
State New
Headers show
Series
  • SVE2 binutils instructions for aarch64
Related show

Commit Message

Matthew Malcomson May 1, 2019, 2:44 p.m.
Add new iclass sve_size_bh to handle instructions that have two variants
encoded with the SVE_sz field.
This iclass behaves the same as the sve_size_sd iclass, but it has a
nicer name for those instructions that choose between variants using the
"B" and "H" size qualifiers.

include/ChangeLog:

2019-04-04  Matthew Malcomson  <matthew.malcomson@arm.com>

	* opcode/aarch64.h (enum aarch64_insn_class): Add sve_size_bh iclass.

opcodes/ChangeLog:

2019-04-04  Matthew Malcomson  <matthew.malcomson@arm.com>

	* aarch64-asm.c (aarch64_encode_variant_using_iclass): Handle
	sve_size_bh iclass encode.
	* aarch64-dis.c (aarch64_decode_variant_using_iclass): Handle
	sve_size_bh iclass decode.
---
 include/opcode/aarch64.h | 1 +
 opcodes/aarch64-asm.c    | 1 +
 opcodes/aarch64-dis.c    | 1 +
 3 files changed, 3 insertions(+)

-- 
2.7.4

Patch

diff --git a/include/opcode/aarch64.h b/include/opcode/aarch64.h
index d23a6e7..d1d4a23 100644
--- a/include/opcode/aarch64.h
+++ b/include/opcode/aarch64.h
@@ -590,6 +590,7 @@  enum aarch64_insn_class
   sve_size_hsd,
   sve_size_hsd2,
   sve_size_sd,
+  sve_size_bh,
   sve_size_sd2,
   testbranch,
   cryptosm3,
diff --git a/opcodes/aarch64-asm.c b/opcodes/aarch64-asm.c
index 6627b54..674eba5 100644
--- a/opcodes/aarch64-asm.c
+++ b/opcodes/aarch64-asm.c
@@ -1655,6 +1655,7 @@  aarch64_encode_variant_using_iclass (struct aarch64_inst *inst)
       insert_field (FLD_size, &inst->value, aarch64_get_variant (inst) + 1, 0);
       break;
 
+    case sve_size_bh:
     case sve_size_sd:
       insert_field (FLD_SVE_sz, &inst->value, aarch64_get_variant (inst), 0);
       break;
diff --git a/opcodes/aarch64-dis.c b/opcodes/aarch64-dis.c
index 35576b3..bfc47b4 100644
--- a/opcodes/aarch64-dis.c
+++ b/opcodes/aarch64-dis.c
@@ -2806,6 +2806,7 @@  aarch64_decode_variant_using_iclass (aarch64_inst *inst)
       variant = i - 1;
       break;
 
+    case sve_size_bh:
     case sve_size_sd:
       variant = extract_field (FLD_SVE_sz, inst->value, 0);
       break;