[14/14] S/390: arch13: vector float-int conversion builtins

Message ID 1554204061-30488-15-git-send-email-krebbel@linux.ibm.com
State New
Headers show
Series
  • S/390: Add support for new cpu architecture - arch13.
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Commit Message

Andreas Krebbel April 2, 2019, 11:21 a.m.
gcc/ChangeLog:

2019-04-02  Andreas Krebbel  <krebbel@linux.ibm.com>

	* config/s390/s390-builtin-types.def: New builtin function type
	definitions. Remove unused types.
	* config/s390/s390-builtins.def (s390_vcdgb, s390_vcdlgb)
	(s390_vcgdb, s390_vclgdb): Remove low-level builtin definitions.
	(s390_vec_float, s390_vec_signed, s390_vec_unsigned): New
	overloaded builtins.
	(s390_vcefb, s390_vcdgb, s390_vcelfb, s390_vcdlgb, s390_vcfeb)
	(s390_vcgdb, s390_vclfeb, s390_vclgdb): New low-level builtins.
	* config/s390/vecintrin.h (vec_float): New builtin macro definition.
	(vec_double, vec_signed, vec_unsigned): Define to use the new
	overloaded builtins.
	* config/s390/vx-builtins.md ("vec_double_s64", "vec_double_u64"):
	Remove expanders.

gcc/testsuite/ChangeLog:

2019-04-02  Andreas Krebbel  <krebbel@linux.ibm.com>

	* gcc.target/s390/zvector/vec-double-compile.c: New test.
	* gcc.target/s390/zvector/vec-float-compile.c: New test.
	* gcc.target/s390/zvector/vec-signed-compile.c: New test.
	* gcc.target/s390/zvector/vec-unsigned-compile.c: New test.
---
 gcc/config/s390/s390-builtin-types.def             | 16 ++++++--
 gcc/config/s390/s390-builtins.def                  | 39 +++++++++++++-----
 gcc/config/s390/vecintrin.h                        |  7 ++--
 gcc/config/s390/vx-builtins.md                     | 16 --------
 .../gcc.target/s390/zvector/vec-double-compile.c   | 47 ++++++++++++++++++++++
 .../gcc.target/s390/zvector/vec-float-compile.c    | 47 ++++++++++++++++++++++
 .../gcc.target/s390/zvector/vec-signed-compile.c   | 47 ++++++++++++++++++++++
 .../gcc.target/s390/zvector/vec-unsigned-compile.c | 47 ++++++++++++++++++++++
 8 files changed, 232 insertions(+), 34 deletions(-)
 create mode 100644 gcc/testsuite/gcc.target/s390/zvector/vec-double-compile.c
 create mode 100644 gcc/testsuite/gcc.target/s390/zvector/vec-float-compile.c
 create mode 100644 gcc/testsuite/gcc.target/s390/zvector/vec-signed-compile.c
 create mode 100644 gcc/testsuite/gcc.target/s390/zvector/vec-unsigned-compile.c

-- 
2.7.4

Patch

diff --git a/gcc/config/s390/s390-builtin-types.def b/gcc/config/s390/s390-builtin-types.def
index fc73d1f..53398a9 100644
--- a/gcc/config/s390/s390-builtin-types.def
+++ b/gcc/config/s390/s390-builtin-types.def
@@ -140,11 +140,13 @@  DEF_FN_TYPE_1 (BT_FN_UV2DI_ULONGLONGCONSTPTR, BT_UV2DI, BT_ULONGLONGCONSTPTR)
 DEF_FN_TYPE_1 (BT_FN_UV2DI_USHORT, BT_UV2DI, BT_USHORT)
 DEF_FN_TYPE_1 (BT_FN_UV2DI_UV2DI, BT_UV2DI, BT_UV2DI)
 DEF_FN_TYPE_1 (BT_FN_UV2DI_UV4SI, BT_UV2DI, BT_UV4SI)
+DEF_FN_TYPE_1 (BT_FN_UV2DI_V2DF, BT_UV2DI, BT_V2DF)
 DEF_FN_TYPE_1 (BT_FN_UV4SI_UINT, BT_UV4SI, BT_UINT)
 DEF_FN_TYPE_1 (BT_FN_UV4SI_UINTCONSTPTR, BT_UV4SI, BT_UINTCONSTPTR)
 DEF_FN_TYPE_1 (BT_FN_UV4SI_USHORT, BT_UV4SI, BT_USHORT)
 DEF_FN_TYPE_1 (BT_FN_UV4SI_UV4SI, BT_UV4SI, BT_UV4SI)
 DEF_FN_TYPE_1 (BT_FN_UV4SI_UV8HI, BT_UV4SI, BT_UV8HI)
+DEF_FN_TYPE_1 (BT_FN_UV4SI_V4SF, BT_UV4SI, BT_V4SF)
 DEF_FN_TYPE_1 (BT_FN_UV8HI_USHORT, BT_UV8HI, BT_USHORT)
 DEF_FN_TYPE_1 (BT_FN_UV8HI_USHORTCONSTPTR, BT_UV8HI, BT_USHORTCONSTPTR)
 DEF_FN_TYPE_1 (BT_FN_UV8HI_UV16QI, BT_UV8HI, BT_UV16QI)
@@ -162,13 +164,17 @@  DEF_FN_TYPE_1 (BT_FN_V2DF_V2DI, BT_V2DF, BT_V2DI)
 DEF_FN_TYPE_1 (BT_FN_V2DF_V4SF, BT_V2DF, BT_V4SF)
 DEF_FN_TYPE_1 (BT_FN_V2DI_SHORT, BT_V2DI, BT_SHORT)
 DEF_FN_TYPE_1 (BT_FN_V2DI_V16QI, BT_V2DI, BT_V16QI)
+DEF_FN_TYPE_1 (BT_FN_V2DI_V2DF, BT_V2DI, BT_V2DF)
 DEF_FN_TYPE_1 (BT_FN_V2DI_V2DI, BT_V2DI, BT_V2DI)
 DEF_FN_TYPE_1 (BT_FN_V2DI_V4SI, BT_V2DI, BT_V4SI)
 DEF_FN_TYPE_1 (BT_FN_V2DI_V8HI, BT_V2DI, BT_V8HI)
 DEF_FN_TYPE_1 (BT_FN_V4SF_FLT, BT_V4SF, BT_FLT)
 DEF_FN_TYPE_1 (BT_FN_V4SF_FLTCONSTPTR, BT_V4SF, BT_FLTCONSTPTR)
+DEF_FN_TYPE_1 (BT_FN_V4SF_UV4SI, BT_V4SF, BT_UV4SI)
 DEF_FN_TYPE_1 (BT_FN_V4SF_V4SF, BT_V4SF, BT_V4SF)
+DEF_FN_TYPE_1 (BT_FN_V4SF_V4SI, BT_V4SF, BT_V4SI)
 DEF_FN_TYPE_1 (BT_FN_V4SI_SHORT, BT_V4SI, BT_SHORT)
+DEF_FN_TYPE_1 (BT_FN_V4SI_V4SF, BT_V4SI, BT_V4SF)
 DEF_FN_TYPE_1 (BT_FN_V4SI_V4SI, BT_V4SI, BT_V4SI)
 DEF_FN_TYPE_1 (BT_FN_V4SI_V8HI, BT_V4SI, BT_V8HI)
 DEF_FN_TYPE_1 (BT_FN_V8HI_SHORT, BT_V8HI, BT_SHORT)
@@ -296,7 +302,6 @@  DEF_FN_TYPE_3 (BT_FN_UV16QI_UV8HI_UV8HI_INTPTR, BT_UV16QI, BT_UV8HI, BT_UV8HI, B
 DEF_FN_TYPE_3 (BT_FN_UV2DI_UV2DI_ULONGLONG_INT, BT_UV2DI, BT_UV2DI, BT_ULONGLONG, BT_INT)
 DEF_FN_TYPE_3 (BT_FN_UV2DI_UV2DI_UV2DI_INT, BT_UV2DI, BT_UV2DI, BT_UV2DI, BT_INT)
 DEF_FN_TYPE_3 (BT_FN_UV2DI_UV4SI_UV4SI_UV2DI, BT_UV2DI, BT_UV4SI, BT_UV4SI, BT_UV2DI)
-DEF_FN_TYPE_3 (BT_FN_UV2DI_V2DF_INT_INT, BT_UV2DI, BT_V2DF, BT_INT, BT_INT)
 DEF_FN_TYPE_3 (BT_FN_UV4SI_UV2DI_UV2DI_INTPTR, BT_UV4SI, BT_UV2DI, BT_UV2DI, BT_INTPTR)
 DEF_FN_TYPE_3 (BT_FN_UV4SI_UV4SI_UINT_INT, BT_UV4SI, BT_UV4SI, BT_UINT, BT_INT)
 DEF_FN_TYPE_3 (BT_FN_UV4SI_UV4SI_UV4SI_INT, BT_UV4SI, BT_UV4SI, BT_UV4SI, BT_INT)
@@ -313,15 +318,12 @@  DEF_FN_TYPE_3 (BT_FN_V16QI_UV16QI_UV16QI_INTPTR, BT_V16QI, BT_UV16QI, BT_UV16QI,
 DEF_FN_TYPE_3 (BT_FN_V16QI_V16QI_V16QI_INTPTR, BT_V16QI, BT_V16QI, BT_V16QI, BT_INTPTR)
 DEF_FN_TYPE_3 (BT_FN_V16QI_V16QI_V16QI_V16QI, BT_V16QI, BT_V16QI, BT_V16QI, BT_V16QI)
 DEF_FN_TYPE_3 (BT_FN_V16QI_V8HI_V8HI_INTPTR, BT_V16QI, BT_V8HI, BT_V8HI, BT_INTPTR)
-DEF_FN_TYPE_3 (BT_FN_V2DF_UV2DI_INT_INT, BT_V2DF, BT_UV2DI, BT_INT, BT_INT)
 DEF_FN_TYPE_3 (BT_FN_V2DF_V2DF_DBL_INT, BT_V2DF, BT_V2DF, BT_DBL, BT_INT)
 DEF_FN_TYPE_3 (BT_FN_V2DF_V2DF_UCHAR_UCHAR, BT_V2DF, BT_V2DF, BT_UCHAR, BT_UCHAR)
 DEF_FN_TYPE_3 (BT_FN_V2DF_V2DF_UINT_UINT, BT_V2DF, BT_V2DF, BT_UINT, BT_UINT)
 DEF_FN_TYPE_3 (BT_FN_V2DF_V2DF_V2DF_INT, BT_V2DF, BT_V2DF, BT_V2DF, BT_INT)
 DEF_FN_TYPE_3 (BT_FN_V2DF_V2DF_V2DF_V2DF, BT_V2DF, BT_V2DF, BT_V2DF, BT_V2DF)
-DEF_FN_TYPE_3 (BT_FN_V2DF_V2DI_INT_INT, BT_V2DF, BT_V2DI, BT_INT, BT_INT)
 DEF_FN_TYPE_3 (BT_FN_V2DI_UV2DI_UV2DI_INTPTR, BT_V2DI, BT_UV2DI, BT_UV2DI, BT_INTPTR)
-DEF_FN_TYPE_3 (BT_FN_V2DI_V2DF_INT_INT, BT_V2DI, BT_V2DF, BT_INT, BT_INT)
 DEF_FN_TYPE_3 (BT_FN_V2DI_V2DF_INT_INTPTR, BT_V2DI, BT_V2DF, BT_INT, BT_INTPTR)
 DEF_FN_TYPE_3 (BT_FN_V2DI_V2DF_V2DF_INTPTR, BT_V2DI, BT_V2DF, BT_V2DF, BT_INTPTR)
 DEF_FN_TYPE_3 (BT_FN_V2DI_V2DI_V2DI_INTPTR, BT_V2DI, BT_V2DI, BT_V2DI, BT_INTPTR)
@@ -569,6 +571,7 @@  DEF_OV_TYPE (BT_OV_UV2DI_UV4SI, BT_UV2DI, BT_UV4SI)
 DEF_OV_TYPE (BT_OV_UV2DI_UV4SI_UV4SI, BT_UV2DI, BT_UV4SI, BT_UV4SI)
 DEF_OV_TYPE (BT_OV_UV2DI_UV4SI_UV4SI_UV2DI, BT_UV2DI, BT_UV4SI, BT_UV4SI, BT_UV2DI)
 DEF_OV_TYPE (BT_OV_UV2DI_UV8HI_UV8HI, BT_UV2DI, BT_UV8HI, BT_UV8HI)
+DEF_OV_TYPE (BT_OV_UV2DI_V2DF, BT_UV2DI, BT_V2DF)
 DEF_OV_TYPE (BT_OV_UV2DI_V2DI, BT_UV2DI, BT_V2DI)
 DEF_OV_TYPE (BT_OV_UV4SI_BV4SI_BV4SI, BT_UV4SI, BT_BV4SI, BT_BV4SI)
 DEF_OV_TYPE (BT_OV_UV4SI_BV4SI_BV4SI_INTPTR, BT_UV4SI, BT_BV4SI, BT_BV4SI, BT_INTPTR)
@@ -607,6 +610,7 @@  DEF_OV_TYPE (BT_OV_UV4SI_UV8HI, BT_UV4SI, BT_UV8HI)
 DEF_OV_TYPE (BT_OV_UV4SI_UV8HI_UV8HI, BT_UV4SI, BT_UV8HI, BT_UV8HI)
 DEF_OV_TYPE (BT_OV_UV4SI_UV8HI_UV8HI_UV4SI, BT_UV4SI, BT_UV8HI, BT_UV8HI, BT_UV4SI)
 DEF_OV_TYPE (BT_OV_UV4SI_V2DI_V2DI, BT_UV4SI, BT_V2DI, BT_V2DI)
+DEF_OV_TYPE (BT_OV_UV4SI_V4SF, BT_UV4SI, BT_V4SF)
 DEF_OV_TYPE (BT_OV_UV4SI_V4SI, BT_UV4SI, BT_V4SI)
 DEF_OV_TYPE (BT_OV_UV8HI_BV8HI_BV8HI, BT_UV8HI, BT_BV8HI, BT_BV8HI)
 DEF_OV_TYPE (BT_OV_UV8HI_BV8HI_BV8HI_INTPTR, BT_UV8HI, BT_BV8HI, BT_BV8HI, BT_INTPTR)
@@ -710,6 +714,7 @@  DEF_OV_TYPE (BT_OV_V2DI_LONGLONG_LONGLONG, BT_V2DI, BT_LONGLONG, BT_LONGLONG)
 DEF_OV_TYPE (BT_OV_V2DI_LONGLONG_V2DI_INT, BT_V2DI, BT_LONGLONG, BT_V2DI, BT_INT)
 DEF_OV_TYPE (BT_OV_V2DI_LONG_LONGLONGCONSTPTR, BT_V2DI, BT_LONG, BT_LONGLONGCONSTPTR)
 DEF_OV_TYPE (BT_OV_V2DI_V16QI, BT_V2DI, BT_V16QI)
+DEF_OV_TYPE (BT_OV_V2DI_V2DF, BT_V2DI, BT_V2DF)
 DEF_OV_TYPE (BT_OV_V2DI_V2DI, BT_V2DI, BT_V2DI)
 DEF_OV_TYPE (BT_OV_V2DI_V2DI_BV2DI, BT_V2DI, BT_V2DI, BT_BV2DI)
 DEF_OV_TYPE (BT_OV_V2DI_V2DI_UCHAR, BT_V2DI, BT_V2DI, BT_UCHAR)
@@ -739,6 +744,7 @@  DEF_OV_TYPE (BT_OV_V4SF_FLTCONSTPTR_USHORT, BT_V4SF, BT_FLTCONSTPTR, BT_USHORT)
 DEF_OV_TYPE (BT_OV_V4SF_FLT_INT, BT_V4SF, BT_FLT, BT_INT)
 DEF_OV_TYPE (BT_OV_V4SF_FLT_V4SF_INT, BT_V4SF, BT_FLT, BT_V4SF, BT_INT)
 DEF_OV_TYPE (BT_OV_V4SF_LONG_FLTCONSTPTR, BT_V4SF, BT_LONG, BT_FLTCONSTPTR)
+DEF_OV_TYPE (BT_OV_V4SF_UV4SI, BT_V4SF, BT_UV4SI)
 DEF_OV_TYPE (BT_OV_V4SF_V4SF, BT_V4SF, BT_V4SF)
 DEF_OV_TYPE (BT_OV_V4SF_V4SF_BV4SI, BT_V4SF, BT_V4SF, BT_BV4SI)
 DEF_OV_TYPE (BT_OV_V4SF_V4SF_UCHAR, BT_V4SF, BT_V4SF, BT_UCHAR)
@@ -753,6 +759,7 @@  DEF_OV_TYPE (BT_OV_V4SF_V4SF_V4SF_UV16QI, BT_V4SF, BT_V4SF, BT_V4SF, BT_UV16QI)
 DEF_OV_TYPE (BT_OV_V4SF_V4SF_V4SF_UV4SI, BT_V4SF, BT_V4SF, BT_V4SF, BT_UV4SI)
 DEF_OV_TYPE (BT_OV_V4SF_V4SF_V4SF_V4SF, BT_V4SF, BT_V4SF, BT_V4SF, BT_V4SF)
 DEF_OV_TYPE (BT_OV_V4SF_V4SF_V4SI, BT_V4SF, BT_V4SF, BT_V4SI)
+DEF_OV_TYPE (BT_OV_V4SF_V4SI, BT_V4SF, BT_V4SI)
 DEF_OV_TYPE (BT_OV_V4SI_BV4SI_V4SI, BT_V4SI, BT_BV4SI, BT_V4SI)
 DEF_OV_TYPE (BT_OV_V4SI_INT, BT_V4SI, BT_INT)
 DEF_OV_TYPE (BT_OV_V4SI_INTCONSTPTR, BT_V4SI, BT_INTCONSTPTR)
@@ -764,6 +771,7 @@  DEF_OV_TYPE (BT_OV_V4SI_LONG_INTCONSTPTR, BT_V4SI, BT_LONG, BT_INTCONSTPTR)
 DEF_OV_TYPE (BT_OV_V4SI_UV4SI_V4SI_V4SI, BT_V4SI, BT_UV4SI, BT_V4SI, BT_V4SI)
 DEF_OV_TYPE (BT_OV_V4SI_V2DI_V2DI, BT_V4SI, BT_V2DI, BT_V2DI)
 DEF_OV_TYPE (BT_OV_V4SI_V2DI_V2DI_INTPTR, BT_V4SI, BT_V2DI, BT_V2DI, BT_INTPTR)
+DEF_OV_TYPE (BT_OV_V4SI_V4SF, BT_V4SI, BT_V4SF)
 DEF_OV_TYPE (BT_OV_V4SI_V4SI, BT_V4SI, BT_V4SI)
 DEF_OV_TYPE (BT_OV_V4SI_V4SI_BV4SI, BT_V4SI, BT_V4SI, BT_BV4SI)
 DEF_OV_TYPE (BT_OV_V4SI_V4SI_INTPTR, BT_V4SI, BT_V4SI, BT_INTPTR)
diff --git a/gcc/config/s390/s390-builtins.def b/gcc/config/s390/s390-builtins.def
index 108f997..fbf7d9f 100644
--- a/gcc/config/s390/s390-builtins.def
+++ b/gcc/config/s390/s390-builtins.def
@@ -2792,12 +2792,36 @@  OB_DEF_VAR (s390_vfi_dbl,               s390_vfidb,         0,
 
 B_DEF      (s390_vec_ctd_s64,           vec_ctd_s64,        0,                  B_VX,               O2_U3,              BT_FN_V2DF_V2DI_INT)                     /* vcdgb */
 B_DEF      (s390_vec_ctd_u64,           vec_ctd_u64,        0,                  B_VX,               O2_U3,              BT_FN_V2DF_UV2DI_INT)                    /* vcdlgb */
-B_DEF      (s390_vcdgb,                 vcdgb,              0,                  B_VX,               O2_U4 | O3_U3,      BT_FN_V2DF_V2DI_INT_INT)
-B_DEF      (s390_vcdlgb,                vcdlgb,             0,                  B_VX,               O2_U4 | O3_U3,      BT_FN_V2DF_UV2DI_INT_INT)
 B_DEF      (s390_vec_ctsl,              vec_ctsl,           0,                  B_VX,               O2_U3,              BT_FN_V2DI_V2DF_INT)                     /* vcgdb */
 B_DEF      (s390_vec_ctul,              vec_ctul,           0,                  B_VX,               O2_U3,              BT_FN_UV2DI_V2DF_INT)                    /* vclgdb */
-B_DEF      (s390_vcgdb,                 vcgdb,              0,                  B_VX,               O2_U4 | O3_U3,      BT_FN_V2DI_V2DF_INT_INT)
-B_DEF      (s390_vclgdb,                vclgdb,             0,                  B_VX,               O2_U4 | O3_U3,      BT_FN_UV2DI_V2DF_INT_INT)
+
+
+OB_DEF     (s390_vec_float,             s390_vec_float_s32, s390_vec_float_u32, B_VXE2,             BT_FN_OV4SI_OV4SI)
+OB_DEF_VAR (s390_vec_float_s32,         s390_vcefb,         0,                  0,                  BT_OV_V4SF_V4SI)
+OB_DEF_VAR (s390_vec_float_u32,         s390_vcelfb,        0,                  0,                  BT_OV_V4SF_UV4SI)
+
+OB_DEF     (s390_vec_double,            s390_vec_double_s64,s390_vec_double_u64,B_VX,               BT_FN_OV4SI_OV4SI)
+OB_DEF_VAR (s390_vec_double_s64,        s390_vcdgb,         0,                  0,                  BT_OV_V2DF_V2DI)
+OB_DEF_VAR (s390_vec_double_u64,        s390_vcdlgb,        0,                  0,                  BT_OV_V2DF_UV2DI)
+
+B_DEF      (s390_vcefb,                 floatv4siv4sf2,     0,                  B_VXE2,             O2_U4 | O3_U3,      BT_FN_V4SF_V4SI)
+B_DEF      (s390_vcdgb,                 floatv2div2df2,     0,                  B_VX,               O2_U4 | O3_U3,      BT_FN_V2DF_V2DI)
+B_DEF      (s390_vcelfb,                floatunsv4siv4sf2,  0,                  B_VXE2,             O2_U4 | O3_U3,      BT_FN_V4SF_UV4SI)
+B_DEF      (s390_vcdlgb,                floatunsv2div2df2,  0,                  B_VX,               O2_U4 | O3_U3,      BT_FN_V2DF_UV2DI)
+
+OB_DEF     (s390_vec_signed,            s390_vec_signed_flt,s390_vec_signed_dbl,B_VX,               BT_FN_OV4SI_OV4SI)
+OB_DEF_VAR (s390_vec_signed_flt,        s390_vcfeb,         0,                  B_VXE2,             BT_OV_V4SI_V4SF)
+OB_DEF_VAR (s390_vec_signed_dbl,        s390_vcgdb,         0,                  0,                  BT_OV_V2DI_V2DF)
+
+OB_DEF     (s390_vec_unsigned,          s390_vec_unsigned_flt,s390_vec_unsigned_dbl,B_VX,           BT_FN_OV4SI_OV4SI)
+OB_DEF_VAR (s390_vec_unsigned_flt,      s390_vclfeb,        0,                B_VXE2,             BT_OV_UV4SI_V4SF)
+OB_DEF_VAR (s390_vec_unsigned_dbl,      s390_vclgdb,        0,                0,                  BT_OV_UV2DI_V2DF)
+
+B_DEF      (s390_vcfeb,                 fix_truncv4sfv4si2, 0,                  B_VXE2,             O2_U4 | O3_U3,      BT_FN_V4SI_V4SF)
+B_DEF      (s390_vcgdb,                 fix_truncv2dfv2di2, 0,                  B_VX,               O2_U4 | O3_U3,      BT_FN_V2DI_V2DF)
+B_DEF      (s390_vclfeb,                fixuns_truncv4sfv4si2, 0,               B_VXE2,             O2_U4 | O3_U3,      BT_FN_UV4SI_V4SF)
+B_DEF      (s390_vclgdb,                fixuns_truncv2dfv2di2, 0,               B_VX,               O2_U4 | O3_U3,      BT_FN_UV2DI_V2DF)
+
 B_DEF      (s390_vfisb,                 vec_fpintv4sf,      0,                  B_VXE,              O2_U4 | O3_U3,      BT_FN_V4SF_V4SF_UCHAR_UCHAR)
 B_DEF      (s390_vfidb,                 vec_fpintv2df,      0,                  B_VX,               O2_U4 | O3_U3,      BT_FN_V2DF_V2DF_UCHAR_UCHAR)
 B_DEF      (s390_vec_ld2f,              vec_ld2f,           0,                  B_VX,               0,                  BT_FN_V2DF_FLTCONSTPTR)                  /* vldeb */
@@ -2815,13 +2839,6 @@  B_DEF      (s390_vfnmsdb,               neg_fmsv2df4,       0,
 B_DEF      (s390_vfsqsb,                sqrtv4sf2,          0,                  B_VXE,              0,                  BT_FN_V4SF_V4SF)
 B_DEF      (s390_vfsqdb,                sqrtv2df2,          0,                  B_VX,               0,                  BT_FN_V2DF_V2DF)
 
-OB_DEF     (s390_vec_double,            s390_vec_double_s64,s390_vec_double_u64,B_VX,               BT_FN_OV4SI_OV4SI)
-OB_DEF_VAR (s390_vec_double_s64,        s390_vec_double_s64,0,                  0,                  BT_OV_V2DF_V2DI)
-OB_DEF_VAR (s390_vec_double_u64,        s390_vec_double_u64,0,                  0,                  BT_OV_V2DF_UV2DI)
-
-B_DEF      (s390_vec_double_s64,        vec_double_s64,     0,                  B_INT | B_VX,       0,                  BT_FN_V2DF_V2DI)  /* vcdgb */
-B_DEF      (s390_vec_double_u64,        vec_double_u64,     0,                  B_INT | B_VX,       0,                  BT_FN_V2DF_UV2DI) /* vcdlgb */
-
 B_DEF      (s390_vflls,                 vflls,              0,                  B_VX,               0,                  BT_FN_V2DF_V4SF)                         /* vldeb */
 B_DEF      (s390_vflrd,                 vflrd,              0,                  B_VX,               O2_U4 | O3_U4,      BT_FN_V4SF_V2DF_INT_INT)                 /* vledb */
 
diff --git a/gcc/config/s390/vecintrin.h b/gcc/config/s390/vecintrin.h
index b2d1c6e..2137597 100644
--- a/gcc/config/s390/vecintrin.h
+++ b/gcc/config/s390/vecintrin.h
@@ -109,8 +109,6 @@  __lcbb(const void *ptr, int bndry)
 #define vec_rint(X)   __builtin_s390_vfi((X), 0, 0)
 #define vec_roundc(X) __builtin_s390_vfi((X), 4, 0)
 #define vec_round(X)  __builtin_s390_vfi((X), 4, 4)
-#define vec_signed(X) __builtin_s390_vcgdb((X), 0, 0)
-#define vec_unsigned(X) __builtin_s390_vclgdb((X), 0, 0)
 #define vec_doublee(X) __builtin_s390_vfll((X))
 #define vec_floate(X) __builtin_s390_vflr((X), 0, 0)
 #define vec_load_len_r(X,Y) __builtin_s390_vlrl((Y),(X))
@@ -315,9 +313,12 @@  __lcbb(const void *ptr, int bndry)
 #define vec_ctd_u64 __builtin_s390_vec_ctd_u64
 #define vec_ctsl __builtin_s390_vec_ctsl
 #define vec_ctul __builtin_s390_vec_ctul
+#define vec_float __builtin_s390_vec_float
+#define vec_double __builtin_s390_vec_double
+#define vec_signed __builtin_s390_vec_signed
+#define vec_unsigned __builtin_s390_vec_unsigned
 #define vec_ld2f __builtin_s390_vec_ld2f
 #define vec_st2f __builtin_s390_vec_st2f
-#define vec_double __builtin_s390_vec_double
 #define vec_madd __builtin_s390_vec_madd
 #define vec_msub __builtin_s390_vec_msub
 #define vec_nmadd __builtin_s390_vec_nmadd
diff --git a/gcc/config/s390/vx-builtins.md b/gcc/config/s390/vx-builtins.md
index 97fd47f..22189ff 100644
--- a/gcc/config/s390/vx-builtins.md
+++ b/gcc/config/s390/vx-builtins.md
@@ -2125,22 +2125,6 @@ 
   "<vw>fche<sdx>bs\t%v2,%v0,%v1"
   [(set_attr "op_type" "VRR")])
 
-(define_expand "vec_double_s64"
-  [(set (match_operand:V2DF               0 "register_operand")
-	(unspec:V2DF [(match_operand:V2DI 1 "register_operand")
-		      (const_int VEC_INEXACT)
-		      (const_int VEC_RND_CURRENT)]
-		     UNSPEC_VEC_VCDGB))]
-  "TARGET_VX")
-
-(define_expand "vec_double_u64"
-  [(set (match_operand:V2DF               0 "register_operand")
-	(unspec:V2DF [(match_operand:V2DI 1 "register_operand")
-		      (const_int VEC_INEXACT)
-		      (const_int VEC_RND_CURRENT)]
-		     UNSPEC_VEC_VCDLGB))]
-  "TARGET_VX")
-
 
 (define_insn "vfmin<mode>"
   [(set (match_operand:VF_HW                0 "register_operand" "=v")
diff --git a/gcc/testsuite/gcc.target/s390/zvector/vec-double-compile.c b/gcc/testsuite/gcc.target/s390/zvector/vec-double-compile.c
new file mode 100644
index 0000000..0a70b09
--- /dev/null
+++ b/gcc/testsuite/gcc.target/s390/zvector/vec-double-compile.c
@@ -0,0 +1,47 @@ 
+/* { dg-do compile } */
+/* { dg-options "-O3 -mzarch -march=arch13 -mzvector -fno-asynchronous-unwind-tables -dp" } */
+
+#include <vecintrin.h>
+
+vector double
+vcdgb (vector signed long long a)
+{
+  return vec_double (a);
+}
+
+/* { dg-final { scan-assembler-times "vcdgb.*\n\tvcdgb.*floatv2div2df2" 1 } } */
+
+vector double
+vcdlgb (vector unsigned long long a)
+{
+  return vec_double (a);
+}
+
+/* { dg-final { scan-assembler-times "vcdlgb.*\n\tvcdlgb.*floatunsv2div2df2" 1 } } */
+
+vector double
+vcdgb_mem (vector signed long long *a)
+{
+  return vec_double (*a);
+}
+
+vector double
+vcdlgb_mem (vector unsigned long long *a)
+{
+  return vec_double (*a);
+}
+
+vector double
+vcdgb_imm ()
+{
+  return vec_double ((vector signed long long) { 1, -2 });
+}
+
+vector double
+vcdlgb_imm ()
+{
+  return vec_double ((vector unsigned long long){ 1, 2 });
+}
+
+/* { dg-final { scan-assembler-times "vcdgb\t" 3 } } */
+/* { dg-final { scan-assembler-times "vcdlgb\t" 3 } } */
diff --git a/gcc/testsuite/gcc.target/s390/zvector/vec-float-compile.c b/gcc/testsuite/gcc.target/s390/zvector/vec-float-compile.c
new file mode 100644
index 0000000..a591e23
--- /dev/null
+++ b/gcc/testsuite/gcc.target/s390/zvector/vec-float-compile.c
@@ -0,0 +1,47 @@ 
+/* { dg-do compile } */
+/* { dg-options "-O3 -mzarch -march=arch13 -mzvector -fno-asynchronous-unwind-tables -dp" } */
+
+#include <vecintrin.h>
+
+vector float
+vcefb (vector signed int a)
+{
+  return vec_float (a);
+}
+
+/* { dg-final { scan-assembler-times "vcefb.*\n\tvcefb.*floatv4siv4sf2" 1 } } */
+
+vector float
+vcelfb (vector unsigned int a)
+{
+  return vec_float (a);
+}
+
+/* { dg-final { scan-assembler-times "vcelfb.*\n\tvcelfb.*floatunsv4siv4sf2" 1 } } */
+
+vector float
+vcefb_mem (vector signed int *a)
+{
+  return vec_float (*a);
+}
+
+vector float
+vcelfb_mem (vector unsigned int *a)
+{
+  return vec_float (*a);
+}
+
+vector float
+vcefb_imm ()
+{
+  return vec_float ((vector signed int) { 1, -2 });
+}
+
+vector float
+vcelfb_imm ()
+{
+  return vec_float ((vector unsigned int){ 1, 2 });
+}
+
+/* { dg-final { scan-assembler-times "vcefb\t" 3 } } */
+/* { dg-final { scan-assembler-times "vcelfb\t" 3 } } */
diff --git a/gcc/testsuite/gcc.target/s390/zvector/vec-signed-compile.c b/gcc/testsuite/gcc.target/s390/zvector/vec-signed-compile.c
new file mode 100644
index 0000000..9814cc5
--- /dev/null
+++ b/gcc/testsuite/gcc.target/s390/zvector/vec-signed-compile.c
@@ -0,0 +1,47 @@ 
+/* { dg-do compile } */
+/* { dg-options "-O3 -mzarch -march=arch13 -mzvector -fno-asynchronous-unwind-tables -dp" } */
+
+#include <vecintrin.h>
+
+vector signed int
+vcfeb (vector float a)
+{
+  return vec_signed (a);
+}
+
+/* { dg-final { scan-assembler-times "vcfeb.*\n\tvcfeb.*fix_truncv4sfv4si2" 1 } } */
+
+vector signed long long
+vcgdb (vector double a)
+{
+  return vec_signed (a);
+}
+
+/* { dg-final { scan-assembler-times "vcgdb.*\n\tvcgdb.*fix_truncv2dfv2di2" 1 } } */
+
+vector signed int
+vcfeb_mem (vector float *a)
+{
+  return vec_signed (*a);
+}
+
+vector signed long long
+vcgdb_mem (vector double *a)
+{
+  return vec_signed (*a);
+}
+
+vector signed int
+vcfeb_imm ()
+{
+  return vec_signed ((vector float) { 1.0f, 2.0f });
+}
+
+vector signed long long
+vcgdb_imm ()
+{
+  return vec_signed ((vector double){ 1.0, 2.0 });
+}
+
+/* { dg-final { scan-assembler-times "vcfeb\t" 3 } } */
+/* { dg-final { scan-assembler-times "vcgdb\t" 3 } } */
diff --git a/gcc/testsuite/gcc.target/s390/zvector/vec-unsigned-compile.c b/gcc/testsuite/gcc.target/s390/zvector/vec-unsigned-compile.c
new file mode 100644
index 0000000..1eed284
--- /dev/null
+++ b/gcc/testsuite/gcc.target/s390/zvector/vec-unsigned-compile.c
@@ -0,0 +1,47 @@ 
+/* { dg-do compile } */
+/* { dg-options "-O3 -mzarch -march=arch13 -mzvector -fno-asynchronous-unwind-tables -dp" } */
+
+#include <vecintrin.h>
+
+vector unsigned int
+vclfeb (vector float a)
+{
+  return vec_unsigned (a);
+}
+
+/* { dg-final { scan-assembler-times "vclfeb.*\n\tvclfeb.*fixuns_truncv4sfv4si2" 1 } } */
+
+vector unsigned long long
+vclgdb (vector double a)
+{
+  return vec_unsigned (a);
+}
+
+/* { dg-final { scan-assembler-times "vclgdb.*\n\tvclgdb.*fixuns_truncv2dfv2di2" 1 } } */
+
+vector unsigned int
+vclfeb_mem (vector float *a)
+{
+  return vec_unsigned (*a);
+}
+
+vector unsigned long long
+vclgdb_mem (vector double *a)
+{
+  return vec_unsigned (*a);
+}
+
+vector unsigned int
+vclfeb_imm ()
+{
+  return vec_unsigned ((vector float) { 1.0f, 2.0f });
+}
+
+vector unsigned long long
+vclgdb_imm ()
+{
+  return vec_unsigned ((vector double){ 1.0, 2.0 });
+}
+
+/* { dg-final { scan-assembler-times "vclfeb\t" 3 } } */
+/* { dg-final { scan-assembler-times "vclgdb\t" 3 } } */