[07/43] i386: Emulate MMX mmx_pmaddwd with SSE

Message ID 20190210001947.27278-8-hjl.tools@gmail.com
State Superseded
Headers show
Series
  • V3: Emulate MMX intrinsics with SSE
Related show

Commit Message

H.J. Lu Feb. 10, 2019, 12:19 a.m.
Emulate MMX pmaddwd with SSE.  Only SSE register source operand is
allowed.

	PR target/89021
	* config/i386/mmx.md (mmx_pmaddwd): Also allow TARGET_MMX_WITH_SSE.
	(*mmx_pmaddwd): Also allow TARGET_MMX_WITH_SSE.  Add SSE support.
---
 gcc/config/i386/mmx.md | 21 +++++++++++++--------
 1 file changed, 13 insertions(+), 8 deletions(-)

-- 
2.20.1

Comments

Uros Bizjak Feb. 10, 2019, 10:21 a.m. | #1
On 2/10/19, H.J. Lu <hjl.tools@gmail.com> wrote:
> Emulate MMX pmaddwd with SSE.  Only SSE register source operand is

> allowed.

>

> 	PR target/89021

> 	* config/i386/mmx.md (mmx_pmaddwd): Also allow TARGET_MMX_WITH_SSE.

> 	(*mmx_pmaddwd): Also allow TARGET_MMX_WITH_SSE.  Add SSE support.


OK.

Uros.

> ---

>  gcc/config/i386/mmx.md | 21 +++++++++++++--------

>  1 file changed, 13 insertions(+), 8 deletions(-)

>

> diff --git a/gcc/config/i386/mmx.md b/gcc/config/i386/mmx.md

> index 82ca8719492..2024c75fa78 100644

> --- a/gcc/config/i386/mmx.md

> +++ b/gcc/config/i386/mmx.md

> @@ -855,20 +855,20 @@

>  	    (sign_extend:V2SI

>  	      (vec_select:V2HI (match_dup 2)

>  		(parallel [(const_int 1) (const_int 3)]))))))]

> -  "TARGET_MMX"

> +  "TARGET_MMX || TARGET_MMX_WITH_SSE"

>    "ix86_fixup_binary_operands_no_copy (MULT, V4HImode, operands);")

>

>  (define_insn "*mmx_pmaddwd"

> -  [(set (match_operand:V2SI 0 "register_operand" "=y")

> +  [(set (match_operand:V2SI 0 "register_operand" "=y,x,Yv")

>          (plus:V2SI

>  	  (mult:V2SI

>  	    (sign_extend:V2SI

>  	      (vec_select:V2HI

> -		(match_operand:V4HI 1 "nonimmediate_operand" "%0")

> +		(match_operand:V4HI 1 "nonimmediate_operand" "%0,0,Yv")

>  		(parallel [(const_int 0) (const_int 2)])))

>  	    (sign_extend:V2SI

>  	      (vec_select:V2HI

> -		(match_operand:V4HI 2 "nonimmediate_operand" "ym")

> +		(match_operand:V4HI 2 "nonimmediate_operand" "ym,x,Yv")

>  		(parallel [(const_int 0) (const_int 2)]))))

>  	  (mult:V2SI

>  	    (sign_extend:V2SI

> @@ -877,10 +877,15 @@

>  	    (sign_extend:V2SI

>  	      (vec_select:V2HI (match_dup 2)

>  		(parallel [(const_int 1) (const_int 3)]))))))]

> -  "TARGET_MMX && ix86_binary_operator_ok (MULT, V4HImode, operands)"

> -  "pmaddwd\t{%2, %0|%0, %2}"

> -  [(set_attr "type" "mmxmul")

> -   (set_attr "mode" "DI")])

> +  "(TARGET_MMX || TARGET_MMX_WITH_SSE)

> +   && ix86_binary_operator_ok (MULT, V4HImode, operands)"

> +  "@

> +   pmaddwd\t{%2, %0|%0, %2}

> +   pmaddwd\t{%2, %0|%0, %2}

> +   vpmaddwd\t{%2, %1, %0|%0, %1, %2}"

> +  [(set_attr "mmx_isa" "native,x64_noavx,x64_avx")

> +   (set_attr "type" "mmxmul,sseiadd,sseiadd")

> +   (set_attr "mode" "DI,TI,TI")])

>

>  (define_expand "mmx_pmulhrwv4hi3"

>    [(set (match_operand:V4HI 0 "register_operand")

> --

> 2.20.1

>

>

Patch

diff --git a/gcc/config/i386/mmx.md b/gcc/config/i386/mmx.md
index 82ca8719492..2024c75fa78 100644
--- a/gcc/config/i386/mmx.md
+++ b/gcc/config/i386/mmx.md
@@ -855,20 +855,20 @@ 
 	    (sign_extend:V2SI
 	      (vec_select:V2HI (match_dup 2)
 		(parallel [(const_int 1) (const_int 3)]))))))]
-  "TARGET_MMX"
+  "TARGET_MMX || TARGET_MMX_WITH_SSE"
   "ix86_fixup_binary_operands_no_copy (MULT, V4HImode, operands);")
 
 (define_insn "*mmx_pmaddwd"
-  [(set (match_operand:V2SI 0 "register_operand" "=y")
+  [(set (match_operand:V2SI 0 "register_operand" "=y,x,Yv")
         (plus:V2SI
 	  (mult:V2SI
 	    (sign_extend:V2SI
 	      (vec_select:V2HI
-		(match_operand:V4HI 1 "nonimmediate_operand" "%0")
+		(match_operand:V4HI 1 "nonimmediate_operand" "%0,0,Yv")
 		(parallel [(const_int 0) (const_int 2)])))
 	    (sign_extend:V2SI
 	      (vec_select:V2HI
-		(match_operand:V4HI 2 "nonimmediate_operand" "ym")
+		(match_operand:V4HI 2 "nonimmediate_operand" "ym,x,Yv")
 		(parallel [(const_int 0) (const_int 2)]))))
 	  (mult:V2SI
 	    (sign_extend:V2SI
@@ -877,10 +877,15 @@ 
 	    (sign_extend:V2SI
 	      (vec_select:V2HI (match_dup 2)
 		(parallel [(const_int 1) (const_int 3)]))))))]
-  "TARGET_MMX && ix86_binary_operator_ok (MULT, V4HImode, operands)"
-  "pmaddwd\t{%2, %0|%0, %2}"
-  [(set_attr "type" "mmxmul")
-   (set_attr "mode" "DI")])
+  "(TARGET_MMX || TARGET_MMX_WITH_SSE)
+   && ix86_binary_operator_ok (MULT, V4HImode, operands)"
+  "@
+   pmaddwd\t{%2, %0|%0, %2}
+   pmaddwd\t{%2, %0|%0, %2}
+   vpmaddwd\t{%2, %1, %0|%0, %1, %2}"
+  [(set_attr "mmx_isa" "native,x64_noavx,x64_avx")
+   (set_attr "type" "mmxmul,sseiadd,sseiadd")
+   (set_attr "mode" "DI,TI,TI")])
 
 (define_expand "mmx_pmulhrwv4hi3"
   [(set (match_operand:V4HI 0 "register_operand")