[24/43] i386: Emulate MMX mmx_psadbw with SSE

Message ID 20190209132352.1828-25-hjl.tools@gmail.com
State Superseded
Headers show
Series
  • V2: Emulate MMX intrinsics with SSE
Related show

Commit Message

H.J. Lu Feb. 9, 2019, 1:23 p.m.
Emulate MMX mmx_psadbw with SSE.  Only SSE register source operand is
allowed.

	PR target/89021
	* config/i386/mmx.md (mmx_psadbw): Add SSE emulation.
---
 gcc/config/i386/mmx.md | 16 ++++++++++------
 1 file changed, 10 insertions(+), 6 deletions(-)

-- 
2.20.1

Patch

diff --git a/gcc/config/i386/mmx.md b/gcc/config/i386/mmx.md
index e345b2b8875..e5e7c6ec4ce 100644
--- a/gcc/config/i386/mmx.md
+++ b/gcc/config/i386/mmx.md
@@ -1755,14 +1755,18 @@ 
    (set_attr "mode" "DI,TI,TI")])
 
 (define_insn "mmx_psadbw"
-  [(set (match_operand:V1DI 0 "register_operand" "=y")
-        (unspec:V1DI [(match_operand:V8QI 1 "register_operand" "0")
-		      (match_operand:V8QI 2 "nonimmediate_operand" "ym")]
+  [(set (match_operand:V1DI 0 "register_operand" "=y,Yx,Yy")
+        (unspec:V1DI [(match_operand:V8QI 1 "register_operand" "0,0,Yy")
+		      (match_operand:V8QI 2 "nonimmediate_operand" "ym,Yx,Yy")]
 		     UNSPEC_PSADBW))]
   "TARGET_SSE || TARGET_3DNOW_A"
-  "psadbw\t{%2, %0|%0, %2}"
-  [(set_attr "type" "mmxshft")
-   (set_attr "mode" "DI")])
+  "@
+   psadbw\t{%2, %0|%0, %2}
+   psadbw\t{%2, %0|%0, %2}
+   vpsadbw\t{%2, %1, %0|%0, %1, %2}"
+  [(set_attr "mmx_isa" "native,x64_noavx,x64_avx")
+   (set_attr "type" "mmxshft,sseiadd,sseiadd")
+   (set_attr "mode" "DI,TI,TI")])
 
 (define_insn_and_split "mmx_pmovmskb"
   [(set (match_operand:SI 0 "register_operand" "=r,r")