[14/43] i386: Emulate MMX sse_cvtps2pi/sse_cvttps2pi with SSE

Message ID 20190209132352.1828-15-hjl.tools@gmail.com
State Superseded
Headers show
Series
  • V2: Emulate MMX intrinsics with SSE
Related show

Commit Message

H.J. Lu Feb. 9, 2019, 1:23 p.m.
Emulate MMX sse_cvtps2pi/sse_cvttps2pi with SSE.

	PR target/89021
	* config/i386/mmx.md (sse_cvtps2pi): Add SSE emulation.
	(sse_cvttps2pi): Likewise.
---
 gcc/config/i386/sse.md | 26 ++++++++++++++++----------
 1 file changed, 16 insertions(+), 10 deletions(-)

-- 
2.20.1

Comments

Uros Bizjak Feb. 9, 2019, 2:28 p.m. | #1
On 2/9/19, H.J. Lu <hjl.tools@gmail.com> wrote:
> Emulate MMX sse_cvtps2pi/sse_cvttps2pi with SSE.

>

> 	PR target/89021

> 	* config/i386/mmx.md (sse_cvtps2pi): Add SSE emulation.

> 	(sse_cvttps2pi): Likewise.

> ---

>  gcc/config/i386/sse.md | 26 ++++++++++++++++----------

>  1 file changed, 16 insertions(+), 10 deletions(-)

>

> diff --git a/gcc/config/i386/sse.md b/gcc/config/i386/sse.md

> index 7d2c0367911..4321c5c46db 100644

> --- a/gcc/config/i386/sse.md

> +++ b/gcc/config/i386/sse.md

> @@ -4668,26 +4668,32 @@

>     (set_attr "mode" "V4SF")])

>

>  (define_insn "sse_cvtps2pi"

> -  [(set (match_operand:V2SI 0 "register_operand" "=y")

> +  [(set (match_operand:V2SI 0 "register_operand" "=y,Yy")

>  	(vec_select:V2SI

> -	  (unspec:V4SI [(match_operand:V4SF 1 "nonimmediate_operand" "xm")]

> +	  (unspec:V4SI [(match_operand:V4SF 1 "nonimmediate_operand" "xm,YyBm")]

>  		       UNSPEC_FIX_NOTRUNC)

>  	  (parallel [(const_int 0) (const_int 1)])))]

>    "TARGET_SSE"


Patterns that use MMX registers should depend on
(TARGET_MMX || TARGET_MMX_WITH_SSE).

Since the above pattern depends on MMX registers, the condition should read:

(TARGET_MMX || TARGET_MMX_WITH_SSE) && TARGET_SSE.

to disable the pattern for -msse -mno-mmx on 32bit target.

All patterns that use MMX registers (especially those in sse.md)
should be reviewed for the above change.

Uros.

> -  "cvtps2pi\t{%1, %0|%0, %q1}"

> -  [(set_attr "type" "ssecvt")

> -   (set_attr "unit" "mmx")

> +  "@

> +   cvtps2pi\t{%1, %0|%0, %q1}

> +   %vcvtps2dq\t{%1, %0|%0, %1}"

> +  [(set_attr "mmx_isa" "native,x64")

> +   (set_attr "type" "ssecvt")

> +   (set_attr "unit" "mmx,*")

>     (set_attr "mode" "DI")])

>

>  (define_insn "sse_cvttps2pi"

> -  [(set (match_operand:V2SI 0 "register_operand" "=y")

> +  [(set (match_operand:V2SI 0 "register_operand" "=y,Yy")

>  	(vec_select:V2SI

> -	  (fix:V4SI (match_operand:V4SF 1 "nonimmediate_operand" "xm"))

> +	  (fix:V4SI (match_operand:V4SF 1 "nonimmediate_operand" "xm,YyBm"))

>  	  (parallel [(const_int 0) (const_int 1)])))]

>    "TARGET_SSE"

> -  "cvttps2pi\t{%1, %0|%0, %q1}"

> -  [(set_attr "type" "ssecvt")

> -   (set_attr "unit" "mmx")

> +  "@

> +   cvttps2pi\t{%1, %0|%0, %q1}

> +   %vcvttps2dq\t{%1, %0|%0, %1}"

> +  [(set_attr "mmx_isa" "native,x64")

> +   (set_attr "type" "ssecvt")

> +   (set_attr "unit" "mmx,*")

>     (set_attr "prefix_rep" "0")

>     (set_attr "mode" "SF")])

>

> --

> 2.20.1

>

>

Patch

diff --git a/gcc/config/i386/sse.md b/gcc/config/i386/sse.md
index 7d2c0367911..4321c5c46db 100644
--- a/gcc/config/i386/sse.md
+++ b/gcc/config/i386/sse.md
@@ -4668,26 +4668,32 @@ 
    (set_attr "mode" "V4SF")])
 
 (define_insn "sse_cvtps2pi"
-  [(set (match_operand:V2SI 0 "register_operand" "=y")
+  [(set (match_operand:V2SI 0 "register_operand" "=y,Yy")
 	(vec_select:V2SI
-	  (unspec:V4SI [(match_operand:V4SF 1 "nonimmediate_operand" "xm")]
+	  (unspec:V4SI [(match_operand:V4SF 1 "nonimmediate_operand" "xm,YyBm")]
 		       UNSPEC_FIX_NOTRUNC)
 	  (parallel [(const_int 0) (const_int 1)])))]
   "TARGET_SSE"
-  "cvtps2pi\t{%1, %0|%0, %q1}"
-  [(set_attr "type" "ssecvt")
-   (set_attr "unit" "mmx")
+  "@
+   cvtps2pi\t{%1, %0|%0, %q1}
+   %vcvtps2dq\t{%1, %0|%0, %1}"
+  [(set_attr "mmx_isa" "native,x64")
+   (set_attr "type" "ssecvt")
+   (set_attr "unit" "mmx,*")
    (set_attr "mode" "DI")])
 
 (define_insn "sse_cvttps2pi"
-  [(set (match_operand:V2SI 0 "register_operand" "=y")
+  [(set (match_operand:V2SI 0 "register_operand" "=y,Yy")
 	(vec_select:V2SI
-	  (fix:V4SI (match_operand:V4SF 1 "nonimmediate_operand" "xm"))
+	  (fix:V4SI (match_operand:V4SF 1 "nonimmediate_operand" "xm,YyBm"))
 	  (parallel [(const_int 0) (const_int 1)])))]
   "TARGET_SSE"
-  "cvttps2pi\t{%1, %0|%0, %q1}"
-  [(set_attr "type" "ssecvt")
-   (set_attr "unit" "mmx")
+  "@
+   cvttps2pi\t{%1, %0|%0, %q1}
+   %vcvttps2dq\t{%1, %0|%0, %1}"
+  [(set_attr "mmx_isa" "native,x64")
+   (set_attr "type" "ssecvt")
+   (set_attr "unit" "mmx,*")
    (set_attr "prefix_rep" "0")
    (set_attr "mode" "SF")])