[v4,01/10] Documentation for the RISC-V 32-bit port

Message ID 9b17f51ea50beefabf43dc9bf1c477f20d589535.1543572707.git.zongbox@gmail.com
State New
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Series
  • RISC-V glibc port for the 32-bit
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Commit Message

Zong Li Dec. 1, 2018, 3:10 a.m.
There are RISC-V 64-bit port information in these documentations. I add
the small documentation entries about the RISC-V 32-bit port together.
---
 NEWS   | 6 ++++++
 README | 1 +
 2 files changed, 7 insertions(+)

-- 
2.7.4

Patch

diff --git a/NEWS b/NEWS
index 1098be1..f878340 100644
--- a/NEWS
+++ b/NEWS
@@ -35,6 +35,12 @@  Major new features:
   different directory.  This is a GNU extension and similar to the
   Solaris function of the same name.
 
+* Support RISC-V port for 32-bit. The ISA and ABI pairs supported as follows:
+
+    - rv32imac ilp32
+    - rv32imafdc ilp32
+    - rv32imafdc ilp32d
+
 Deprecated and removed features, and other changes affecting compatibility:
 
 * The glibc.tune tunable namespace has been renamed to glibc.cpu and the
diff --git a/README b/README
index 27a9fd4..6183376 100644
--- a/README
+++ b/README
@@ -37,6 +37,7 @@  The GNU C Library supports these configurations for using Linux kernels:
 	powerpc64*-*-linux-gnu	Big-endian and little-endian.
 	s390-*-linux-gnu
 	s390x-*-linux-gnu
+	riscv32-*-linux-gnu
 	riscv64-*-linux-gnu
 	sh[34]-*-linux-gnu
 	sparc*-*-linux-gnu