[0/9] RISC-V glibc port for the 32 bit

Message ID cover.1531384753.git.zong@andestech.com
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  • RISC-V glibc port for the 32 bit
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Zong Li July 12, 2018, 10:26 a.m.
This patch set contains the glibc port for the 32 bit RISC-V. I ran the glibc
test suite on QEMU, and remained the failed cases which caused by environment
issue like 64 bit glibc port. In addition, there are some math test cases
need to be checked but it look unlike glibc's problem now.

There is another patch to fix the ld flags issue of tst-execstack-mod.so, it
cause the fail on some test cases on RISC-V.

Thanks everyone for the help and efforts of Palmer during this work.

Zong Li (9):
  Documentation for the 32 bit RISC-V port
  RISC-V: Add dynamic loader for the 32 bit
  RISC-V: Add path of library directories for the 32 bit
  RISC-V: The ABI implementation for the 32-bit
  RISC-V: Hard float support for the 32 bit
  RISC-V: Split the soft-fp into rv32 and rv64
  RISC-V: Add ABI lists
  RISC-V: Build Infastructure for the 32 bit
  Add 32 bit RISC-V to build-many-glibcs.py

 NEWS                                               |    3 +
 README                                             |    1 +
 scripts/build-many-glibcs.py                       |   15 +
 sysdeps/riscv/bits/wordsize.h                      |    4 +-
 sysdeps/riscv/nofpu/Implies                        |    1 -
 sysdeps/riscv/nofpu/libm-test-ulps                 | 2198 --------------------
 sysdeps/riscv/nofpu/libm-test-ulps-name            |    1 -
 sysdeps/riscv/nptl/bits/pthreadtypes-arch.h        |   25 +-
 sysdeps/riscv/preconfigure                         |    6 +-
 sysdeps/riscv/rv32/Implies-after                   |    1 +
 sysdeps/riscv/rv32/nofpu/Implies                   |    2 +
 sysdeps/riscv/rv32/nofpu/libm-test-ulps            |  534 +++++
 sysdeps/riscv/rv32/nofpu/libm-test-ulps-name       |    1 +
 sysdeps/riscv/rv32/rvd/Implies                     |    3 +
 sysdeps/riscv/rv32/rvd/libm-test-ulps              | 1658 +++++++++++++++
 sysdeps/riscv/rv32/rvd/libm-test-ulps-name         |    1 +
 sysdeps/riscv/rv32/rvd/s_lrint.c                   |   31 +
 sysdeps/riscv/rv32/rvd/s_lround.c                  |   31 +
 sysdeps/riscv/rv32/rvf/Implies                     |    1 +
 sysdeps/riscv/rv32/rvf/s_lrintf.c                  |   31 +
 sysdeps/riscv/rv32/rvf/s_lroundf.c                 |   31 +
 sysdeps/riscv/rv64/nofpu/Implies                   |    1 +
 sysdeps/riscv/rv64/nofpu/libm-test-ulps            | 2198 ++++++++++++++++++++
 sysdeps/riscv/rv64/nofpu/libm-test-ulps-name       |    1 +
 sysdeps/riscv/sfp-machine.h                        |   27 +-
 sysdeps/riscv/sys/asm.h                            |    5 +-
 sysdeps/unix/sysv/linux/riscv/Makefile             |    4 +-
 sysdeps/unix/sysv/linux/riscv/configure            |   39 +
 sysdeps/unix/sysv/linux/riscv/configure.ac         |    8 +
 sysdeps/unix/sysv/linux/riscv/dl-cache.h           |   15 +-
 sysdeps/unix/sysv/linux/riscv/ldconfig.h           |    2 +-
 sysdeps/unix/sysv/linux/riscv/rv32/Implies         |    3 +
 sysdeps/unix/sysv/linux/riscv/rv32/c++-types.data  |   67 +
 .../unix/sysv/linux/riscv/rv32/jmp_buf-macros.h    |   53 +
 sysdeps/unix/sysv/linux/riscv/rv32/ld.abilist      |    9 +
 .../sysv/linux/riscv/rv32/libBrokenLocale.abilist  |    1 +
 sysdeps/unix/sysv/linux/riscv/rv32/libanl.abilist  |    4 +
 sysdeps/unix/sysv/linux/riscv/rv32/libc.abilist    | 2095 +++++++++++++++++++
 .../unix/sysv/linux/riscv/rv32/libcrypt.abilist    |    7 +
 sysdeps/unix/sysv/linux/riscv/rv32/libdl.abilist   |    9 +
 sysdeps/unix/sysv/linux/riscv/rv32/libm.abilist    | 1021 +++++++++
 sysdeps/unix/sysv/linux/riscv/rv32/libnsl.abilist  |  120 ++
 .../unix/sysv/linux/riscv/rv32/libpthread.abilist  |  216 ++
 .../unix/sysv/linux/riscv/rv32/libresolv.abilist   |   79 +
 sysdeps/unix/sysv/linux/riscv/rv32/librt.abilist   |   35 +
 .../sysv/linux/riscv/rv32/libthread_db.abilist     |   40 +
 sysdeps/unix/sysv/linux/riscv/rv32/libutil.abilist |    6 +
 sysdeps/unix/sysv/linux/riscv/rv32/lockf64.c       |   70 +
 sysdeps/unix/sysv/linux/riscv/shlib-versions       |    4 +
 49 files changed, 8506 insertions(+), 2212 deletions(-)
 delete mode 100644 sysdeps/riscv/nofpu/Implies
 delete mode 100644 sysdeps/riscv/nofpu/libm-test-ulps
 delete mode 100644 sysdeps/riscv/nofpu/libm-test-ulps-name
 create mode 100644 sysdeps/riscv/rv32/Implies-after
 create mode 100644 sysdeps/riscv/rv32/nofpu/Implies
 create mode 100644 sysdeps/riscv/rv32/nofpu/libm-test-ulps
 create mode 100644 sysdeps/riscv/rv32/nofpu/libm-test-ulps-name
 create mode 100644 sysdeps/riscv/rv32/rvd/Implies
 create mode 100644 sysdeps/riscv/rv32/rvd/libm-test-ulps
 create mode 100644 sysdeps/riscv/rv32/rvd/libm-test-ulps-name
 create mode 100644 sysdeps/riscv/rv32/rvd/s_lrint.c
 create mode 100644 sysdeps/riscv/rv32/rvd/s_lround.c
 create mode 100644 sysdeps/riscv/rv32/rvf/Implies
 create mode 100644 sysdeps/riscv/rv32/rvf/s_lrintf.c
 create mode 100644 sysdeps/riscv/rv32/rvf/s_lroundf.c
 create mode 100644 sysdeps/riscv/rv64/nofpu/Implies
 create mode 100644 sysdeps/riscv/rv64/nofpu/libm-test-ulps
 create mode 100644 sysdeps/riscv/rv64/nofpu/libm-test-ulps-name
 create mode 100644 sysdeps/unix/sysv/linux/riscv/rv32/Implies
 create mode 100644 sysdeps/unix/sysv/linux/riscv/rv32/c++-types.data
 create mode 100644 sysdeps/unix/sysv/linux/riscv/rv32/jmp_buf-macros.h
 create mode 100644 sysdeps/unix/sysv/linux/riscv/rv32/ld.abilist
 create mode 100644 sysdeps/unix/sysv/linux/riscv/rv32/libBrokenLocale.abilist
 create mode 100644 sysdeps/unix/sysv/linux/riscv/rv32/libanl.abilist
 create mode 100644 sysdeps/unix/sysv/linux/riscv/rv32/libc.abilist
 create mode 100644 sysdeps/unix/sysv/linux/riscv/rv32/libcrypt.abilist
 create mode 100644 sysdeps/unix/sysv/linux/riscv/rv32/libdl.abilist
 create mode 100644 sysdeps/unix/sysv/linux/riscv/rv32/libm.abilist
 create mode 100644 sysdeps/unix/sysv/linux/riscv/rv32/libnsl.abilist
 create mode 100644 sysdeps/unix/sysv/linux/riscv/rv32/libpthread.abilist
 create mode 100644 sysdeps/unix/sysv/linux/riscv/rv32/libresolv.abilist
 create mode 100644 sysdeps/unix/sysv/linux/riscv/rv32/librt.abilist
 create mode 100644 sysdeps/unix/sysv/linux/riscv/rv32/libthread_db.abilist
 create mode 100644 sysdeps/unix/sysv/linux/riscv/rv32/libutil.abilist
 create mode 100644 sysdeps/unix/sysv/linux/riscv/rv32/lockf64.c

-- 
2.7.4

Comments

Jim Wilson July 31, 2018, 6:49 p.m. | #1
On 07/12/2018 03:26 AM, Zong Li wrote:
> This patch set contains the glibc port for the 32 bit RISC-V. I ran the glibc

> test suite on QEMU, and remained the failed cases which caused by environment

> issue like 64 bit glibc port. In addition, there are some math test cases

> need to be checked but it look unlike glibc's problem now.


There is an issue with the stat structure that should be resolved before 
the 32-bit RISC-V port is upstreamed.  I'm seeing failures with github 
riscv/riscv-gnu-toolchain when building a riscv32-linux toolchain and 
using a user-mode qemu for testing.  There is some discussion here
     https://github.com/riscv/riscv-gnu-toolchain/pull/325
and here
     https://github.com/riscv/riscv-qemu/issues/135

The latter one suggests that we should first fix the 32-bit RISC-V linux 
port to add
     #define __ARCH_WANT_STAT64
to arch/include/riscv/asm/unistd.h, and then modify qemu, glibc, and 
musl appropriately to match the kernel.

I don't have a riscv32-linux system I can boot, so I can't easily look 
at this problem.

Jim