[v6,0/5] x86: operand size handling improvements

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  • x86: operand size handling improvements
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Jan Beulich Feb. 12, 2020, 10:03 a.m.
The main goal continues to be better consistency in the handling of insn
operands, i.e. in particular less unexpected behavior when deducing how
things would behave from observations with one (set of) insn(s) or
operand(s) towards other constructs.

1: x86-64: Intel64 adjustments for insns dealing with far pointers
2: x86: fold two JMP templates
3: x86: correct VFPCLASSP{S,D} operand size handling
4: x86: also disallow non-byte/-word registers with byte/word suffix
5: x86: move certain MOVSX/MOVZX tests

v6 is to re-order the series to have controversial patches last,
and to address an issue I've noticed in what is now patch 1, in
turn allowing some minor cleanup in new patch 2.